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Sequential Logic
Logic Styles
• Combinational circuits– Output determined solely by inputs– Can draw solely with left-to-right signal paths
Logic Styles
• Sequential circuits– Output determined by inputs AND previous
outputs– Feedback loop
AB Circuit
• If A = 1 output must be 1 A B O
0 0
0 1
1 0 1
1 1 1
AB Circuit
• If A = 0 and B = 1 output must be 0
A B O
0 0
0 1 0
1 0 1
1 1 1
AB Circuit
• If A = 0 and B = 0 output may be 1 or 0
A B O
0 0 0/1??
0 1 0
1 0 1
1 1 1
AB Circuit
• Need to considerhidden input:
A B Last Out
Out
0 0 0 0
0 0 1 1
0 1 x 0
1 0 x 1
1 1 x 1
AB Circuit
• Describe next output Ot+1
in terms of current output Ot
A B Ot+1
0 0 Ot
0 1 0
1 0 1
1 1 1
Clocks
• Crystal Oscillators– Vibrate at known frequency when current applied– Used to generate clock signal:
Logisim Clock
• Clock alternates between high and low
• Button makes a nice manual clock
Hertz
• Frequency inverse of cycle time– Expressed in hertz. 1 Hz = 1 cycle per second• 1 kilohertz (kHz) 1000 cycles/sec• 1 megahertz (MHz) 1 million cycles/sec• 1 gigahertz (GHz) 1 billion cycles/sec
Clocks
• Timing can be– Level-triggered : change can happen when clock high– Edge-triggered : change can happen on edge
Latches
• Latch : Level triggered memory
Flip Flops
• Flip Flop : edge triggered memory– Logisim won't reproduce
SR Circuit
• Set Reset circuit
S R Qt+1
0 0 Qt
0 1 0
1 0 1
1 1 undefined
Logisim
• To simulate SR need to add noise to delays
Logisim
• Oscillation : Circuit trapped in flip/flop – need to restart
Clocked SR Latch
• Level triggered based SR circuit
S R Qt+1
0 0 Qt
0 1 0
1 0 1
1 1 undefined
Clocked JK Latch
• JK makes SR safe– Prevent 1/1 from getting to SR - flips
S R Qt+1
0 0 Qt
0 1 0
1 0 1
1 1 t
D Latch
• D Latch : Stores single bit during low clock
D Qt+1
0 0
1 1
Memory's Atom
• Basic building block of memory
Logisim
• Built in D Flipflop– D– Clock– Preset (force 1)– Clear (force 0)– Enable (1 or floating is on)
Registers
• Register : Array of D Flip-flops
Registers
• Register : Write requiresclock and write signal
Main Memory
• Big old matrix of flip flops
Main Memory
• 2-4 decoder logic picks memory address
Main Memory
• 3 bits wide
Implemeneted
