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8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
1/23
003X-1101/X6 3.00 + 00
‘c 1986 Pcrgamon Press Ltd.
SEMICONDUCTOR HETEROJUNCTION TOPICS:
INTRODUCTION AND OVERVIEW
A. G. MILNES
Carnegie-Mellon University, Pittsburgh, PA 15213, U.S.A.
(Received 17
June
1985; in
reuisedform
31
Ju v
1985)
Abstract-Semiconductor heterojunctions with ideal lattice matching, well-controlled in fabrication, yield
devices that cannot be achieved in any other way. These devices include modulated-doped high-speed
field-effect transistors, ultra-high-gain and high-speed bipolar transistors, efficient injection lasers and
light-emitting diodes and sensitive photo-detecting structures. Atomic reconstructions take place at
heterojunction interfaces and are process-fabrication-dependent and not adequately understood. The
barrier discontinuities observed are therefore scattered in value and also somewhat dependent on the
determination method. Many papers in this Special Issue contain review aspects of these matters. Others,
however, are specific contributions on very particular heterojunction topics. Not all aspects of heterojunc-
tions are dealt with by the papers that follow, and the present article is intended for newcomers to the
field as a brief commentary on topics that are not adequately represented.
1. INTRODUCTION
Developments in
semiconductor heterojunction
structures up to fifteen years ago are described in the
book,
“Heterojunctions and Metal-Semiconductor
Junctions,” by Milnes and Feucht[l], and in “Semi-
conductor Heterojunctions,” by Sharma and
Purohit[2]. Various aspects have also been reviewed
in other volumes [3,4].
Up to the early 1970’s, the only heterojunction
successes that had been achieved were those with
injection lasers [3]. The GaAs/Al,Ga, _-xAs double-
heterojunction laser fabricated by liquid-phase epi-
taxy was exhibiting threshold-current densities of a
few hundred amperes/cm* and ability to function
above room temperature because of the carrier inver-
sion-confinement and optical confinement made pos-
sible by the band discontinuities. Other devices in-
volving heterojunctions were of marginal value, such
as the nCdS/pCu,S solar cell[5], or even existed
only as concepts that had not been realized in any
meaningful way.
With the development of epitaxy methods, particu-
larly organometallic CVD and molecular-beam epi-
taxy in the mid 1970’s, growth technology improved
in precision and ability to handle ternary and
quatemary III-V semiconductors[4] and a new era
began for semiconductor heterojunction devices.
Control became possible in compositionOand in dop-
ing over distances as small as 50 or 100 A and lattice
matching was improved to 10~3-10~4. The devices
that followed included high-quality lasers and optical
detectors, negative-electron-affinity structures, mod-
ulated-doped FET’s and high-gain high-speed bi-
polar transistors. Also in laboratories across the world
many structures are being studied involving hetero-
junctions that are yet to find significant applications.
The present limitations in the experimental control
of heterojunction spike barriers and in the ability of
theoretical treatments to match these barriers are
briefly discussed in the section that follows. This
issue contains papers by Margaritondo and by Wang
dealing with these matters in detail. Section 2, also,
touches on lattice matching and factors determining
interface states. Three important uses of heterojunc-
tions namely, FETs, bipolar transistors and light
detectors and emitters are then mentioned and fin-
ally, there is a brief discussion of quantum-well
structures and strained-layer superlattices and
speculative bandgap-engineering concepts.
2. ENERGY BAND STEPS CREATED BY
HETJZROJUNCTIONS
In a homojunction the energy gap does not vary
across the junction (except for possible bandgap
narrowing produced by heavy doping) and so con-
duction and valence-band-edge steps are similar and
controlled by Poisson’s equation. However, in a het-
erojunction between two different semiconductors
the variations can be quite different since they may
include energy steps AE, and AE,. that are abrupt
to within a few tens of angstroms. These variations
allow the designer a degree of freedom in indepen-
dent control of majority- and minority-carrier flow
(1).
In metal-semiconductor junctions, the simple
work-function electron-affinity model does not usu-
ally predict successfully the observed Schottky-bar-
rier heights[7-91. The failure to do so has been
attributed to interface-state pinning and more re-
cently the role of interface reactions has been
evoked[lO, 111. Attempts to devise new simple mod-
els, such as the common-anion model[7], useful
though this is, have not stood the test of detailed
experimental examination. In heterojunctions there
is a similar failure of simple models. The first-order
primitive model is that of Anderson-Shockley in
99
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
2/23
100
A. G. I
’
1I.Nt.S
which AE, is postulated to be the difference of the
semiconductor electron affinities [l, 21. This intuitive
model is useful as an introductory concept for stu-
dents, but the model is not well representative of
experimental results. Quantum-mechanical modeling
has been attempted with various degrees of success
as discussed by Margaritondo and by Wang in this
issue. The problem of obtaining such models in a
form matching experimental results is frustrated by
atomic reconstructions that take place at heterojunc-
tion interfaces, even the most abrupt and carefully
prepared [12]. Complicated situations cannot be ex-
pected to lead to very simple models. The Ander-
son-Shockley model, and the recent dipole-minimi-
zation model of Tersoff[l4] will probably remain the
main vehicles for introducing students to the subject.
Some measured values of AE,, for a number of
binary semiconductors with Si or Ge applied[l5] are
presented in Table 1 and compared with the values
expected from the electron-affinity model (EA). The
EA predictions are often far from these measured
values (16). Departures of i0.15 eV, or even more,
are common.
Tersoffs model postulates that each semiconductor
has states in the bandgap at or near the interface and
at some energy level EB - E,,, often near the mid-
gap, the states change from acceptor to donor in
nature. Tersoff proposes that when a heterojunction
is formed the EB values on the two sides of the
junction line up and this determines the band offset
A E,,. If the band-diagram did not line up in this way
then charge transfer would occur between the states
on either side of the interface and this would create a
dipole field: so from energy considerations the
system favors dipole minimization and therefore
equalization of the
EB
levels. Values of
EB
may be
estimated from A E,, measurements for a set of het-
erojunction pairs and a transitivity table prepared,
something like the table presented by Margaritondo
in this issue. The state-transition-energy EB may be
Table 1. Experimental valence-band discontinuitiea
compared with the values expected from the
electron-affinity model[l5]
Substrate
Gc
Si
GAS
GaP
GaSb
InAs
InP
InSb
CdS
CdSe
CdTe
ZnSe
ZnTe
Electron-Affinity Model
Experimental
Predictions
(eW
(eV)
Si
Ge
Si
Ge
-0.17 -0.31
0.17
0.31
0.05 0.35 0.27 0.70
0.95 0.80 0.33 0.64
0.05 0.20 -0.37
~ 0.07
0.15 0.33
0.15 0.46
0.57 0.64 0.55
0 85
0.00 0.00 - 0.34
~ 0.03
1.55 1.75 1.30
1.61
1.20 1.30 0.49 0.80
0.75 0.85
0.64 0.94
1.25
1.40 1.68
1.99
0.85 0.95 0.64
0.96
expected to play a similar role in Schottky-barrier
formation if E, is a fairly intrinsic property of the
semiconductor. Therefore the model provides a
bridge between Schottky-barriers and heterojunc-
tions since it implies that if Schottky barrier heights
are known for two semiconductors for a common
reference material such as Au, these results may
perhaps be used directly to construct the heterojunc-
tion barrier diagram for these two semiconductors.
Further discussion of the Tersoff model appears in
the papers by Margaritondo and Wang in this issue.
The precise value of the model is something that
time and further experimentation will establish, but
at the very least it is useful as an academic tool in
developing heterojunction concepts for students.
Literature searches of the 2000 or more papers that
have been published on heterojunction topics in the
last decade show that experimental values of band
discontinuities are scattered widely by perhaps f 0.1
eV. Not all measurement techniques yield the same
band discontinuities for specimens of the same semi-
conductor compositions[17], and the nature of the
preparation method may contribute to the values of
discontinuities that are present. For instance. the
A E,, values for Ge grown on (111) Ga. (100) Ga.
(110,100) As and (111) As (111) As surfaces of GaAs
have been reported as 0.48, 0.55, 0.56, 0.60. and 0.66
eV, respectively[lS]. On the other hand, other
workers have not seen orientation dependencies in
AlGaAs/GaAs heterojunctions[l9] and the weight
of the evidence is for no orientation dependence in
well prepared junctions.
Methods for measuring heterojunction barriers in-
clude: (a) photo-emission spectroscopy relative to
core bands (this involves taking the difference be-
tween two large numbers that have corrections that
are of order iO.l eV and are imperfectly known);
(b) photoluminescence of superlattices with para-
bolic wells (this rather critically depends on knowl-
edge of effective mass); (c) CV apparent doping
profiles (this is only really useful for nh’ and pP
structures); and (d) measurement of A E,, by study of
thermal emission of holes in a PIP structure [a tech-
nique developed by S. L. Wright and J. Batey. J.
Appl. Phys. 57(2), 484(1985)].
The conclusions of such studies with the
GaAs/AlGaAs/Ge system are that barriers of
GaAs/AlGaAs are near-enough commutative,
namely A E,?/’ = A EIfjA so the order of growth has
relatively little effect. Secondly it is concluded that in
this three-component system the barriers are fairly
closely transitive, namely A
E;:‘/’ +
A
E,f’< +
A
E,“’ 4
= 0. The values are typically, according to Katnani
and Bauer (1985 Electronic Materials Conference,
Boulder, CO) AlAs/Ge A E,, = 0.78 k .07, AlAs/
GaAs A E, = 0.39 of: 07 and GaAs/Ge A E,, = 0.44 f
.06 eV.
The variation of the barrier A
E,,
as a function of
Al content (x) in the system Al,Ga, ~, As/GaAs
has been reported as a linear relationship over the
whole range x = O-l and is given by A E,, = 0.551(Al)
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
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Introduction and overview 101
eV in PIP structures. This is not a fixed fraction of
either the direct or indirect bandgap difference. In
another study (M. Heiblum, 1985 IEEE Device Re-
search Conference) structures that were metal
(molybdenum)/iGaAs/nAl,Ga,_,As were ex-
amined by internal photoemission for x in the range
O-0.4, and it was concluded that A E,/A E, was
about 0.60-0.64 in agreement with other work [20,21]
and that A E,, was about 0.47x(Al) eV. For a AER of
about 0.5 eV at x about 0.4, the 0.64 factor corre-
sponds to a barrier for electrons of 0.32 eV.
Several of the papers in this issue discuss hetero-
junction-band-discontinuities. All measured values
however are not presented and a transitivity table
must be used or the general literature must be
searched for AE,., AE,, values once a potential user
has selected the heterojunction-pair of interest. As a
guide to heterojunction-pair selection the following
rules may be suggested.
(a) Select the prime semiconductor of the active
region with due regard for the bandgap and the
mobilities required.
(b) Select the paired semiconductor(s) on the basis
of very close lattice match (say 10e3) and probable
A E, , A E,, values from the literature.
(c) This will commonly involve a binary substrate
and a transition to ternary or quaternary com-
pounds [22]. Select a fabrication process that is com-
patible with this and is not likely to have severe
cross-doping problems (such as may occur in
Ge-GaAs structures if As enters the Ge). Further-
more, thermal-expansion coefficient differences must
be considered if a substrate such as Si is used. For
lattice-mismatched heterojunctions, with mismatch
greater that 0.5%, the odds are strongly against
achieving useful performance if minority-carrier ac-
tions are involved or if trapping actions are likely to
adversely affect the performance of the device that is
under consideration. Similar remarks apply to het-
erojunctions involving polycrystalline layers.
Strained-layer superlattices are presently under
study as discussed briefly in Section 8 of this intro-
ductory paper, as a way of tailoring effective lattice
dimensions and bandgap modulation.
3. LATTICE MATCHING AND INTERFACE STATES
Lattice matching is a very important factor in
determining the quality of epilayers in heterojunc-
tion devices. A diagram of energy gaps versus lattice
constants for a wide range of ternary three-five and
two-six semiconductors is given as Fig. 1. Available
substrates are normally binary in nature, such as
GaAs or InP, since direct attempts to melt-grow
ingots of ternaries usually result in phase-separation
effects. The heterojunction pairs GaAs/Al ,.Ga, _ , As
are naturally close in lattice constants, but can be
further refined in lattice matching by the addition of
small amounts of an element such as phosphorus.
Growth can be by liquid phase epitaxy (LPE),
molecular-beam epitaxy (MBE) or chemical-vapor-
deposition (CVD). There is evidence that with LPE
the interfaces are graded over 100 A or more because
of back-etching of the melt[23] and may not be
uniform on a scale of lo-50 pm in composition
along the plane of the junction[24]. The LPE tech-
nology is less frequently used these days, partly for
this reason but mainly because CVD technology
appears more interesting as a manufacturing process.
In
0 S,Ga, 47A~ grown on InP is another techno-
logically important pair since the devices made pos-
sible by this heterojunction are of use in optical-fiber
communications. The conduction band discontinuity
between these materials has been reported as about
40% of the bandgap difference[2.5]. Stress and dislo-
cations in such structures have been measured by
Chu et a1.(26).
Other alloy semiconductors may be grown lattice-
matched to InP, as may be seen from Fig. 2 the
quaternary alloy diagram for In, _.,Ga,P, _zAsz [27].
Further data of this nature useful for planning
lattice-matched bandgap-varying structures are found
in Kressel and Butler[3]. Other useful references
include Nakajima et al. [28] on In, ,Ga r As, )’PYon
InP; Williams et al.[29] also on III-V quatemary
alloys: Neuse 1301 on (AlGa) (AsSb) quatemaries;
Osamara
et al.
[31] on Al-Ga-Sb; and Masu
et al. [32] on (Al YGa, _ ,)In,,, As.
Films of GaSb, SAs, 5
and Al ,Ga, .~Sb,.As ~,
have been grown by MBE, lattice-matched to InP[33]
but with some evidence of compositional modulation
due to spinoidal decomposition. CdS is also ap-
proximately a lattice match to InP and a A E, of 0.56
eV has been reported[34].
In general if the device requires that a lattice
mismatched film be grown, it is customary to provide
a lattice-graded interface layer. For instance,
In,, zGa,,
As
might be grown on GaAs by providing
a sequence of thin layers stepped in composition
between 0 and 20% In. The stepped composition of
the buffer layer is cooled between each step to allow
strain relief. By this process threading dislocations
tend to be turned into the surface plane instead of
continuing into subsequent layers.
This kind of approach has been applied to the
growth of GaAs on Si with the aid of a thin buffer
layer of Ge. The Ge nucleation layer grown on the Si
is heavily dislocated (1012 cme2) because of the 4%
lattice mismatch, and the first layer of GaAs grown
is similarly dislocated. Growth of the GaAs by a
sequence of 10 growth interrupts, and thermal cycles,
reduces the dislocation density by one or two orders
of magnitude relative to GaAs grown without inter-
ruption, which shows a 10’ cme2 surface dislocation
density[35,36]. It must be noted however that the
thermal-expansion coefficient of Si is less than that
of GaAs and the grown layer is in tension and liable
to cracking and there also may be bending of the
wafer.
Recently, however, it has been concluded that the
provision of a thin buffer layer of Ge is not an
advantage and that surprisingly good quality GaAs
can be grown directly on (100) or 4” off (100) Si
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
4/23
102
A. G. MILNES
3.6
2.8
2
w” 2.4
Y-
8 2.0
%
$ 1.6
”
&
[L 1.2
:
0.8
I
I
I
I
I
I
I I I I
I
I , I ,
I ,
I
1
I , I ,
I
5.40 5.46 5.56 5.64 5.72 5.00 5.88 5.96 6.04 6.12 6.20 6.28 6.36 6.44 6.52
LATTICE CONSTANT, a0 % (300 K)
Fig. 1. Energy gap versus lattice constant for three-t&z and two-six semiconductors.
GaAs
.Y
GaP
120
1 10
220ev
210
100
200
090
1.90
180
f
1.70
160
Fig. 2. Lattice constant and energy gap (77 K) as a function
of composition for the quaternary alloy In, _ ,Ga,P, ;As,.
The solid lines are constant energy gap curves; the dashed
lines are lattice constant curves obtained by application of
Vegard’s law. The intersection of the energy gap curves with
the lattice constant curves makes it apparent that the energy
gap may be varied while a fixed lattice constant is main-
tained, indicating a variety of heterojunction possibili ties
from the infrared to the yellow for the quaternary alloy.
(After Coleman er al. Reprinted with permission from J.
App. Phvs. 47, 2016 1976.j
wafers by molecular-beam epitaxy. The Si wafers are
subjected to a cleaning process at 900 or 1000” C and
growth is begun at a low temperature such as
400-450°C and at a slow rate. This presumably
results in small closely spaced nucleation sites that
interact with each other in such a way that by the
time 1200-1500 A of layer has been grown the
surface tends to be single crystal that is not exces-
sively dislocated and a further thickness can be grown
at a more normal temperature 570°C or higher, and
at a normal growth rate (- 1 pm/hr). Quite good
MESFET and MODFET performances have been
achieved on such material (R. Fischer
et cd.,
1985,
IEEE Device Research Conference, Boulder, CO).
Furthermore it has been shown that GaAs grown by
MOCVD on Si gives similar device performance (T.
Nonaka et al., 1985, IEEE Device Research Con-
ference, Boulder, CO).
This is a promising technology since it may allow a
mixture of III-V and Si devices on large commer-
cially convenient Si substrates. The III-V devices
offer optoelectronic performance possibilities that the
Si devices cannot deliver. The GaAs layers on Si
wafers have not been widely available for enough
examination to determine their limitations. It may be
surmised that they will be subject to having strain
effects that might influence long-term stability and
that the minority-carrier performance will be unim-
pressive.
Time will tell whether this technology
survives as viable and worthy of transfer from the
laboratory to production.
In another approach GaAs of FET quality has
been grown by MBE on Ge by the provision of a 1
pm quantum-well-structure interface of GaAs-
(AlGa)As [37].
The quality of the interface region in a high-grade
heterojunction such as Al rGa, _ 1As/GaAs is of spe-
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
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Introduction and overview
103
cial interest.
When grown by MBE the interface
width (lo-90% Alp-p height) has been measured as
about 15 A by Auger profiling[23]. In general the
interface of Al.Ga,-,As grown on GaAs (termed
the “normal” interface) is superior in electrical prop-
erties to the interface of GaAs grown on Al,Ga, _ .As
(termed the “inverted” interface) [38]. The valence-
band discontinuities have also been found to exhibit
dependence on the growth sequence by some
workers[39] and not by others. The reason for this is
not properly known and the effect is usually dismiss-
ed as a consequence of greater interface roughness
and possibly greater contamination. In a quantum-
well structure, photoluminescence possibly associ-
ated with carbon has been detected in the first few
tens of A of GaAs grown (40).
Transport of electrons and holes across an ideal-
ized (100) interface of GaA-GaAlAs has been mod-
eled by Osbourn and Smith[41] who predict, for
example, that an electron near the X minimum
normal to the interface in Ga, _
\
Al,
As
should
transmit into the X valley of GaAs with much
greater probability than it transmits into the r
minimum of GaAs.
Continuing the discussion of the perfection of a
heterojunction, consider now the interface states at,
for instance, an n-GaAs/N-Al, 25Ga,,,, As inter-
face (the large N is by convention associated with
the material of larger bandgap). Measurement is
usually made by causing a depletion region to spread
through the interface as reverse bias voltage is ap-
plied with the aid of a Schottky barrier on the
nGaAs or in a
p+
nN
structure (42). If there is a A
E,
at the interface and no interface electron traps, there
will usually be an accumulation region and depletion
region on the two sides of the inteiface. If in ad-
dition to a A EC there is an interfacial sheet of traps
the C-V profile of apparent concentration versus
depletion width (42) becomes as shown in Fig. 3.
Kroemer et
al
[43,44] have shown how to calculate
the interface trap density and the band discontinuity
A
E,
from such data and the method is valid even if
the junction is graded. From Fig. 3 the apparent
sheet density of electron traps may be determined to
be 3 X 10” cmm2. Application of deep-level transient
spectroscopy (DLTS) suggests that
~
he traps are
spread over a distance of about 140 A on the GaAs
side of the interface (the GaAs having been grown
after the AlGaAs in this specimen) with a concentra-
tion of about 2 X 1016 cmm3. The trap-level average
energy was estimated as about E,, - 0.66 eV. From
the threshold-current density (about 3 KA/cm2) for
an injection laser containing this interface a non-
radiative interfacial recombination velocity S( =
auN,) of about lo4 cm/s was inferred. For 3 x
10”
states cm-’
this would represent a capture cross
section u of 8 X lo-l5 cm2 in rough agreement with
an estimate of capture cross sections from the DLTS
measurements. The physical nature of the states
is
not known.
18
“; lo -
P-n JUNCTION
I
I
n-N INTERFACE
2 ,+n-GoAs-----
Y- -
0 _
F
E
Y
s
Y ‘7
G 10
FOR PROFILE
g
i 1 k, ( Jg,,21
0
1000
2000
3000
DEPLETION WIDTH,W(V)(i)
Fig. 3. C-V doping profile of P+- n-N DH laser structure
used to study interface states. The position of the n-N
interface at 0.17 pm was determined by direct measure-
ments in a scanning electron microscope. The tic marks on
the profile indicate the values of the reverse bias voltage in
the C-V measurement. The Debye length of 100 A indi-
cates the lower limit on spatial resolution[42].
Consider other measurements of this nature. In a
study of an Al,,,,Ga, xsAs/A10,4, Ga,,, As double
heterostructure as a function of active-region thick-
ness the value of S obtained was close to lo3
cm/s[45]. Such a low value lends to have little
adverse affect on device performance.
Since 1.55 pm is the wavelength of minimum at-
tenuation in optical fibers, attention has focussed on
In
o,sXGao,4,As which has a suitable bandgap (equiv-
alent to 1.62 pm) and is a lattice match to InP. A
confining material is needed for laser action and
In
o 52Al, 4RAs (bandgap 1.47 eV and a match to InP)
has been used. Capacitance profiling applied to a
Au/Ti N-In,,,Al,,,,As/n-In,,,Ga,,,As/n
’
InP
structure yielded 0.50 eV for the conduction band
discontinuity (corresponding to about 70% of AE,)
[46]. An interface charge density of 4 X 10” cm-*
was obtained which is high enough to suggest that
the junction was somewhat imperfect.
A study has been made of the recombination prop-
erties of LPE grown In,Ga,_,P/GaAs heterojunc-
tions as a function of the degree of lattice
mismatch[47]. This and other related studies have
been discussed by Aspnes[48] with the results pre-
sented in Fig. 4. The measured interface surface
recombination velocity is seen to vary linearly with
the lattice mismatch. The density of dangling bonds
at the interface may be expected to vary as 8Aa,/a,‘,
and so to be about 2.5 x 1013 cm-2 for a 1% lattice
mismatch [49] and 2.3 x 10” cm- 2 for a 0.01% match.
The relationship between the dangling-bond density
and the number of misfit dislocations in the plane of
the interface and threading dislocations developing
from the interface depends on strain effects and
impurity-related defects perhaps present at the inter-
face. The relationship between the interface recombi-
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
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104
A. G. MILNES
Fig. 4. Interface recombination velocities for lattice-mis-
matched heterojunctions as a function of relative mismatch
c = Au,,/u,,. Data are as follows:
a,~),
In,Ga, _ ,P/GaAs.
determined from measurements of photoinduced short-cir-
cuit currents in p-n junctions; (O,O), In.Ga, ,P/GaAs.
from heterojunction solar cells; (m) Pb,
,Sn
,Te/PbTe,
minority-carrier lifetime measurements on double hetero-
structure lasers; (+), Al,,,Ga,,As/GaAs. Filled and open
symbols represent epitaxial layers in compression and ten-
sion, respectively (after Aspnes (481).
nation density NR and the dangling-bond N,, and
dislocation densities is unclear. The recombination
velocity is given by uv,NR where u is the recombina-
tion cross section and U, is the thermal velocity
- lo7 cm s-‘. If NR is taken equal to NDB, as
assumed by Kressel[49], then
s = olo7SAa,/a;
= 2.5 x 10220Aa,/a,i.
This leads to the theoretical lines shown in Fig. 4 for
two assumed values lo-l4 and lo-l5 cm2 of capture
cross section.
If a film of thickness d is cladded on both faces by
a heterojunction interface of recombination velocity
S, and if the film thickness is much less than the
minority-carrier diffusion length as in a laser, then
the relationship that applies for the effective lifetime
7 is
where 7R is the bulk lifetime. If 7B is lo-’ corre-
sponding to a GaAs minority-carrier diffusion length
of about 10 pm and if
d
is 10m4 cm, then it is seen
that a value of recombination velocity of lo3 cm/s
or less makes 2S/d an acceptably small term in its
effect on 7.
If the results of Fig. 4 for
In ,Ga, ,
P/GaAs are generally valid, then lattice
matching to closer than 10m4 may be desirable in
most heterojunctions. However, the need for lattice
matching may not be quite as severe as suggested by
Fig. 4. There are studies in progress with lattice-
mismatched heterojunctions that are not thin enough
to be pseudomorphic that suggest that other effects
enter, and that equating of recombination centers to
the dangling-bond density of the simple mismatch
model is open to question, perhaps by as much as
two orders of magnitude. However, there is no doubt
that the better the lattice match, the better the chance
of the device being good.
4. HETEROJ UNCTION FIELD EFFEfl
TRANSISTORS
This Special Issue on Heterojunctions has five
papers dealing with field-effect transistors but these
involve special topics. Therefore, some of the funda-
mentals are discussed below and some key references
given. The May 1986 issue of IEEE Transactions on
Electron evices
is to be devoted entirely to hetero-
junction FETs so the present discussion is brief.
GaAs because of its high electron mobility has the
potential of outperforming Si FET’s. GaAs FET
principles are discussed in a volume edited by
DiLorenzo and Khandelwal[50]. There is further dis-
cussion in the papers by Baliga
et
u/.[Sl] and by
Wieder [52]. A major problem with GaAs is that it is
not easy to obtain a low enough density of states
at the interface between GaAs and an insulator
(SiO,, Si,N,, Al,O,
or native oxide) to make
MISFETs that are effective. Hence CMOS operation
is not easy to achieve.
For low-power-dissipation circuits, where normally
off devices are needed, it is necessary to use MESFET
structures that are fully depleted by the inherent
built-in Schottky barrier voltage and to bias these
with a voltage of about 0.5 V to achieve turn-on.
With these enhancement MESFETs the GaAs logic-
gate-delay versus power-dissipation parameters tend
to be in the region of the performance graph shown
in Fig. 5. Thus the GaAs MESFET technology is
superior in performance to Si technologies (except at
present in yield and price). GaAs-heterojunction bi-
Fig. 5. Power-delay regiona of various transistor technolo-
gies. The diagonal lines are lines of constant power-delak
product (from IEEE Spectrrtv~. p 2X
(Feb. 19X4))
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Introduction and overview
105
polar transistors are seen to be significantly higher
in
power dissipation, with a slight edge
in speed, but
are capable of delivering larger output currents or
powers for heavier loads. The Josephson-junction
technology has reliability and ultra-low temperature
system-integration problems and seems unlikely to
be pursued at present.
The technology labeled MODFET 77 K in Fig. 5 is
of special interest. Modulation-doped field-effect
transistors have very high electron mobility in the
GaAs channel since this is maintained relatively free
of ionized-impurity scattering because the dopants
that supply the channel electrons are confined to an
(AlGa)As region parallel to the channel that is sep-
arated from it by a heterojunction conduction-band
barrier. This effect is useful even at 300” K but
becomes impressive at 77 K. The structures are also
termed selectively doped FETs (SD FETs) or
high-electron-mobility transistors (HEMT) or two-
dimensional electron-gas FETs (TEGFETs). The
concept dates from Bell Laboratories work in 1978
and the history to 1984 has been reviewed by Morkoc
and Solomon [53] and the materials aspects discussed
by DiLorenzo et al. [54].
A typical MODFET energy diagram is that shown
in Fig. 6. The A1,,,SGa,,,,As layer (0.1 pm) is doped
1.5
x
101scm~3. Thus electrons pass over a 100 A
undoped region into a heterojunction notch in a 0.2
pm GaAs layer to form an almost two-dimensional
surface-channel layer of lo’* electrons cm * [55].
The Hall mobility in the surface layer is about 9000
cm*/Vs at 300 K and perhaps as high as 2
x
10’
cm*/Vs at 77 K (56). Typical transconductances are
100~200 mS/mm at 300 K and 300 mS/mm at 77 K
for devices of gate lengths l-3 pm[57-591. Matters
that have been of concern in the fabrication of
MODFETs include the following.
N
5
= 1.14 X td2cm-2 (300K)
Depleted
I
I
Fig. 6. Typical MODFET (AlGa)As-Ga.As energy diagram
(after Morkoc).
(a) Imperfections of the interfaces, particularly the
inverted (GaAs grown on AlGaAs) interface [60-621.
(b) The proportioning of the device, including the
role of the undoped (AlGa)As region, in improving
the channel mobility and aPfecting the available sheet
charge and so the device transconductance[63]. The
selective placing of the Si doping impurities in the
(AlGa)As effectively makes the devices insulated-gate
field-effect transistors with the undoped (AlGa)As
acting as the gate insulator[65,66].
(c) The discovery that Si doping of the (AlGa)As
causes deep donor vacancy complexes (termed DX
centers) to develop in the doped layer and the
MODFETs then exhibit collapse of I V characteris-
tics in the dark and threshold voltage Vr instabilities
associated with change of channel electron con-
centration with light illumination and temper-
ature [59,64]. The effect may be studied by examina-
tion of a persistent-photoconductivity effect [68] at
77 K and is the subject of papers in this issue.
Si doping of GaAs does not produce deep donors
and GaAs does not normally exhibit persistent pho-
toconductivity. For improved threshold stability the
doped (AlGa)As layer in a MODFET may be re-
placed by an AlAs/n-GaAs superlattice (for in-
stance an active 0.5 pm undoped GaAs layer fol-
lowed by a 450 k superlattice of alternating 20 A
layers of undoped AlAs and Si doped GaAs with
an equivalent superlattice doping level of 2
x
10IXcm ’ [59].
(d) Understanding the noise-level-determining fac-
tors in MODFETs. Laviron et d. [69] find room-tem-
perature noise figures of 1.07 dB with associated
gains of 10.5 dB at 10 GHz for 0.5 pm gate length
structures. At 100 K and 17.5 GHz the noise figure
becomes 0.34 dB with associated gain 9.6 dB.
(e) Attention must be given to minimizing the
parasitic resistances and capacitances of the slruc-
tures if the full advantages of potential high-speed
performance are to be obtained[70-721. Dual-
gate-heterojunction FETs of master-slave flip-flops
formed by four cross-coupled
AND/NOR
gates where
each four-input AND/ NOR gate consists of two dual
gate SDHTs of 1 pm gate length[73] have operated
as a divider at 5.5 GHz at room temperature and
10 GHz at 77 K. One-kilobit RAMS based on
MODFETs have been demonstrated with access
times of less than 1 ns.
(f) Another aspect of MODFETs that has been
explored with some success is the feasibility of p-
channel devices. Sheet-carrier concentrations of 1 x
10’” cm’ have been obtained with 77 K hole mobili-
ties of 3650-5000 cm’ V--’ s ’ in Be-doped
(AlGa)As/GaAs structures[74]. Transconductances
of about 30 mS/mm at 77 K have been obtained for
1.5-2 pm gate lengths[75] and p-channel devices
exhibit very little shift of threshold voltage with
light [76].
Structures that consist of (1nGa)As grown on InP
have been giving interesting performances. n-
In
o &a,, 47
As doped 10” cm
’ exhibits a 300 K
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1 6
A. G. MILNES
electron mobility of 8000 cm*/Vs, which is almost
twice that for GaAs of comparable doping. The gap
between the r central valley and the L satellite
valley is larger than for GaAs and therefore an
electron overshoot velocity that is higher by a factor
of two is perhaps achievable[77].
A number of junction or insulated gate FET
structures have been made in (InGa)As[78-821
and selectively doped FETs have been made
with Ga,,,In, 53As/Alo4XIn,,,,As [83]. Recently,
Rosenberg et al. (1985 IEEE Device Research Con-
ference, Boulder, CO) have demonstrated a high
electron mobility transistor that has a GaAs sub-
strate and a thin (300 A) pseudomorphic-strained
active layer of In,,,Ga, ssAs followed by a GaAs
spacer layer and a GaAs
(
n = 2-8 x 10’%mP
s
layer
to provide the carriers for the 6 X 10” cm -’ electron
gas. For 1 pm gate lengths the g,, observed was 170
mS/mm at room temperature and the 77” K elec-
tron mobility was 40,000 cm*/Vs. An important
feature of the device is that it does not exhibit
collapse of the IV characteristics in the absence of
light since AlGaAs and its D-X center is not part of
the structure.
n+
Substrate
b Collector
(a)
n+
1
,i
Substrote
Emitter
(b)
Much remains to be studied in high speed FET
GaAs structures[84-881 including the performance
of various vertical- and permeable-gate structures
[89-921.
Fig. 7. The two single heterojunction bipolar transistor
structures discussed in the text. (a) The conventional
emitter-up/collector-down configuration. (b) The inverted,
emitter-down/collector-up configuration. Note the relative
positions of the narrow and wide bandgap layers in the two
structures; note also the position of the heterojunction. The
devices illustrated are single heterojunction devices but the
5. BIPOLAR HETEROJUNCIION TRANSISTORS
In conventional (homojunction) n+pn bipolar
concept is equally valid for double heterojunction tran
sistors[95].
transistors the emitter is more heavily doped than
the base to control the reverse injection from base to
emitter that otherwise would reduce the current gain.
The valence-band barrier AE,, for heterojunction
transistors, such as the N(AlGa)As/pGaAs/nGaAs
structure, eliminates this problem and the base re-
gion may be more heavily doped than the emitter[l].
This results in a base resistance that is reasonably
low even if the base is made very thin to lower the
base transit time. The low base resistance therefore
reduces the base-emitter and base-collector RC
time-constant terms that also limit the frequency
response of the device provided the associated capa-
citances can be held small by emitter and collector
doping control.
One of the important applications of heterojunc-
tion bipolar transistors is likely to be in analog to
digital converter circuits where very high sampling
rates are desirable and the circuits require the high
driving power (large transconductance) of an HBT.
use of an inverted (collector-up) design in which the
current flow is restricted to the small collector region
of the structure by the barriers of the wide-gap npi
junction near the base in Fig. 7(b) if this is of low
leakage current. With such a structure the relative
frequency performance of bipolar heterojunction and
homojunction-transistors[95] has been estimated to
be about 1.7:1 although this is yet to be demon-
strated. An (AlGa)As/GaAs heterojunction tran-
sistor should have a much higher current gain than a
GaAs homojunction transistor if the emitter-base
interface is well prepared[96] but this is not always
seen for reasons that are not fully examined, never-
theless serviceable current gains of lo-100 are com-
mon. The modeling of (AlGa)As/GaAs devices pre-
sents special problems that have not yet been fully
resolved[97]. The papers by Ankri et al. and Fischer
et al.
in this issue discuss matters relevant to
emitter-injection action in the (AlGa)As system.
The achievement of very-high-frequency perfor-
In a typical heterojunction bipolar transistor the
mance in a bipolar heterojunction transistor depends emitter may be nAl,,,Ga,,As, the base pGaAs (0.1
critically on minimizing device parasitic time pm 10” cm 3, and the collector nGaAs on a semi-
delays[93]. In a normal transistor configuration the
insulating substrate. The two emitter fingers may be
collector area is larger than the emitter area, as 4.5 pm wide and 10 pm long. In such a design[98]
shown in Fig. 7(a), so the collector capacitance-base
the current gain
i,/i,,
observed was 90 and the
resistance time constant in a heterojunction tran-
transconductance per emitter width was 4750
sistor may be a factor limiting the frequency re-
mS/mm. The common-emitter current-gain cut-off
sponse unless this is addressed in the design.
frequency fr was 25 GHz corresponding to an
Krocmer [94] has shown how this may be reduced by
emitter-to-collector transit time of 6.4 ps of which
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Introduction and overview 107
5.2 ps was emitter charging time. It was considered
that this could be reduced to obtain an fr of 50
GHz. Other research groups have obtained compar-
able performances [99-1021, so heterojunction bi-
polar transistors are promising devices for ultra-
high-speed integrated circuits. Propagation delay
times of about 50 ps per gate have been achieved in
ring oscillators. This issue of
Solid-State Electronics
contains a study of current-mode-logic HBT circuit
performance by Katoh et al. that predicts switching
times between 30 and 10 ps. The d.c. characteristics
of double heterojunction bipolar transistors are dis-
cussed in the paper by Ankri et al.
Grading of the base region of an HBT to improve
base transit time by provision of a quasi-electric-field
in the base has been examined by Hayes et al.[103].
Heterojunction bipolar transistors tend to exhibit a
significant collector/emitter offset voltage because of
the difference in base-emitter and base-collector
turn-on voltages unless a second heterojunction is
provided at the base-collector junction. Composi-
tional grading of the emitter to base region however
smooths out the conduction band discontinuity and
so reduces the emitter-base junction turn-on
voltage[l04] and reduces the need for a double het-
erojunction structure.
Numerical modeling of heterojunction bipolar
transistors with graded bases suggest that a current-
gain cut-off frequency of 100 GHz should be ob-
tainable [105]. Monte Carlo simulations [106,107]
suggest that in a base region of 1000 A with a
quasi-electric field of about 20 kV/cm there is near-
ballistic transport of the electrons and a current-gain
cut-off frequency of even 150 GHz might be ex-
pected. Ballistic transport has also been considered
in 0.25 pm gate-length FETs[lOS] with prediction of
fr up to 160 GHz. Hot carriers may cross barriers in
real-space transfer and become trapped [109], as in Si
MOSFETs, so such predictions must be viewed with
caution.
The basic concept that electrons in short devices
may attain high velocities and result in fast charge
transfer is however a matter of continued inter-
est [llO-1121. Ballistic transport implies collision-free
transit over distances shorter than a mean free
path for the particular electron energy. The presence
of a conduction band spike (energy discontinuity) at
a heterojunction emitter has some influence on the
energy distribution of the electrons injected in the
base and the mean free paths may be affected by this
and contribute to the degree of ballistic transport in
narrow base transistors. A GaAs planar-doped ver-
sion of this has been reported by Hollis et al. but
with limited performance[ll3].
Although the discussion has centered around
(AlGa)As/GaAs structures, heterojunction bipolar
transistors have been fabricated in the (AlIn)As/
(GaIn)As/InP system [114,115]. More studies with
this and other materials systems are in progress. It is
noteworthy that
nA1
a 35Ga, 65P/pGaP/n GaP
bi-
polar transistors have demonstrated useful transistor
operation at temperatures up to 550” C and might be
of value for geothermal and other specialized appli-
cations[ll7,118].
In recent years Si bipolar transistors have been
studied with emitters of SIPOS or n doped hydro-
genated amorphous silicon [119,120]. The low mobili-
ties and localized energy states that exist in such
emitters are performance-limiting factors. Recently
Sasaki et al. (1985 IEEE Device Research Con-
ference, Boulder, CO) have reported an amorphous
SiC:H emitter for a Si base-collector heterobipolar
transistor. The AE . and AE values observed are
0.16 and 0.54 eV, respectively, with the 1.8 eV emitter
material.
Also recently there has been progress with the
growth of strained Ge,,,Si,, layers on Si and bipolar
transistor action may be expected from these.
6. LIGHT DETECI ION WITH HJXEROJUNCIION
DIODES AND TRANSISTORS
Silica fibers are of low loss in the 1.3-1.6 pm
wavelength range and therefore there have been ex-
tensive studies of light-detecting diodes and tran-
sistors in this range involving ternary or quaternary
III-V semiconductor heterojunction structures. The
ability to sense low light levels with fast response
time and high gains is of prime importance in optical
communication systems.
6.1.
Diode Detectors
Conventional photodiode structures have been well
reviewed by Melchior [121] and others [122]. If a PIN
form is used the photons are absorbed in a depleted
region of high field and the gain is increased by
avalanche multiplication and nanosecond electron
transit times are readily achieved. However care in
design and fabrication is needed to obtain uniform
avalanche action [123,124] and low dark currents.
The performance of a heterojunction avalanche
photodiode with nIn, s,Ga,,,,As as the light absorb-
ing layer and npInP as the avalanche multiplication
junction is shown in Fig. 8. Separate absorption and
multiplication regions tend to reduce tunneling com-
ponents of dark current and in this structure 1 x 10m4
A cmm2 at 0.9V, is achieved, where V, is the junc-
tion breakdown voltage[l23]. When illuminated with
1.15 pm light, the diode has a maximum multiplica-
tion gain of 880 and an external quantum efficiency
of 40%.
Structures of this kind tend not to perform well at
high bit rates because the bandwidth is restricted by
hole trapping at the valence-band discontinuity at
the InP/InGaAs interface. These holes must escape
by thermal emission in the recovery phase and this is
a relatively slow process. The incorporation of a 0.3
pm intermediate layer of n In, ,Ga,, As,, 65PO 5 be-
tween the
nIn
o.ssGa,47As (10 pm) absorbing layer
and the npInP multiplication junction solves this
problem and allows a gain of 40 or 50 at 0.9 VB and
a dark current density of 5
x
10m4 Acm’ (13 nA)
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108
A. G.
MILNES
10 -I-
/l\zn-InGaAc
. .
- AuSn
-11
KI
L I 1 , I
0 40 20 30 40 50
REVERSE BIAS VOLTAGE V,(V)
I O3
1 4
J
IO’
si
5 -E
IO
&
5
g -7
5 10
II
-E
10
-E
10
-1c
10
(a)
I
I
I
I
I
I
I
I I
I
I
10 20 30 40 50 60
REVERSE BIAS VOLTAGE (VI
(b)
Fig. X. A hetcrojunction avalanche photodiode with
In
.)
57Cra,,47As absorbing layer and nInP avalanche multi-
plication layer and window layer [123]. (a) Dark currents as
a function of reverse bias voltage for several diodes made
from the same wafer. Inset shows a schematic cross section
of the HAPD with buffer layer. (b) Typical
against reverse bias voltage as a parameter
length of incident light.
coupled with excellent performance at
420 Mb/s and 1 Crb/s[125].
photocurrent
of the wave-
bit rates of
In other studies with separate absorber and multi-
plication regions, Al, 48 n, 52 n/Ga, 47In, 53As
avalanche photodiodes have exhibited good perfor-
mance [126]. A typical structure and the correspond-
ing energy diagram are shown in Fig. 9. The ad-
vantage claimed for this particular version of an
SAM APD is that the A
E
value is low. This reduces
the pile-up effect of holes at the notch and so the
detector response time is shorter than for other
material combinations.
Hole trapping at a heterojunction interface is the
essential feature of operation of the modulated bar-
rier photodiode of Fig. 10. The device although not
superfast is sensitive to low light powers and may
have a d.c. optical gain of 1000 in the nanowatt
illumination range[127,128]. The gain is caused by
barrier lowering produced by the accumulation of
the photogenerated holes in the valence band notch
region at the source-gate interface. The rise time is
about 50 ps and the fall time about 600 ps for 0.83
pm pulse illumination. This may be compared with 2
ns for a phototransistor in the low-gain base-con-
trolled condition or lo-100 ns in the high-gain Roat-
ing-base condition.
A typical avalanche photodiode of 50-100 ps re-
sponse time needs a bias voltage of 20 V or more
A
+ *‘0.48I”0.52 As
GY : : % ’ ’ ’ . _’ ’
(a)
nEc =0.55ev
(b)
Fig. 9. Avalanche photodiode of (GaIn)As/(AlIn)As. (a)
Schematic of the 1.3 Frn avalanche detector with separate
absorber and multiplication regions. (b) Energy-band di-
. 1.
agram unaer reverse-mas conaltlom
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Introduction and overview
109
m Ge-Au CONTACT
(a)
v
(b)
Fig. 10. An (AlGa)As/GaAs low-light photodetector struc-
ture. (a) Schematic diagram of the majority-electron photo-
detector. Incident photons are absorbed partly in the gate
but most in the drain region. (b) Schematic representation
of the energy band diagram of the majority-electron photo-
detector under normal bias condition.
although if avalanche gain is sacrificed a few volts is
adequate.
A low
voltage may be generated by trans-
mission of light energy through a fiber to what is
essentially a miniature solar cell structure providing
milliwatts of power
[129].
In a few applications there may be interest in
high-speed photodetectors that require no external
bias voltage. Such a structure is shown in Fig. 11.
The light pulse passes through the (AlGa)As window
layer and generates electron-hole pairs in the
p- GaAs layer where they are separated by the built-
in electric field of the junction region[l30]. Electrons
drift towards the heterojunction interface of the
selectively doped Al,,,Ga,,,As/GaAs structure and
are collected by the Au-Ge electrodes. The photo-
generated holes drift towards the pm GaAs and semi-
insulating GaAs substrate and induce electrons in
the conductive epoxy and a transient signal is cou-
pled into the stripline. Pulses with rise times of 30
ps, and 60 ps width at half maximum, have been
detected. This detector appears suitable for integra-
tion with modulation-doped field-effect transistors.
Photoconductive detectors can in some respects be
comparable to photodiode PIN detectors in high
performance in high-data-rate long-wavelength
lightwave communications systems. Photoconductive
detectors can exhibit gains of a few hundred at low
frequencies and gains of the order of 10 at high bit
rates. The gain is less sensitive to temperature than
for an avalanche photodiode. On the other hand,
the detectors with such photoconductive gain show
long (nanosecond) fall times. In a study of a
Ga,, ,,Ine 53
As photoconductive detector grown on
an Fe doped semiinsulating InP, the received optical
(b)
To
SAMPLING SCOPE
2 DEG
(cl
Fig.
11. Bias-free Al,Ga, _xAs/GaAs photodetector. (a)
Cross-sectional view of the bias-free photodetector (not
drawn to scale). The dashed line indicates the existence of
the two-dimensional electron gas. Note that the Ge-Au
contacts penetrate the n-Al,,,Ga,,As layer. (b) Schematic
diagram showing the mounting scheme of the detector. (c)
Energy-band diagram of the selectively doped
Al, aGa, ,As-GaAs structure. The built-in electric field
separates the photogenerated electron-hole pairs, as in-
dicated by the straight arrows. The inserted circuit diagram
illustrates the electron flows (indicated by arrows). The
capacitance C is associated with the semiinsulating GaAs
substrate. Resistance R, (or
R2)
represents the series resis-
tance associated with the electrode No. 1 (or No. 2).
power necessary for a bit error rate of lo-’ at 1.3
pm was - 34.4 dBm at 1 Gb/s[l31,132].
6.2. New
Photodetector Device Concepts
Although avalanche multiplication provides desir-
able gain it also contributes to signal degeneration
and noise. If the ionization coefficient for holes is
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110 A. G.
MILNES
comparable with that for electrons the holes created
in the first ionizing action travel backwards and
create further hole-electron pairs that have the effect
of deteriorating the response to a pulse of light.
Ideally then in avalanche photodiodes a high ioniza-
tion rate for electrons (a) and low rate for holes
(p) is desirable. In Si the ratio a/p is about 20
and reasonably acceptable excess noise factors are
obtained for Si avalanche photodiodes (APDs) oper-
ating at photon energies above the Si bandgap (cor-
responding to wavelengths shorter than 1.1 pm).
However for smaller bandgap materials the ratio of
a/b is not so favorable. Ideas have been proposed
for overcoming this problem that involve gradedLgap .,
APDs, superlattice and staircase APDs and channel-
ing APD’s[133-1371.
(a)
The concept of the graded-staircase avalanche-
multiplier photodiode is illustrated in Fig. 12. At
E,
each A E step the electric field is high and the
electrons ionize hole electron pairs as suggested by
the arrows in Fig. 12(b). The holes do not ionize
L
in their reverse flow to the cathode because the
A E steps are small. In progress towards construc-
tion of such a photodiode a superlattice of
Al
o 45Ga,, 55
As/GaAs has been studied and an effec-
tive a//3 ratio of 8 demonstrated. However graded
structures are needed to eliminate electron trapping
at AE< notches and there are problems still to be
overcome. (b)
The concept for a channeling avalanche photodi-
Fig. 13. A proposed channeling structure
for
an avalanche
ode is shown in Fig.
13. The structure consists of
photodiode. (a) Schematic of the channeling APD. (b) Band
alternate widegap p-
and low-gap n-layers and
diagram of the channeling APD ( ER1 > E 2). c is the paral-
lel field causing carriers to ionize. AE,. ias been assumed
negligible with respect to A
E,
Fig. 12. Proposed staircase avalanche photodiode. (a) Un-
biased graded multilayer region. (b) The complete staircase
detector under bias. The arrows in the valence band indi-
cate that holes do not impact ionize.
voltage is applied so that all the layers are depleted.
The explanation of device operation that follows is
taken directly from the Capasso-Tsang-Williams
paper [134].
“Suppose that radiation of suitable
wavelength is absorbed in the lower gap
layers thus creating electron-hole pairs.
The two p-n heterojunctions formed at
the interfaces between the relatively nar-
row bandgap and the surrounding higher
bandgap layers serve to confine elec-
trons to the narrow bandgap layers while
sweeping holes out into the contiguous
wider bandgap p-layers where they are
confined by the potential. The parallel
electric field c causes electrons confined
to the narrow bandgap layers to impact
ionize. Holes generated in this way are
swept out in the surrounding higher gap
layers before undergoing ionizing colli-
sions in the narrower gap layers since
the layer thickness is made much smaller
than the average hole ionization distance
l/p. In conclusion, electrons and holes
impact ionize in spatially separated re-
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Introduction and overview
111
gions of different bandgap. Holes in the
wider gap layers impact ionize at a much
smaller rate compared to the electron
ionization rate in the relatively lowgap
material, due to the exponential depen-
dence of
a /3
on the bandgap, so that
a/@ ca n
be made extremely large. Note
that this structure has the advantage of
providing a high
a/P
ratio at very high
gains (> 100) because electrons and
holes impact ionize in different materi-
als. A typical design for 1.3-1.6 pm
detectors would have
p-
and n-layer
thicknesses of 0.5-1.0 pm and doping
levels p = n = 10’6/cms. The
p
layers
could be of InP or Al,,,In, 52A~ and
the n layers of In,,,Ga,,,As. These
materials can be grown lattice matched
to a semiinsulating Fe doped InP sub-
strate. The estimated a//3 ratio is = 350
for a parallel field of = 2
X
lo5 V/cm
at a gain of = 150 for a layer length of
= 25 pm.”
There are technological difficulties in fabricating
such structures and it remains to be seen whether
good performance can be achieved.
6.3. Phototransistors
Bipolar-junction and field-effect transistors may be
used as light detectors. In the bipolar device the
transistor is designed so that illumination creates
carriers in the base region. The supply voltage is
applied between the collector and the emitter, and
the base floats at a potential VEB that suits the
current flow and photoinduced carrier conditions as
shown in Fig. 14. There is a buildup of excess holes
in the base and so development of the voltage I’,,
that allows a small hole current related to the photon
flux to flow into the emitter. However, the voltage
&.a causes a much larger current of electrons to flow
from emitter to collector. Thus the photon-induced
carriers are multiplied by the injection gain of the
transistor, provided the base is free to find its own
potential. A heterojunction transistor with wide-gap
emitter provides an optically transparent emitter re-
gion for photons within a certain energy range, and
also the high gain associated with the A E,, barrier at
the heterojunction interface. Interface recombination
may reduce this gain and it is not unusual to find
that the transistor gain is low at low currents or low
light levels. At nW power levels the current gain
(h,,) or optical gain may be 30 or 40 and rise to
many hundreds at high signal power levels. The
performance of heterojunction phototransistors in
the material system InGaAs/InP has been studied
by Chand et al. [138] who conclude that many of the
recent reports of very high optical and current gains
may involve avalanche multiplication as in Fig. 14(c)
enhancing the gain of the HPTs. The gain depen-
dence (on the base-collector voltage) reported by
(b)
Cc)
Fig. 14. Heterojunction phototransistor action. (a) Oper-
ation with floating base. (b) Energy-band diagram with hole
accumulation in the base causing emitter-base bias and
electron injection and collection. (c) Optical-input power
and voltage dependence of optical gain.
Chand et al. and attributed to avalanche multiplica-
tion is not generally observed to such a degree. If
holes are being generated by avalanche at a high rate
and must escape from the base by emission into the
emitter, then an unstable switching or looping-action
might be expected. Since this is not seen then it is
possible that heavy recombination is taking place in
the base of Chand’s structure or at the emitter-base
interface. Narrowing of the base width with increase
of &.a is another factor that could contribute to the
dependence of the gain on I&. There is more to be
examined here in respect of HPT gain and frequency
response. The response time of a graded-base photo-
transistor may be a few tens of picoseconds[l39].
Wavelength-selective photodetectors are of poten-
tial interest in wavelength-division multiplexing
transmission systems and in heterojunction tran-
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
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112
A. Ci. bfII.NES
sisters some degree of selectivity can be achieved by
choice of a suitable absorbing layer in the optical
path as shown in Fig. 15 [140]. The power dependent
gain-bandwidth performance of heteroJunction bi-
polar phototransistors for communication systema
has been considered by Milano et ul.1141].
Modulation-doped FETs may be used as photodc-
SOURCE
SEMI-INSULATING
n+-GoAs12008,2x,d* cn?r
UNDOPED Al, 3 Gao7As( 75iil
tectors. The structure shown in Fig. 16(a) has a
gate-drain spacing of > X pm and a gate length of
>
20 pm, and in spite of these large dimensions it
exhibited (for GaAs laser pulses) a rise time of 12 pb
with a full width at half maximum of 27 ps[140].
The a.c.
(> 20
MHz) external quantum efficiency
was nine times more than for a PIN diode.
MODFET detectors therefore offer comiderable pcr-
formance promise.
In general a PIN detector must be followed by a
0 Ge-AU
m Al
(a)
A”FeN,,Au
Ln DlFFlJSlON
IllP
InGaAs
tl+-IllP
transistor to provide increased gain. Fig. 16(b) shows
s I
IrlP
the integration of a PIN InGaAs detector with an
(b)
InP MISFET transistor [143]. PIN-FET integration
has also been based on the AlGaAs/GaAs
Fig. 16.
FET photodetection. (a) With modulated-doped
FET[142]. (b) With PIN detection and integrated InP MIS
system[144].
FET[143].
6.4. Photocwltuic Solur Cells
There is extensive literature on heterojunctions
applied to solar power generation [145~~147]. The May
1984 IEEE Trunsuctlons on Electron Dec$ices is an
issue devoted entirely to photovoltaics and a broader
review appears in IEEE Spectrum for March 19X4.
In general polycrystalline heterojunction solar cells
show degradation effects and do not exhibit
3
AU-5
hL
, OHMIC CONTACT
I
SUbSTFcATt
I
\
Au-9
OHMIC CC,NTA:CT
(3)
the efficiencies needed to be cost effective (perhaps
> lo-12%’ for air-mass-one conditions is needed in
large arrays).
Single-crystal solar cells based on the III-V system
are capable of performances that exceed those of Si
cells. Single junction efficiencies of 20% or more are
possible with well designed and fabricated heteroface
cells of AlGaAs/GaAs at high solar-concentration
conditions. In multijunction cascade structures
(tandem-cells) the predictions are for 35% efficiency,
but for various technological reasons the present
performance is below that of single crystal cells.
7. HE~‘ER~.JUNCTIONLIGH~‘ EMI~IN~;OIODES
AND
INJEffION LASERS
Heterojunctions have made significant contribu-
tions to light-emitting diodes by allowing ternary
and quaternary structures to be grown effectively,
and by providing carrier confinement and low inter-
facial-recombination and window action. Typical
structures are shown in Fig. 17(a),(b),(c). The GaAs
structure of Fig. 17(b) provides a CW output of 5.X
mW, or a radiance of 92 W/sr cm’, at 150 mA [14X].
The InGaAsP structure has a total hemispherical
light output of 1.2 mW at 200 mA (10 KA/cm’) and
is capable of coupling 40 PW of optical power into a
63 PW core 0.21 NA optical fiber. The proJected
lifetime at room temperature is estimated to be over
10” h[149]. This issue of Solid-State Electronics con-
tains a paper by Komiya et ul. that is concerned with
luminescence from InGaAsP.
Very often an LED has a hemispherical emitting
structure to focus the light into an approximately
I .,,
Fig.
15. A wacclength
xlective heterojuncrion
parallel beam by minimizing total internal reflection.
InGaAaP/InP phototransistor-. (a) Structure \*ith selective
However another approach by Thornton et (11.(1985
ahsorbing layx (h) Band diagram.
IEEE Device Research Conference, Boulder, CO) is
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
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Introduction and overview
113
LIGHT EMITTING REGION METAL CONTACT
GaAs SUBST
GoAs(
1225
GoAs
(~ ) CONTACT
GoAs SUBSTRATEtn
I
GaAs (n
GaAs(p
-2pm
‘Zn DIFFUSION
(b)
n-lnGaAsP(Eg =lOZ/~rn)
(Eg =l 2711”)
p-lnGoAsP(Eg =l 02pm)
(c)
’
AuSn
Fig. 17. Typical light emitting diode structures. (a) Double
heterojunction structure with GaAs light emitting region
and Burrus-type geometry for coupling to an optical
fiber.
(b) Structure with Zn diffusion to reduce series resistance.
(c) Structure with InGaAsP active layer that emits at 1.27
to take a GaAs laser structure and almost entirely
eliminate the reflection at one emitting surface by
providing an antireflection coating of ZrO,. This
suppresses laser action at high current densities (per-
haps even
to 6-8
times the current density typical
for laser action in a similar structure with a complete
FabryPerot cavity). In this way 200-350 mW of
CW light has been obtained from an edge-emitting
device at room temperature with no active cooling
and power conversion efficiencies obtained of about
3%. The structureless far-field pattern so obtained,
with absence of laser speckle, is of value in certain
applications.
The general principles of light-emitting diodes have
been discussed by Bergh and Dean [150] and by
Pilkuhn [151]. Extensive use of visible-light-emitting
diodes already exists and may be expected to grow as
high-brightness high-efficiency low-cost diodes are
developed [152]. Diodes are available in red, orange,
yellow and green. Blue emitting diodes of SIC are
expected to come to market soon.
Turning now to semiconductor injection-lasers, the
role of heterojunctions has been of the essence al-
most from their first inception. No attempt will be
made here to review or highlight this role[3,153].
The June 1983 and June 1985 issues of the IEEE
Journul of Quuntum Electronics are given to semicon-
ductor lasers. The
IEEE Journal of Quuntum Elec-
tronics also publishes many of the papers given at
the International Semiconductor Laser Conferences.
The IEEE Spectrum for December 1983 contains a
review of single-frequency semiconductor lasers for
fiber-optic systems. These references are sufficient to
introduce newcomers to the field. Contributions on
injection lasers were not invited for this issue of
Solid-State Electronics in view of the very specialist
nature of present developments and the coverage
available elsewhere.
8. QUANTUM-WELL STRUCTURES AND
STRAINED LAYER SUPERLATTICES AND
BANDGAP ENGINEERING
Semiconductor superlattice and quantum-well
structure studies were initiated by Esaki and co-
workers about 1970. One kind of superlattice con-
sists of periodic layers, a few hundred angstroms
thick, of a homogeneous single-crystal semiconduc-
tor with large doping swings to form n-i-p-i struc-
tures. Such structures may be expected to have un-
usual conductive, capacitance and optical properties.
More usually quantum-well superlattice structures
involve periodic thin layers of two (or occasionally
more) different semiconductors and the semiconduc-
tors are often selected to be closely lattice-matched.
Sometimes they may be lattice-mismatched so that
alternate layers are in elastic tension or compression
and average in lattice constant to the lattice of the
substrate on which they are grown. A journal Super-
luttices and Micro-structures, published by Academic
Press began in 1985.
In a recent review of superlattices[l54] Esaki char-
acterized them as types I-III as shown in Fig. 18.
Type I occurs for systems such as GaA-AlAs and
GaSb-AlSb, or the strained layer structure of
GaA-Gap. The sum of A E, and A E,, is seen to be
equal to the bandgap difference
Eg2 - Eg,
of the
two semiconductors. The type II staggered structure
is found in certain superlattices of ternary and
quatemary IIIIV’s. Here it is seen that AE, - AE,,
ELECTRONS
Ec2
TYPE
in
5
Ev2
Fig. 1X. Discontinuities of bandedge energies at four kinds
of superlattice heterointerfaces: band offsets (left), band
bending and carrier confinement (middle), and superlattices
(right) [154].
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
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114
A. G.
MILNES
equals the bandgap difference Egz - Eg,. The type
II misaligned structure is an extension of this in
which the conduction band states of semiconductor 1
overlap the valence band states of semiconductor 2.
This has been established as occurring for
InA-GaSb. Electrons from the GaSb valence band
enter the InAs conduction band and produce a di-
pole layer of electron and hole gas shown in Fig.
18(c). The zero gap HgTe/CdTe interface also has
unusual properties since interactions between the
hole bands of the CdTe and the HgTe occur.
Semiconductor superlattices offer several perfor-
mance features of interest for device physicists and
engineers. The value of selective doping for
MODFETs is one property that has already been
amply demonstrated. A second property of value is
in injection-laser structures where the provision of a
quantum-well active region results in modification of
the density of states from a parabolic distribution as
in bulk material to a staircase distribution. This
results in fewer electrons being needed to achieve the
same cavity gain and therefore a lower threshold
current density[l55] as illustrated in Fig. 19.
Another feature of interest of superlattices is that
defect and dislocation densities tend to be reduced in
layers grown above superlattices [156,157]. Impuri-
ties coming from the substrate are intercepted by the
superlattice [158,159]. Device quality GaAs and
AlGaAs can be grown on Ge or Ge/Si substrates for
Al,Ga,_, As BARRIERS
(a)
BARRIER HEIGHT OF THE
MULTILAYERS L m&l
GaAs/Al,Ga,_,As
AlAs MOLE FRACTION X IN Al,Ga,_,
BARRIER LAYERS
(b)
Fig. 19. Quantum well injection laser structure and perfor-
mance[155]. (a) The schematic energy band diagram from
the modified multi-quantum well laser. (b) Shows the varia-
tion of the averaged Jlh of several wafers as a function of
their respective AlAs composition x (and barrier height) in
the Al ,Ga,
_ ,
As barrier layers.
MODFETs with the aid of an intermediate super-
lattice layer. Interdiffusion at Ge/GaAs interfaces
without a quantum-well superlattice has been studied
by Sarma et al.[160]. Certain alloy systems such as
Ga(As, Sb) have miscibility gaps but superlattices of
them can be grown and matched to InP[161].
The Ge-GaAs superlattice has excellent lattice
match but may exhibit planar defects in the GaAs
layers and these have been attributed to the anti-
phase boundaries expected from localized nucleation
of the GaAs on the Ge[162]. Antiphase disorder may
be reduced by careful control of nucleation condi-
tions as found for GaAs and AlGaAs grown on
Si[163]. Control of nucleation has been studied by
Beam
et al.
[164,165] in the growth of Ge, Si,
,/Si
strained-layer superlattices and conditions for avoid-
ance of island nucleation established. Modulation
doping resulting in a two-dimensional hole gas has
been demonstrated for such structures at 4.2 K with
a h& of about 0.1 eV[165,166]. The combination of
(GeSi) and Si is expected to be of device interest in
the next few years.
One feature of superlattices that is usually unde-
sirable is that disordering is produced by impurities
such as Zn at quite moderate temperatures
(5755615°C) [167,168] and by Si at 850°C [169]. This
tends to limit the formation of junctions to in situ
doping during growth. The intermixing phenomenon
induced by diffusion in superlattices has been dis-
cussed by Van Vechten [170].
Tunable below-gap radiation can be obtained from
staggered line-up heterojunctions and quantum-well
structures[l71]. Perhaps of greater device interest is
the demonstration that a long wavelength multi-
quantum-well laser with Ga,,,In,, 53A~ wells and
Al
o.4x n,, s2
As barriers can be made to cover the
range from 1.7 to 1.5 p,rn by adjustment to the well
width from 1000 to 80 A[172].
The thickness of the layers and the composition of
alternate layers may be graded in a superlattice, as
shown in Fig. 20 for a transition from InP to
Ga,, ,,In, 53
As. Such structures have been used in
the fabrication of avalanche photodiodes[l73].
A 50 period multiple-quantum-well superlattice of
GaAs/AlGaAs in a PIN diode structure as shown in
Fig. 21 has an optical absorption edge that is abrupt
because of excitation resonances. Application of an
electric held causes changes of carrier confinement in
the wells and shifts the absorption edge to longer
wavelengths. For 857 nm applied light a factor of 2
change of transmission can be achieved with an 8 V
bias on the diode and the switching time is suitable
for high speed, ns fast modulation[l74]. Optically
bistable light transmission has been demonstrated in
such a structure[l75]. Waveguide action in super-
lattices is discussed in the paper by Bhattacharya
et al. in this issue.
Another bandgap engineering idea that is emerging
is the concept of selective mass tunneling filters.
Tunneling probability depends exponentially on the
barrier E, and carrier mass m as exp( - nr’/“E~/’ )
8/18/2019 Semiconductor Heterojunction Topics: Introduction and Overview
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Introduction and overview 115
I
I
Goo.47’“0.53As
I
I
I
DISTANCE
Fig. 20.
Energy band gap of a graded gap psuedo-quaternary
GaInAsP. The thicknesses of the InP and of the
Gap ,,Inc 5~
As are gradually varied between 5 and 55 A
while keeping constant the period of the superlattice (= 60
A). The dashed lines in (a) represent the average band gap.
(b) Schematics of the HI-LO heterojunction avalanche pho-
todiode incorporating the superlattice. (c) Electric field
pro -
tile[173].
Fig. 21. Schematic view of an AlGaAs/GaAs superlattice
optical modulator. The semiconductor layers are grown via
MBE on a GaAs substrate, and then the diode is defined
lithographically. The lower portion of the figure shows the
calculated electric field strength, S, as a function of position
within the device for two applied voltages[l74].
Xl
GoAS
r3
2
x3
hAS
=1
a)
b)
Fig. 22. Concept for a heterostructure light demultiplexing
device[l76]. (a) Structure. (b) Energy diagram.
Thus it is possible to consider a superlattice in which
there will be selective tunneling of electrons but not
of holes and this may have high photosensitive gain
because the holes are essentially trapped while elec-
trons make many transits of the device. Furthermore
the electron band state formation in the quantum
well insures that tunneling action selects electrons of
particular energies hence giving an energy-resonant
tunneling action. So it is possible to envisage an npn
bipolar transistor that contains quantum wells in the
base and that transmits to the collector only elec-
trons in selected energy ranges that correspond to
certain values of emitter base voltage. So the device
when ultimately refined and developed to have an
undulating output as the emitter-base voltage is
increased may have potential as a logic device with
multiple logic levels or possibly as providing a crude
analog to digital action.
Optical communication systems may in some
applications be multiplexed with light of several
wavelengths. Fig. 22 shows a heterostructure demul-
tiplexer concept in which a detector has a well-struc-
ture graded from GaAs to InAs. Selected absorption
of light of different wavelengths in sequential wells
may allow signal separation [176].
For another potential application it has been sug-
gested that strained layer superlattices in the InAsSb
system may be suitable for long wavelength detector
applications [177]. Suitable absorption must be
achievable in a superlattice of reasonable length and
this may be a problem.
Finally in this examination of bandgap-engineer-
ing a sawtooth superlattice structure proposed by
Capasso et ~I.[1781 is shown in Fig. 23. The action
of the device depends on the lack of reflection sym-
metry and it is suggested that the structure may lead
to high-speed displacement-current photodetectors.
The explanation of the action given by the authors
follows:
“
. electron-hole pairs are excited by
a very short pulse as shown in Fig. 23a.
Electrons experience a high quasielectric
field (typically > lo5 V/cm) due to the
grading whereas the total force acting on
holes is virtually negligible because of
the valence band-edge lineup in p-type
materials. Therefore electrons separate
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116
A. G. ibflLNtS
Fig. 23. Illustration of the formation and decay of the
macroscopic electrical polarization in a superlattice strut-
ture [178].
from holes and reach the low-gap side in
a sub-picosecond time (< 10 ” s).
This sets up an electrical polarization in
the sawtooth structure which results in
the appearance of a voltage across the
device terminals [Fig 23(b)]. This mac-
roscopic dipole moment and its associ-
ated voltage subsequently decay in time
by a combination of (a) dielectric re-
laxation and (b) hole drift under the
action of the internal electric field pro-
duced by the separation of electrons and
holes.
The excess hole density decays by
dielectric relaxation to restore a flat
valence band (equipotential) condition,
as illustrated in Fig. 23(c). Note that in
this final configuration holes have redis-
tributed to neutralize the electrons at
the bottom of the wells. Thus also the
net negative charge density on the low-
gap side of the wells has decreased with
the same time constant as the positive
charge packet (the dielectric relaxation
time).”
When excited with 4 ps laser pulses (X = 6400 A)
at 86 MHz repetition rates, a structure graded from
GaAs to Al,,Ga,,As exhibited a sharp rise-time
output pulse with a 200 ps decay tail. The structure
does not respond to a constant dc light signal. Un-
like conventional semiconductor photodiode and
photoconductive detectors, the current carried in this
photodetector is of displacement rather than conduc-
tion nature since it is associated with a time-varying
polarization.
9. CONCLUSIONS AND OVERVIEW
Heterojunction devices envisaged many years ago
have reached new levels of performance because of
improvements in growth technologies and in physical
understanding and examination of interfaces. This
has led to revitalization of the concept of bandgap
engineering and the free-thinking produced by this
has suggested a number of interesting new device
concepts. Some will survive and others no doubt will
fall by the wayside, but progress is certainly being
made.
The preceding review has attempted to set the
stage for the papers that follow in this special issue.
Basic heterojunction barrier studies are represented
by the papers of Margaritondo and Wang. Bipolar
transistor studies follow with the papers of Ankri
et al. and Katoh et al. Modulated-doped FET struc-
tures are represented by the papers of Look and
Norris, and Schubert
et al.
and Nathan. The first
deals with channel mobility and the others with
undesirable trapping effects. Contacts to such struc-
tures are considered by Mukhergee et 01. and by
Christou and Papanicolaou.
Graded heterojunctions are discussed in the contri-
butions of Fischer et al. and Petrosyan. Then quan-
tum-well effects are examined in the papers by
Masselink
et al.
and Bajaj
et ul.
and superlattices by
Bhattacharya et al.
Photoeffects in InGaAsP are studied in the contri-
butions of Diadiuk and Groves, and Komiya et ul.
and photoeffects in ZnSe-GaAs junctions by Zhuk
et al. Trap levels in heterojunctions are often im-
portant and a comparative study of admittance and
DLTS spectroscopy for CdTe-ZnTe heterojunctions
is offered by Khan and Saji. The growth of
CdTe-InSb heterostructures is discussed by Blat
et
II.
The issue concludes with a paper by the Morkoc
group at the University of Illinois on the very prom-
ising performances achieved for GaAs grown directly
on Si.
Ack~lo,l’led~~emerzts-Contributors are thanked for their
papers and for allowing their manuscripts to be held while
the complete set could be assembled for this special issue.
NSF Grant ECS 82-14859 is acknowledged for partial
support during the preparation of my contribution.
1.
2.
3
4.
5.
6.
I.
8.
REFERENCES
A. G. Mimes and D. L. Feucht, Hetero~u,rc~rro~zs crtrd
Mad Semrconductor Junctrons,
Academic, New York
(1972).
B. L. Sharma and R. K. Purohit, Senrrconducror Iler-
eropnctions,