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Christian BoitTUB Berlin University of Technology

Sect. Semiconductor Devices

Christian.Boit@TU-Berlin.DE

Semiconductor Device & Analysis CenterBerlin University of Technology

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Semiconductor Device & Analysis Center Berlin

Scope:• Research: FA Techniques for Faster Turnaround

- Edit techniques on devices- Physical interactions of devices for localization- Standard solutions (cook book etc.)- Device Design & Characterization

• Education: Full Device Development Process- Semiconductor Devices in Basic Curriculum- Full Microelectronic Business Process (FET)- Failure Analysis, Power & Special Devices

• Service: Commerical-like Application Lab- Lab unique for service of design verification andfailure analysis processes from chip backside

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Semiconductor Device & Analysis Center Berlin

Resources:• 1 Lead Engineer (permanent)• 3 PhD Students based on educational track• 4 Technical Staff (permanent contracts)• More PhD Students per cooperation contracts• State of the Art tools Hamamatsu Phemos 1000,

NPTest OPTIFIB, Agilent 83000 Tester• Device Simulation & Know How (FET, Power, PV)• Sample Preparation Mech, Chem Wet &Dry• 1000 sqft Small Clean Room Technology• More than 5000 sqft lab and office space

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Semiconductor Device & Analysis Center Berlin

Who we are

Device Dynamics Make the Difference in Functional AnalysisChallenges of Backside ApproachDevice Localization with Laser StimulationDevice Repair (Circuit Edit) with FIB

Where we want to go

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Photon Emission Basics: ElectroluminescenceThe Two Basic Mechanisms of Photon Emission in IC

Forward Bias

2) Injection:RadiantInterbandRecombination

P/N Junction:

Reverse Bias

1) Deceleration:Radiant loss ofenergy gained inelectrical field

I

V

LeakageCurrent

DetectionLimit

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Photon Emission Microscopy

X 0.8

X 5 X 25

X 100

Direct defect identification: Gate oxide defect

Emission images at magnification:

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Correlation of MOSFET Light Emissionto Electrical Operation Mode

Light emission and substratecurrent vs. gate voltage

Gate voltage [V] Gate voltage [V]

[µA]

[mA]

Substrate Draincurrent

SubstrateCurrent

LightIntensity

Isub

ID

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Dynamic Photon Emission in CMOS

All figures from J.C. Tsng, Picosecondimaging circuit analysis

• Photon Emission inSwitching Phase of FET

• Required Time Resolution:30 - 40 ps

• Measurement Challenge:~ 1 photon / 105 events

•Stroboscopic Imaging: ICSignal Tracing

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Design Verification: Signal Propagation in ICvisualized with Dynamic Photon Emission

Example: ring oscillator:

Emission from aring oscillator atvarious times.

Three ‚optical waveforms‘ of switchinginduced light emission from neighbouringinverters of the ring oscillator;Vdd -> 0V: high intensity0V -> Vdd: low intensity

All figures from J.C. Tsng, Picosecond imaging circuit analysis

t=3.876ns:

t=4.080ns:

t=6.800ns:

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Design Verification & Failure Analysis:Identification and Localization of Erratic Device

Time integrated image of lightfrom a register file whilerunning a test patternproducing a fail

‚optical waveform‘ from normaland faulty latch pair

fail

All figures from J.C. Tsng, Picosecondimaging circuit analysis

fail

reference

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Why FA through Backside of the Die?

Die

Flip-chip substrate

New PackagesMulti-Level Metallization

Flip-Chip

LOC ( Lead On Chip)

Data taken from Fujitsu

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Observability of Signals with Beam TechniquesDrastically Reduced by Multi Layer Wiring

Observability of Signals with Beam TechniquesDrastically Reduced by Multi Layer Wiring

Data taken from N. Kuji et al., NTT, ESREF97

Cu 6

Cu 5

Cu 4

Cu 3

Cu 2

Cu 1

tungsten 1Image taken from IBM Research Labs

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Challenge of Analysis TechniquesThrough Chip Backside:

IR Optics Resolution vs. Feature Size

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Resolutionof differentimmersion

mediagas, air (a),

liquid, oil(b),solid, Si (c)

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Semiconductor Device & Analysis Center Berlin

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Semiconductor Device & Analysis Center Berlin

Who we are

Device Dynamics Make the Difference in Functional AnalysisChallenges of Backside ApproachDevice Localization with Laser StimulationDevice Repair (Circuit Edit) with FIB

Where we want to go

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Beam Induced Device Stimulation

Set Up:

!"#$%&'()*+,--"$#.,/"+, 0*1234,)

5678%-,)

8!9

51%#,*/,)&%:

.,;&,+4"*$-"#$%&

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Principle of Laser Induced Thermal Stimulation

<"#=7>67"; 67="#=?7-,$-"4"/,74*7="#=767"$4,)+*$$,+4-8*+%& 4=,)1*/*&4%#, %47="#=7+3)),$4-?7-,$-"4"/,74*7&*@ 67-,+4"*$-()*A&,1?7!"#$%&7(%4= ;)*1 ,B+"4%4"*$ 4*74,)1"$%& $*4 @,&&7C,;"$,C

DEF

Electrical Signalresponding tolaser stimulation

Source: Nikawa

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Thermal Stimulation of Silicon Device by IR LaserIntraband Free Carrier Absorption :

1.0 1.5 2.0 2.5

0.01

0.1

1

10

100T

ran

smis

sio

n(%

)

Wavelength (µµµµm)

(a)(b)

(c)

(d)

Si thickness625µm

Dopant Conc.x 1016 cm-3

(a) 1.5(b) 33(c) 120(d) 730

Si indirectbandgap

IR Absorption in Highly Doped Layers:0.1 to 0.05% of 1.3µm Laser power

Local Heating ofActive Device

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Interactions:

Wiring:

Device:

M 1 M 1

Poly-SiSilicideCap

Si-Substrate, typ. 1015-1016/cm3

well, typ. 1017/cm3

typ. 1019 -

1020/cm3

S/D, typ. 1019/cm3 S/D

Thermal Laser Stimulation in Metal Wire & inSemiconductor Device

M 2

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Interactions:

Wiring:Voltage AlterationResistive Change

Device:

Heat

λλλλ=1.3 �m laser illumination

Thermal Laser Stimulation in Metal Wire & inSemiconductor Device

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Interactions:

Wiring:Voltage AlterationResistive Change

Device:Performance

Reduction- Mobility- Vττττ- Speed

Heat

Heat

reflectedbeam

laser illumination, λλλλ=1.3 �m

Thermal Laser Stimulation

in Metal Wire & in Semiconductor Device

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Interactions:

Wiring:Voltage AlterationResistive Change

Device:Performance

Reduction- Mobility- Vττττ- Speed

Heat

Heat Heat

�

t = 1 ms

Thermal Laser Stimulation

in Metal Wire & in Semiconductor Device

Heat

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Soft Defect Localization - FET

Source: Ed Cole

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Source:Ed Cole

Soft Defect LocalizationSoft Defect: Test Fail occurring

only in special Environment

TUB Research Result:Quantitative Investigation of FET Device Parametricswith Thermal Laser Stimulation to be submitted 10/03

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Semiconductor Device & Analysis Center Berlin

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Semiconductor Device & Analysis Center Berlin

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Outline:

Who we are

Device Dynamics Make the Difference in Functional AnalysisChallenges of Backside ApproachDevice Localization with Laser StimulationDevice Repair (Circuit Edit) with FIB

Where we want to go

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Circuit DesignCircuit Design

SimulationSimulation

Layout DesignLayout Design

Mask ProductionMask Production

Engineering SampleEngineering Sample

EvaluationEvaluation

ProductionProduction

Quality ControlQuality Control

Pre

vio

us

Pro

cess

FIB Deposition ofProbing Pads forSRAM Cell onVia 1 level(Prep: surfaceparallel polishing)

Device Repair (Circuit Edit) with FIB:Short Redesign Loop and Access to Cells

FIB

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The OptiFIB Column

Ion Beam

Photon Beam

Coaxial Photon-Ion Microscope

Photon Image

SimultaneousImaging & Editing

Ion Editing

100nm FIBPlacement Accuracy

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SiliconSubstrate

FIB Trench

Transistor Level

M1M2M3M4

M5

FIB Editing of ICs through Si Backside

ILD0

2 - 5 µm

48 µm

ILD1

Very thin remaining bulk Si- Risks: Flatness, Endpoint, Navigation

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Voltage Contrast by Silicon Active Volume

TUB ResearchResult:

FIB ImageContrast of n-Wells for- Endpoint Control

and- Navigationto be presented atESREF & ISTFA 03

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• Ion Beamremovesmaterial

700nm

4 µµµµm

M 1 M 1

Si-p-Substrate

n+ p+n+ p+

+

++

+ + + + +

- -

-

-

---

- - -

p - well+ +

n - well+

-

Scanned IonBeam

Endpoint Detection for Active Si Volume

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• Ion Beamremovesmaterial

• and implantsGa ions intothe backsurface.

700nm

4 µµµµm

M 1 M 1

Si-p-Substrate

n+ p+n+ p+

+

++

+ + + + +

- -

-

-

---

- - -

p - well+ +

n - well+

-

+ + + + + +++ +

Endpoint Detection for Active Si Volume

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• Ion Beamremovesmaterial

• and implantsGa ions intothe backsurface.

• Influence ofSCR causescontrast ofsecondaryparticleemission rate

700nm

4 µµµµm

M 1 M 1

Si-p-Substrate

n+ p+n+ p+

+

++

+ + + + +

- -

-

-

---

- - -

p - well+ +

n - well+

-

e-e-

+ + + + + +++ +

Endpoint Detection for Active Si Volume

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Semiconductor Device & Analysis Center Berlin:Where we want to go

• Establish TUB as Solution Center for AdvancedAnalysis Problems in Electronic Devices

Microelectronics:• Dynamics of Device and Analysis• Pervasive Techniques (i.e. SQUID)• Focused Ion Beam Processes for Edit in Si

Power Devices & Compound Semiconductors:• Adaption of Localization Techniques to Discrete

Devices, Band Gap and Mechanisms of Direct SC• Adaption of FIB processes to Material Components