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Operational Amplifiers
1
I terminali dellamplificatore
operazionale
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 2
Figure 2.1 Circuit symbol for the op amp.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 3
Figure 2.2 The op amp shown connected to dc power supplies.
Funzione e caratteristiche
dellamplificatore operazionale
ideale
A= guadagno differenziale
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 4
Figure 2.3 Equivalent circuit of the ideal op amp.
A= guadagno differenziale
Segnale differenziale e di modo
comune
vid=v2-v1
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 5
Figure 2.4 Representation of the signal sources v1 and v2 in terms of their differential and common-mode components.
vic=1/2(v1+v2)
v1=vicm-vid/2
v2= vicm+vid/2
La configurazione invertente
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 6
Figure 2.5 The inverting closed-loop configuration.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 7
A
v2-v1=vo/A=>0 v1=v2 cortocircuito virtuale
Sfasamento di 180
Effetti del guadagno a anello aperto
finito
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 8
v0=A(v2-v1)
v2=0
v1=-v0/A
Se A G-R2/R1
Resistenza di ingresso e di uscita
R=vi/i1=vi/(vi/R1)=R1
Per avere alta resistenza di ingresso ed elevato guadagno R2 dovrebbe essere
troppo elevata (> decine di M) e questo farebbe perdere di idealit al funzionamento
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 9
troppo elevata (> decine di M) e questo farebbe perdere di idealit al funzionamento
delloperazionale.
Esempio di possibile
configurazione ad alto guadagno
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 10
Figure 2.8 Circuit for Example 2.2. The circled numbers indicate the sequence of the steps in the analysis.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 11
Figure 2.9 A current amplifier based on the circuit of Fig. 2.8. The amplifier delivers its output current to R4. It has a
current gain of (1 + R2/R3), a zero input resistance, and an infinite output resistance. The load (R4), however, must be
floating (i.e., neither of its two terminals can be connected to ground).
Esercizio 2.5 (Amplificatore in
transresistenza)
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 12
Figure E2.5
Esercizio 2.6
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 13
Figure E2.6
Applicazione: il circuito
sommatore
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 14
Figure 2.10 A weighted summer.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 15
Figure 2.11 A weighted summer capable of implementing summing coefficients of both signs.
Configurazione non invertente
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 16
Figure 2.12 The noninverting configuration.
Analisi della configurazione non
invertente ideale e calcolo del
guadagno in anello chiuso
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 17
Figure 2.13 Analysis of the noninverting circuit. The sequence of the steps in the analysis is indicated by the circled
numbers.
Applicazione: buffer
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 18
Figure 2.14 (a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model.
Effetto del guadagno ad anello
aperto finito
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 19
Se A oppure A>>1+R2/R1
G=1+R2/R1
Esercizio 2.9
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 20
Figure E2.9
Esercizio 2.13
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 21
Figure E2.13
Esercizio 2.14
Si deve collegare un trasduttore caratterizzato da una tensione a circuito
Aperto di 1V ed una resistenza interna di 1M ad un carico di 1k.
Si determini la tensione sul carico se il collegamento viene fatto
(a) Direttamente
(b) Attraverso un inseguitore di tensione a guadagno unitario (buffer)
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 22
Amplificatori differenziali
vid= tensione differenziale
Ad= guadagni differenziale
vicm= tensione di modo comune
Acm= guadagno di modo comune
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 23
Figure 2.15 Representing the input signals to a differential amplifier in terms of their differential and common-mode
components.
Rapporto di reiezione di modo comune
Amplificatore di differenza a
singolo stadio
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 24
Figure 2.16 A difference amplifier.
Calcolo del guadagno differenziale
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 25
vo1=-R2/R1 vi1
vo2=( R4/(R3+R4))(1+R2/R1)vi2
vo=vo1+vo2=( R4/(R3+R4))(1+R2/R1)vi2-R2/R1vi1
Se si vuole pesare nella stessa maniera i due ingressi si deve porre:
( R4/(R3+R4))(1+R2/R1)= R2/R1 ovvero (R4/(R3+R4))(R1+R2)/R1=R2/R1
R4/(R3+R4)=R2/(R1+R2)
Questa condizione viene soddisfatta se R4/R3=R2/R1
vo=R2/R1 (vi2-vi1) Ad=R2/R1
Calcolo del guadagno di modo
comune
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 26
Essendo i2=i1 si ha:
Resistenza di ingresso
dellamplificatore differenziale Oltre a rigettare i segnali di modo comune, lamplificatore differenziale
normalmente dovrebbe avere unelevata resistenza di ingresso.
Per determinare la resistenza di ingresso tra i due terminali (cio la vid),
detta resistenza di ingresso differenziale Rid, si consderi R1=R3 e R2=R4
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 27
Figure 2.19 Finding the input resistance of the difference amplifier for the case R3 = R1 and R4 = R2.
Vid=R1 ii+0+R1ii
Rid=2R1
Per avere Rid grande devo
Aumentare R1 ma questo
riduce Ad
Amplificatore da strumentazione
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 28
Figure 2.20 A popular circuit for an instrumentation amplifier: (a) Initial approach to the circuit; (b) The circuit in (a) with
the connection between node X and ground removed and the two resistors R1 and R1 lumped together. This simple wiring
change dramatically improves performance; (c) Analysis of the circuit in (b) assuming ideal op amps.
Dipendenza dalla frequenza del
guadagno ad anello aperto
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 29
Figure 2.22 Open-loop gain of a typical general-purpose internally compensated op amp.
Risposta in frequenza degli
amplificatori ad anello chiuso
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 30
Figure 2.23 Frequency response of an amplifier with a nominal gain of +10 V/V.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 31
Figure 2.24 Frequency response of an amplifier with a nominal gain of 10 V/V.
Comportamento per grandi segnali:
Saturazione della tensione di uscita
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 32
Figure 2.25 (a) A noninverting amplifier with a nominal gain of 10 V/V designed using an op amp that saturates at 13-V
output voltage and has 20-mA output current limits. (b)When the input sine wave has a peak of 1.5 V, the output is
clipped off at 13 V.
Comportamento per grandi segnali:
slew rate
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 33
Figure 2.26 (a) Unity-gain follower. (b) Input step waveform. (c) Linearly rising output waveform obtained when the
amplifier is slew-rate limited. (d) Exponentially rising output waveform obtained when V is sufficiently small so that the
initial slope (vtV) is smaller than or equal to SR.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 34
Figure 2.27 Effect of slew-rate limiting on output sinusoidal waveforms.
Non idealit in continua: offset
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 35
Figure 2.28 Circuit model for an op amp with input offset voltage VOS
.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 36
Figure E2.23 Transfer characteristic of an op amp with VOS
= 5 mV.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 37
Figure 2.29 Evaluating the output dc offset voltage due to VOS
in a closed-loop amplifier.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 38
Figure 2.30 The output dc offset voltage of an op amp can be trimmed to zero by connecting a potentiometer to the two
offset-nulling terminals. The wiper of the potentiometer is connected to the negative supply of the op amp.
Integratori e derivatori
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 39
Figure 2.37 The inverting configuration with general impedances in the feedback and the feed-in paths.
Integratore reale (Esempio 2.6)
Si ricavi per il circuito in figura unespressione
per Vo(s)/Vi(s) . Si dimostri che la funzione di
trasferimento quella di un circuito passa-basso.
Si trovi il guadagno dc e la frequenza a -3dB.
Si dimensioni il circuito per avere un guadagno
dc di 40dB, una frequenza a -3dB di 1kHz e la
resistenza di ingresso 1k. Per quale frequenza
il modulo della funz. di trasferimento 1?
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 40
Figure 2.38 Circuit for Example 2.6.
il modulo della funz. di trasferimento 1?
Qual langolo di fase a questa frequenza?
Diagramma di Bode di un filtro
passa-basso del primo ordine
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 41
Integratore di Miller
i1=vi/R1
vo(t)=-vc(t)
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 42
Si comporta come un passa basso con frequenza di taglio nulla.
Per =0 il modulo infinito funziona ad anello aperto
In dc , quando il condensatore si comporta come circuito aperto, non c
retroazione negativa!
Questa una fonte di problemi: ogni pur piccola componente dc in ingresso
produrrebbe una tensione teoricamente infinita. Ovviamente nella pratica luscita
Saturer positivamente o negativamente a seconda del segno del segnale dc in ingresso
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 43
Figure 2.40 Determining the effect of the op-amp input
offset voltage VOS
on the Miller integrator circuit. Note that
since the output rises with time, the op amp eventually
saturates.
Effetti delle correnti di bias in
ingresso
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 44
Figure 2.41 Effect of the op-amp input bias and offset currents on the performance of the Miller integrator circuit.
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 45
Figure 2.42 The Miller integrator with a large resistance RF
connected in parallel with C in order to provide negative
feedback and hence finite gain at dc.
Esempio 2.7Si determini luscita prodotta da un integratore di Miller in
risposta ad un impulso di ingresso di ampiezza 1V e durata 1ms.
Siano R1=10k e C=10nF. Se in parallelo al condensatore viene posto
Un resistore 1M, come si modificher la risposta?
Si ipotizzi che lopamp saturi a +/-13V.
Si assuma che per t=0 Vc=0
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 46
Figure 2.43 Waveforms for Example 2.7: (a) Input pulse. (b) Output linear ramp of
ideal integrator with time constant of 0.1 ms. (c) Output exponential ramp with resistor
RF
connected across integrator capacitor.
Dove v0(0+) il valore iniziale che 0.
Luscita sar un esponenziale con cost. di tempo RFC=10ms
Per t=1ms v0(t)=9.5V
Il derivatore (filtro passa-alto)
Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith 47
Figure 2.44 (a) A differentiator. (b) Frequency response of a differentiator with a time-constant CR.
Fase =-90 (ovvero -180 (configurazione invertente)+uno sfasamento dovuto allo zero (+90))