27
Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Embed Size (px)

Citation preview

Page 1: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Scheduling Example 3 (1)

Assume:

• FIFO Job Scheduling

• 100 K Main Memory

• Processor Sharing Process Scheduling

(Cont…)

Page 2: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Scheduling Example 3 (2)Job Arrives Run Time Memory

1 10.0 0.3 10

2 10.2 0.5 60

3 10.4 0.1 50

4 10.5 0.4 10

5 10.8 0.1 30

HOLDQ Ready / Running

Page 3: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Example 3 (Cont…)Time Event #Jobs Headway MM Free Time Left10.0 1 A,S 90 1 0.310.2 2 A,S 1 0.2 30 1 0.1

2 0.510.4 1 F 2 0.1 40 2 0.4

3 A,H10.5 4 A,S 1 0.1 30 2 0.3

4 0.410.8 5 A,S 2 0.15 0 2 0.15

4 0.255 0.1

11.1 5 F 3 0.1 30 2 0.054 0.15

11.2 2 F 2 0.05 90 4 0.13 S 40 3 0.1

11.4 3 F 2 0.1 504 F 100

Must be memory sizeMust be 10.0+ sum of all Ri

Page 4: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

T and W for Example 3 Job Run Arrival Finish Ti Wi

1 0.3 10.0 10.4 0.4 1.332 0.5 10.2 11.2 1.0 2.03 0.1 10.4 11.4 1.0 10.04 0.4 10.5 11.4 0.9 2.255 0.1 10.8 11.1 0.3 3.0

===== ===== 3.6 18.58

T = 0.72W = 3.716

Page 5: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Scheduling Example 4 (1)

Assume:

• FIFO Job Scheduling

• 100 K Main Memory

• Devices

• Processor Sharing Process Scheduling

(Cont…)

Page 6: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Scheduling Example 4 (2)Job Arrives Run Time Memory Devices

1 10.0 0.3 10 2

2 10.2 0.5 60 1

3 10.4 0.1 50 4

4 10.5 0.4 10 2

5 10.8 0.1 30 3

HOLDQ Ready / Running

Page 7: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Example 4 (Cont…)Time Event #Jobs Headway MM Free Devices Time Left10.0 1 A,S 90 3 1 0.310.2 2 A,S 1 0.2 30 2 1 0.1

2 0.510.4 1 F 2 0.1 40 4 2 0.4

3 A,H10.5 4 A,S 1 0.1 30 2 2 0.3

4 0.410.8 5 A,H 2 0.15 30 2 2 0.15

4 0.2511.1 2 F 2 0.15 90 3 4 0.1

5 S 60 0 5 0.111.3 5 F 2 0.1 90 3 3 0.1

4 F 100 53 S 50 1

11.4 3 F 1 0.1 100

Page 8: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

T and W for Example 4 Job Run Start Finish Ti Wi

1 0.3 10.0 10.4 0.4 1.332 0.5 10.2 11.1 0.9 1.83 0.1 10.4 11.4 1.0 10.04 0.4 10.5 11.3 0.8 2.05 0.1 10.8 11.3 0.5 5.0

===== ===== 3.6 20.13

T = 0.72W = 4.026

Page 9: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Scheduling Example 5 (1)

Assume:

• FIFO Job Scheduling

• 100 K Main Memory

• Devices

• Processor Sharing Process Scheduling

(Cont…)

Page 10: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Scheduling Example 5 (2)Job Arrives Run Time Memory Tapes

1 1.0 0.5 30 2

2 1.2 1.0 50 1

3 1.3 1.5 50 1

4 1.4 2.0 20 2

5 1.7 0.5 30 3

6 2.1 1.0 30 2

Page 11: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Example 5 (Cont…) (1)Time Event #Jobs Headway MM Free Devices Time Left1.0 1 A,S 70 3 1 0.51.2 2 A,S 1 0.2 20 2 1 0.3

2 1.01.3 3 A,H 2 0.05 20 2 1 0.25

2 0.951.4 4 A,S 2 0.05 0 0 1 0.2

2 0.94 2.0

1.7 5 A,H 3 0.1 0 0 1 0.12 0.84 1.9

2.0 1 F 3 0.1 30 2 2 0.74 1.8

2.1 6 A,S 2 0.05 0 0 2 0.654 1.756 1.0

Page 12: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Example 5 (Cont…) (2)Time Event #Jobs Headway MM Free Devices Time Left4.05 2 F 3 0.65 50 1 4 1.1

3 S 0 0 6 0.353 1.5

5.1 6 F 3 0.35 30 2 4 0.753 1.15

6.6 4 F 2 0.75 50 4 3 0.45 S 20 1 5 0.5

7.4 3 F 2 0.4 70 2 5 0.17.5 5 F 1 0.1 100 5

Page 13: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

T and W for Example 5 Job Run Arrival Finish Ti Wi

1 0.5 1.0 2.0 1.0 2.02 1.0 1.2 4.05 2.85 2.853 1.5 1.3 7.4 6.1 4.064 2.0 1.4 6.6 5.2 2.65 0.5 1.7 7.5 5.8 11.66 2.1 2.1 5.1 3.0 3.0

===== ===== 23.95 26.11

T = 3.99W = 4.35

Page 14: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Job Scheduling

Also known as FCFS: first come, first served

Scheduling based on arrival time

Non-preemptible discipline

Fair – no job is given preferential treatment, and every arriving job eventually runs

Whey is this policy bad for interactive users

WaitHold Ready

Run

Page 15: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Process Management

A multiprogramming OS must interleave the execution of multiple jobs

The OS must decide when each process gets to use each resource (CPU,disk, etc.)

The scheduler decides “when”

Page 16: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Time Quantums

How does the OS interleave execution of many processes on the CPU?

Ans: Time slicing

Quantum:

Amount of time given to jobs when time sharing

Page 17: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Process StatesRunning:

Process currently has CPU

Ready:

Process could use CPU, if CPU were free

Blocked:

Process is waiting for some event to occur:

• I/O Completion

• Buffer available from another process

• Data arrives from network

(More states will be discussed later.)

Page 18: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Process State Transitions

Running

Ready BlockedWakeup

BlockTimeout

Dispatch

Is there a maximum number of processes in any state?

Page 19: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Suspend and Resume

Ready

Running

Suspended Ready Suspended blocked

BlockedWakeup

Suspend

Resume

Event (e.g., I/O) completion

Timeout

Dispatch

Suspend

Suspend

Resume

Page 20: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Process Control Block (PCB)

One PCB per process, containing all information about that process

• Process Identifier (pid)• Parent’s pid• State (e.g., Running, Blocked in ReadyQ)• Priority• Time at which its execution started• Amount of CPU time consumed so far• Copy of all register contents when process was last suspended• Main memory used by process (e.g., base and bound registers, page table pointer)• Accounting information• Room for pointers to PCB into a queue• File descriptor table

Page 21: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Context Switch

A Context Switch occurs when a process exchange is made between the ready and run queues:

Must:

Save the state of the running process

AND

Restore the state of the ready process

Run

Ready

Page 22: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

What happens on a Context Switch? (1)

1. Hardware:• Resets Program Counter (PC to that of the interrupt

handler (IH), which is an address in the OS kernel• Switches from user to supervisor mode

2. Kernel:• Copies A’s state from CPU registers to A’s PCB• Sets A’s state to Ready or Blocked• Inserts A’s PCB on ReadyQ or BlockedQ

3. Scheduler selects a new process to run (B), based on its scheduling discipline

(Contd…)

Page 23: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

What happens on a Context Switch? (2)

4. Kernel:• Sets B’s state to Running• Copies B’s state from B’s PCB to CPU registers

5. Kernel transfers control to B and thereby switches from kernel back to user context

What machine instructions can achieve number 5?

Page 24: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Preemption

Two classes of scheduling disciplines

Premptive

• Scheduler takes CPU away from running job and gives it to another job

• Preempt upon arrival of higher priority job

Non-premptive

Page 25: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Process Scheduling Algorithms (1)

1. Round Robin (RR) Each process runs either until

• Its time quantum expires or• It blocks to perform I/O

2. Processor Sharing (PS)Limit of RR as time quantum goes to zero (Like giving each CPU cycle to a different process, in round robin fashion)N processes scheduled by PS = each job runs on dedicated N-fold slower CPU.Thus, READY = RUNNING

Page 26: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Process Scheduling Algorithms (2)

3. Priority

Each process is statically assigned a priority; run high before low priority

4. Dynamic Priority

Same as #3, except priority level of each process can change dynamically

5. Inverse of the Remainder of the Quantum

Position in ready queue is determined by the amount of time remaining in the time slice (e.g., if ¾ of time slice is left, the job moves ¼ ahead in the ready queue)

Page 27: Scheduling Example 3 (1) Assume: FIFO Job Scheduling 100 K Main Memory Processor Sharing Process Scheduling (Cont…)

Process Scheduling Algorithms (3)

6. Multiple-Level Feedback Variant on the Round Robin

Current processes are forced to wait until new jobs “catch up” in time, then all RR

7. System Balance

Balance system between I/O bound and CPU bound jobs

8. Preference to Interactive jobs

Interactive jobs have higher priority