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OPERATIONAL AMPLIFIERDESIGN PROJECT

Thomas Boggs, David Giles, Jeffrey Lumish

Requirements

Parameter Specification

CMOS Process Baker 1-m

Supply Voltage 3.3 V

Max Power Consumption 150 W

Differential Gain 80 dB

Common Mode Rejection Ratio 120 dB

Input Common Mode Range 0.5-3.3 V

Output Swing 0.3-3.3 V

-3dB Bandwidth 10 kHz

Slew Rate 10 V/s

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Initial Amplifier Design

Calculations

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Initial Amplifier Result

Initial Results

Parameter Specification Actual Value

Differential Gain 80 dB 45 dB

Input Common Mode Range 0.5-3.3 V 0.8-3.3V

Output Swing 0.3-3.3 V 0.3-3.3V

-3dB Bandwidth 10 kHz 3 kHz

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Modified Design

Design Tradeoffs

Wide-Swing Amplifier Design

Phase Margin vs. Bandwidth 36 and 6.9 kHz vs 45 and 4.2 kHz

Bandwidth vs Gain vs Power Consumption Tail Current Increase Bandwidth Increase, Gain Decrease, Power

Consumption Increase

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Results

Circuit Configurations

Power Consumption

Gain

Common Mode Rejection Ratio

Input Common Mode Range - t

Slew Rate

Power Supply Rejection Ratio - t

Output Swing

Circuit Configurations

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Power Consumption

Loaded and Unloaded Gain

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Common Mode Rejection Ratio

Input Common Mode Range

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Slew Rate (Rising Edge)

Slew Rate (Falling Edge)

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Power Supply Rejection Ratio (Vdd)

Power Supply Rejection Ratio (gnd)

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Output Swing

Modified Design Results

Parameter Specification Actual Value

Power Consumption 150 W 95-203 W

Differential Gain 80 dB 75 dB

Common Mode Rejection Ratio 120 dB 75-96 dB

Input Common Mode Range 0.5-3.3 V 0-3.3 V

Output Swing 0.3-3.3 V 0.4-2.6 V

-3dB Bandwidth 10 kHz Loaded | Unloaded1.22 kHz | 360 kHz

Slew Rate 10 V/s Rise | Fall 4.1 V/s | 1.1 V/s

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Discussion