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RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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Page 1: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

SAMPLE QUESTION PAPERS

RRB-JE Classroom Online & Postal Coaching Call : 9990657855

RRB-JE 2018 2nd STAGE CBT

ELECTRONICS ENGINEERING SAMPLE TEST PAPERS

Classroom Batches

For Complete Study Materials &

Classroom coaching

Call : 9990657855 011-26514888

Page 2: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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RRB-JE 2018 Technical Abilities

ELECTRONICS & ALLIED

ENGINEERING 5.

MICROPROCESSOR & MICROCONTROLLER

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Page 3: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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Multiple choice Questions : RRB-JE Sample Practice Test

Microprocessor and Microcontroller

Introduction to microprocessor, 8085 microprocessor working ; Assembly Language programming ; Peripherals & other Microprocessors ; Microcontrollers

Introduction to microprocessor 8085(Working, Hardware, Address)

Part-1

1) Which is the microprocessor

comprises:

a.Register section

b.One or more ALU

c.Control unit

d.All of these

Ans: D

2) What is the store by register?

a.data

b.operands

c.memory

d.None of these

Ans: a

3) Accumulator based microprocessor

example are:

a.Intel 8085

b.Motorola 6809

c.A and B

d.None of these

Ans: c

4) A set of register which contain are:

a.data

b.memory addresses

c.result

d.all of these

Ans: D

5) There are primarily two types of

register:

a.general purpose register

b.dedicated register

c.A and B

d.none of these

Ans: c

6) Name of typical dedicated register is:

a.PC

b.IR

c.SP

d.All of these

Ans: D

7) BCD stands for:

a.Binary coded decimal

b.Binary coded decoded

c.Both a & b

d.none of these

Ans: a

8) Which is used to store critical pieces

of data during subroutines and

interrupts:

a.Stack

b.Queue

c.Accumulator

d.Data register

Ans: a

Page 4: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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9) The data in the stack is called:

a.Pushing data

b.Pushed

c.Pulling

d.None of these

Ans: a

10) The external system bus

architecture is created using from

______ architecture:

a.Pascal

b.Dennis Ritchie

c.Charles Babbage

d.Von Neumann

Ans: D

11) The processor 80386/80486 and the

Pentium processor uses _____ bits

address bus:

a.16

b.32

c.36

d.64

Ans: b

12) Which is not the control bus signal:

a.READ

b.WRITE

c.RESET

d.None of these

Ans: c

13) PROM stands for:

a.Programmable read-only memory

b.Programmable read write memory

c.Programmer read and write memory

d.None of these

Ans: a

14) EPROM stands for:

a.Erasable Programmable read-only

memory

b.ectrically Programmable read write

memory

c.Electrically Programmable read-only

memory

d.None of these

Ans: a

15) Each memory location has:

a.Address

b.Contents

c.Both A and B

d.None of these

Ans: c

16) Which is the type of microcomputer

memory:

a.Processor memory

b.Primary memory

c.Secondary memory

d.All of these

Ans: D

17) Secondary memory can store____:

a.Program store code

b.Compiler

c.Operating system

d.All of these

Ans: D

18) Secondary memory is also

called____:

a.Auxiliary

b.Backup store

c.Both A and B

d.None of these

Ans: c

19 Customized ROMS are called:

a.Mask ROM

b.Flash ROM

Page 5: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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c.EPROM

d.None of these

Ans: a

20) The RAM which is created using

bipolar transistors is called:

a.Dynamic RAM

b.Static RAM

c.Permanent RAM

d.DDR RAM

Ans: b

21) Which type of RAM needs regular

referred:

a.Dynamic RAM

b.Static RAM

c.Permanent RAM

d.SD RAM

Ans: a

22) Which RAM is created using MOS

transistors:

a.Dynamic RAM

b.Static RAM

c.Permanent RAM

d.SD RAM

Ans: a

23) A microprocessor retries

instructions from :

a.Control memory

b.Cache memory

c.Main memory

d.Virtual memory

Ans: c

24) The lower red curvy arrow show

that CPU places the address extracted

from the memory

location on the_____:

a.Address bus

b.System bus

c.Control bus

d.Data bus

Ans: a

25) The CPU sends out a ____ signal to

indicate that valid data is available on

the data bus:

a.Read

b.Write

c.Both A and B

d.None of these

Ans: b

26) The CPU removes the ___ signal to

complete the memory write operation:

a.Read

b.Write

c.Both A and B

d.None of these

Ans: a

27) BIU STAND FOR:

a.Bus interface unit

b.Bess interface unit

c.A and B

d.None of these

Ans: a

28) EU STAND FOR:

a.Execution unit

b.Execute unit

c.Exchange unit

d.None of these

Ans: a

29) Which are the four categories of

registers:

a.General- purpose register

b.Pointer or index registers

c.Segment registers

d.Other register

e.All of these

Page 6: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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Answer:E

30) Eight of the register are known as:

a.General- purpose register

b.Pointer or index registers

c.Segment registers

d.Other register

Ans: a

31) The four index register can be used

for:

a.Arithmetic operation

b.Multipulation operation

c.Subtraction operation

d.All of these

Ans: a

32) IP Stand for:

a.Instruction pointer

b.Instruction purpose

c.Instruction paints

d.None of these

Ans: a

33) CS Stand for:

a.Code segment

b.Coot segment

c.Cost segment

d.Counter segment

Ans: a

34) DS Stand for:

a.Data segment

b.Direct segment

c.Declare segment

d.Divide segment

Ans: a

35) Which are the segment:

a.CS: Code segment

b.DS: data segment

c.SS: Stack segment

d.ES:extra segment

e.All of these

Ans: D

Part-2

1. Which interrupt has the highest

priority?

a) INTR b) TRAP c) RST6.5

2. In 8085 name the 16 bit registers?

a) Stack pointer b) Program counter c)

a & b

3. Which of the following is hardware

interrupts?

a) RST5.5, RST6.5, RST7.5 b) INTR, TRAP

c) a & b

4. What is the RST for the TRAP?

a) RST5.5 b) RST4.5 c) RST4

5. What are level Triggering interrupts?

a) INTR&TRAP b)RST6.5&RST5.5

c)RST7.5&RST6.5

6. Which interrupt is not level sensitive

in 8085?

a) RST6.5 is a raising edge-trigging

interrupt.

b) RST7.5 is a raising edge-trigging

interrupt.

c) a & b.

7. What are software interrupts?

a) RST 0 - 7 b) RST 5.5 - 7.5 c) INTR,

TRAP

8. Which stack is used in 8085?

a) FIFO b) LIFO c) FILO

9. Why 8085 processor is called an 8 bit

processor?

Page 7: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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a) Because 8085 processor has 8 bit

ALU.

b) Because 8085 processor has 8 bit

data bus.

c) a & b.

10. What is SIM?

a) Select Interrupt Mask b) Sorting

Interrupt Mask c) Set Interrupt Mask.

11. RIM is used to check whether, ______

a) The write operation is done or not

b) The interrupt is Masked or not

c) a & b

12. What is meant by Maskable

interrupts?

a) An interrupt which can never be

turned off.

b) An interrupt that can be turned off by

the programmer.

c) none

13. In 8086, Example for Non maskable

interrupts are

a) Trapb) RST6.5 c) INTR

14. What does microprocessor speed

depends on?

a) Clock b) Data bus width c) Address

bus width

15. Can ROM be used as stack?

a) Yes b) No c) sometimes yes,

sometimes no

16. Which processor structure is

pipelined?

a) all x80 processors b) all x85

processors c) all x86 processors

17. Address line for RST3 is?

a) 0020H b) 0028H c) 0018H

18. In 8086 the overflow flag is set when

a) The sum is more than 16 bits

b) Signed numbers go out of their range

after an arithmetic operation

c) Carry and sign flags are set

d) During subtraction

19. The advantage of memory mapped

I/O over I/O mapped I/O is,

a) Faster

b) Many instructions supporting

memory mapped I/O

c) Require a bigger address decoder

d) All the above

20. BHE of 8086 microprocessor signal

is used to interface the

a) Even bank memory

b) Odd bank memory

c) I/O

d) DMA

21. In 8086 microprocessor the

following has the highest priority

among all type interrupts.

a) NMI

b) DIV 0

c) TYPE 255

d) OVER FLOW

22. In 8086 microprocessor one of the

following statements is not true.

a) Coprocessor is interfaced in MAX

mode

b) Coprocessor is interfaced in MIN

mode

c) I/O can be interfaced in MAX / MIN

mode

d) Supports pipelining

23. 8088 microprocessor differs with

8086 microprocessor in

Page 8: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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a) Data width on the output

b) Address capability

c) Support of coprocessor

d) Support of MAX / MIN mode

Answer Key:

1 C 2 C 3 C 4 B 5 B 6 B 7

A 8 B 9 A 10 C 11 B 12 B

13 A 14 C 15 B 16 C 17 C 18 B

19 D 20 B 21 A 22 B 23 A

NUMERICAL BASED QUESTIONS ARE AVAILABLE INTO Practice-BOOKLET

Level-1 , Level-2, Level-3

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Page 9: RRB-JE 2018 Stage2 CBT Electronic Microprocessor Sample …...^ dw> yh ^d/ke w w z^ yy £9 ¼ ÜÜØÈÈÁ i¼¯Â ì vÈÜã ¼ È ¯Â© ¼¼ v | { } ~ { { 0xowlsoh fkrlfh 4xhvwlrqv

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