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Rob
ust
Low
Power
VLSI
Selecting the Right Conference for the BSN FIR Filter Paper
Alicia Klinefelter November 13, 2011
Rob
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VLSI 2
Motivation FIR design competitive
Lowest in power and energy
No paper yet Need to find conference Should choose right venue for work
Multivariate optimization
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Outline Appropriateness Criteria FIR Design Characteristics Conference Descriptions
CICC ISLPED VLSI
Comparison
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Conference Criteria1. Conference Prestige2. 2012 Special Topics3. Impact/Novelty4. Probability of Acceptance5. Deadline6. Text Requirement7. Figures8. Location
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Design Characteristics
Programmable, Sub-threshold, and four-channel FIR Filter Lowest in power and energy
This Work [1] [2] [3]
Design Type 30-tap, 8-bit FIR 8-tap 8x8 FIR 14-tap 8x8 FIR 8-tap, 8-bit FIR
Number of Channels 4 1 1 1
Technology 0.13μm 0.13μm 0.13μm 0.13μm
Supply Voltage 0.4V 0.32V 0.36V 0.6V
Operating Frequency 200kHz 23MHz 187MHz 24kHz
Power Dissipation 219nW 56uW 5.9mW 87uW
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Design Characteristics Pros
Flexibility/Programmability Low power, sub-threshold Synthesizeable
Cons Circuit-level techniques
Available figures1. ED Curves2. Architecture3. Frequency Response
a) 15, 30, 60 taps4. Filtered Data5. Comparison Table6. Die Photo and Operation
Summary
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CICC IEEE Custom Integrated Circuits Conference Relevant Topics
Location: San Jose, CA Deadline: April 7, 2012 Conference: September 9th – 12th Text: 4 pages
1. Analog Circuit Design2. Systems on Chip and 3D3. Memory4. Biomedical, Actuators, MEMS, and Sensors5. IC Manufacturing
6. Power Management7. Simulation and Modeling8. Test, Debug, and Reliability9. Wired Communications10. Wireless Designs
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ISLPED International Symposium on Low Power
Electronics and Design Relevant Topics
Location: Redondo Beach, CA Deadline: March 9, 2012 Conference: July 30th – Aug. 1st Text: 6 pages
1. Architecture, Circuits, and Technology1.1. Technologies and Digital Circuits1.2. Logic and Microarchitecture Design1.3. Analog, MEMS, Mixed Signal and Imaging Electronics
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VLSI Symposium VLSI Technology/Circuit Symposium Relevant Topics
Location: Honolulu, HI Deadline: January 23, 2012 Conference: June 12th – 15th Text and Figures: 2 pages
1. RF and wireless communication2. Wireline transceiver and I/O design3. Digital circuit techniques for processor, memory, and complex SOC
architectures and implementations4. Clock generation and distribution5. Analog and mixed signal6. …
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Location
Tradeoff Flying is not fun: Hawaii >> California
VLSIHonolulu, HI4800 mi
CICCSan Jose, CA2400 mi
ISLPEDRedondo Beach, CA2200 mi
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ComparisonVLSI CICC ISLPED
Prestige Factor 1 2 3
Topics? Available Not Really Available
Design Impact Mid-High High Mid-High
Probability Accept 3 2 1
Deadline January 23, 2012 April 7, 2012 March 9, 2012
Text ~1 page ~3 pages ~5 pages
Figures ~1 page ~1 page ~1 page
Location 1 2 3
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Conclusions VLSI
Prestigious, competitive Topic available Paper is best so far Appropriate for length Less Appropriate for figures Few circuit-level techniques Great location
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References [1] Myeong-Eun Hwang; Raychowdhury, A.; Keejong Kim; Roy, K.; , "A
85mV 40nW Process-Tolerant Subthreshold 8x8 FIR Filter in 130nm Technology," VLSI Circuits, 2007 IEEE Symposium on , vol., no., pp.154-155, 14-16 June 2007.
[2] Wei-Hsiang Ma; Kao, J.C.; Sathe, V.S.; Papaefthymiou, M.C.; , "187 MHz Subthreshold-Supply Charge-Recovery FIR," Solid-State Circuits, IEEE Journal of , vol.45, no.4, pp.793-803, April 2010.
[3] Yu-Ting Kuo; Tay-Jyi Lin; Yueh-Tai Li; Chih-Wei Liu; , "Design and Implementation of Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids," Circuits and Systems I: Regular Papers, IEEE Transactions on , vol.57, no.7, pp.1684-1696, July 2010
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Questions?
