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 Task II: ADC and DAC interfacing using 8051 Microcontroller AIM/OBJECTIVE: To verify the analog to digital conversion as well as digital to analog conversion of both C s!""ly and #in!soidal s!""ly !sing AC $%$% and AC $%$%& E'(I)ME*T +E'(I+E: ,ive -. oh +esistors Three 0$. oh resistors One AC $%$% One AT%1C-0 One Ca" $&0!, One AC $%$% Two O"A"s 2,3-0 #O,T4A+E (#E: )rote!s I#I# )rofessional .eil !Vision 5 #(MMA+6 O* ATA#7EET:  ADC 0808: The AC$%$% is a data ac8!isition co"onent device with a % bit analog to digital converter9 % channel !lti"leer co"atible with %$-0 icrocontroller& It !ses s!ccessive a""roiation as the conversion techni8!e& The ai! s!""ly voltage sho!ld not eceed ;&-V and the ai! voltage at individ!al "ins sho!ld not eceed <$&3V to Vcc=$&3V& #torage te"erat!re sho!ld not eceed ore than 0-$ degrees Celsi!s& O"erating te"erat!re range is fro <5$ degree Celsi!s to %- degrees Celsi!s& +ange of Vcc is fro 5&-Vdc to ;&$Vdc&  DAC 0808: This %<bit IC converts a digital signal to an analog signal& The "ower s!""ly voltage range varies fro =<5&-V to =<0%V& O"erating te"erat!re is $ to >- degrees Celsi!s& O!t"!t c!rrent range is between ?&0A to 5&?A& T7EO+6: AC $%$% has % bit in"!t channel and % o!t"!t bits& Therefore we get a resol!tion of @0/? % fro this chi"& There are 3 se"arate channel selection "ins to select a "artic!lar signal for conversion& 7ence9 at a tie % signals can be connected to the IC for conversion& A"art fro the in"!t channels9 in"!t channel selectors and o!t"!t "ins9 there are 5 ain i"ortant "ins #C @#tart conversion9 EOC @End of conversion9 OE@O!t"!t Enable and A2E@Address 2atch Enable& The ste"s for conversion are as follows& ,irstly9 the A2E "in is an i"ortant "in as it is !sed to latch the in"!t channel address after it !ndergoes a low to high transition& After the A2E "in is set9 #C "in is given a high "!lse& By 1 | Page

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Task II: ADC and DAC interfacing using 8051 Microcontroller

AIM/OBJECTIVE:

To verify the analog to digital conversion as well as digital to analog conversion of both C s!""ly and #in!soidal

s!""ly !sing AC $%$% and AC $%$%&

E'(I)ME*T +E'(I+E:

• ,ive -. oh +esistors

• Three 0$. oh resistors

• One AC $%$%

• One AT%1C-0

• One Ca" $&0!,

• One AC $%$%

• Two O"A"s 2,3-0

#O,T4A+E (#E:

• )rote!s I#I# )rofessional

• .eil !Vision 5

#(MMA+6 O* ATA#7EET:

 ADC 0808: The AC$%$% is a data ac8!isition co"onent device with a % bit analog to digital converter9 % channel

!lti"leer co"atible with %$-0 icrocontroller& It !ses s!ccessive a""roiation as the conversion techni8!e&

The ai! s!""ly voltage sho!ld not eceed ;&-V and the ai! voltage at individ!al "ins sho!ld not

eceed <$&3V to Vcc=$&3V& #torage te"erat!re sho!ld not eceed ore than 0-$ degrees Celsi!s& O"eratingte"erat!re range is fro <5$ degree Celsi!s to %- degrees Celsi!s& +ange of Vcc is fro 5&-Vdc to ;&$Vdc&

 DAC 0808: This %<bit IC converts a digital signal to an analog signal& The "ower s!""ly voltage range varies fro

=<5&-V to =<0%V& O"erating te"erat!re is $ to >- degrees Celsi!s& O!t"!t c!rrent range is between ?&0A to

5&?A&

T7EO+6:

AC $%$% has % bit in"!t channel and % o!t"!t bits& Therefore we get a resol!tion of @0/?% fro this chi"& There are

3 se"arate channel selection "ins to select a "artic!lar signal for conversion& 7ence9 at a tie % signals can be

connected to the IC for conversion& A"art fro the in"!t channels9 in"!t channel selectors and o!t"!t "ins9 there are

5 ain i"ortant "ins #C @#tart conversion9 EOC @End of conversion9 OE@O!t"!t Enable and A2E@Address

2atch Enable&

The ste"s for conversion are as follows& ,irstly9 the A2E "in is an i"ortant "in as it is !sed to latch the in"!t

channel address after it !ndergoes a low to high transition& After the A2E "in is set9 #C "in is given a high "!lse& By

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the tie conversion starts9 A2E "in is rest again& After the start of conversion9 EOC "in is contin!o!sly onitored to

chec if it goes low& Doing 2ow eans end of conversion and the o!t"!t is ready to be read by the icrocontroller&

A "ro"er delay is given till the EOC "in gets set again so that it can bloc other data in line before the c!rrent data

gets read& *ow9 the OE "in is given low to high transition to read the o!t"!t data and hence the conversion gets

co"leted and the cycle re"eats itself&

Figure 1 : Timing Diagram for ADC

Figure 2: ADC Chip

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Figure 3: DAC Chip

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A AC chi" generally !ses a +/?+ ethod for converting

digital signals to analog& AC$%$% is a % bit chi" hence a resol!tion level of ? % is obtained& #ince the o!t"!t of a

AC$%$% is c!rrent b!t we re8!ire voltage o!t"!t9 the c!rrent is allowed to "ass thro!gh an inverting o"<a"

config!ration to get the desired o!t"!t in analog for&

Figure 4: DAC connection with OpAmp

)+OCE(+E:

• )rote!s I#I# software was started and a new "roect was started&

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• Co"onents lie AC $%$%9 AC$%$%9 resistors9 ca"acitors9 O"A"s9 2E and oscillosco"e were

connected&

• The code was ebedded in the icrocontroller and connections were ade between AC9 AC and

%$-0!C&

• #in!soidal s!""ly was given at channel 0V C at channel >9 ?&-V C at channel 5 and -V C at channel $

of the AC $%$%&

• The o!t"!t of the AC was observed on the Oscillosco"e&

•  *ow9 to observe the AC o"eration9 the o!t"!t of the AC was connected to the in"!t of AC&

• A# the o!t"!t of AC$%$% is c!rrent9 an inverting o"a" circ!it was connected to get voltage o!t"!t&

• The o!t"!t was connected to the virt!al oscillosco"e and observed&

)+OD+AM:

ALE BIT P2.4

OE BIT P2.5

SC BIT P2.6

EOC BIT P2.7

ADDR_A BIT P2.0

ADDR_B BIT P2.1

ADDR_C BIT P2.2

CLK_PIN BIT P2.3

SWITCH_PIN BIT P3.7

DATAPORT EQ P1

RESET!

OR" 0H # RESET ISR

L$%P INITIALI&E

OR" 0BH#

 TI%ER0 ISR

CPL CLK_PIN #'()*+e)e,- -e '+('/ ge,ea-( *,

RETI # e-, '(,-(+ () -e ,-e*- -( '(,-,e - -e ,e- ,-'-(,

INITIALI&E!

OR" 50H # SKIP -e ,-e*- e'-( -a8+e 9' e-e,: -++ 23 ( ;051

%O< DATAPORT9=0>>H

SETB SWITCH_PIN # %AKE SWITCH_PIN AN INPT

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 $NB SWITCH_PIN9ENABLE_INTERRPT_CLK # I> SWITCH_PIN?0 THEN ENABLE TI%ER0 INTERRPT ELSE %ANAL CLK 

%O< R79=1 # %AKE R7 &ERO TO "ENERATE CLK B@ TI%ER0 INTERRPT %ETHODAND NON&ERO TO "EN B@ POLLIN" %ETHOD

S$%P SETP_ETRA

ENABLE_INTERRPT_CLK! %O< R79=0

SETP_ETRA!ACALL SETP_SER_AND_CLOCK_"EN

%O< DPTR9=CREDITS_TET #SHOW CREDITSACALL SEND_LINE

SER_LO"IN!%O< DPTR9=ASKLO"IN

ACALL SEND_LINE

ACALL RC<_LINE

ACALL PRINT_>RO%_RA%

%O< DPTR9=SCREWIT

ACALL %ATCH_TET

 $& "EST_LO"IN

ISAPASS!%O< DPTR9=ASKPASS

ACALL SEND_LINE

ACALL RC<_LINE

%O< DPTR9=SCREWIT

ACALL %ATCH_TET

 $N& %AIN

S$%P SER_LO"IN

"EST_LO"IN!%O< DPTR9="ESTNA%E

ACALL %ATCH_TET

 $& LO"INERROR

%O< DPTR9=ASKPASS

ACALL SEND_LINE

ACALL RC<_LINE

%O< DPTR9="ESTPW

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ACALL %ATCH_TET

 $N& %AIN

LO"INERROR!%O< A9=13

  ACALL SEND_CHAR

  %O< DPTR9=LO"IN>AILED

  ACALL SEND_LINE

  S$%P SER_LO"IN#ACALL CON<ERT_N%BER_TO_CHARS_AND_SEND

%AIN!

%O< A9=13

ACALL SEND_CHAR

%O< DPTR9=ATHOR

ACALL SEND_LINE

%AIN_LOOP!

# e-',g -e 'a,,e+ -( ea: () -e -e),a+

%O< DPTR9=SEL_CH_TET # a/ ( 'a,,e+

ACALL SEND_LINE

ACALL RC<_CHAR #ge- -e 'a,,e+ ,)8e

ACALL SEND_CHAR #e'( -e 'a,,e+ ,)8e

%O< R09A #)(e -e e'ee: 'a ,-( 0 +e a -++ (+: -e e'ee: 'a

%O< A9=13 #+(a: a - a' ( 'aage e-, .e 13

ACALL SEND_CHAR #)(e -( ,e- +,e (, -e -e),a+

%O< DPTR9=ENTERED_CH_TET

ACALL SEND_LINE

#e--,g -e 'a,,e+ a::e

%O< A9R0 #NOTE THAT R0 CONTAINS THE ASCII <ALE O> THE CHANNEL N%BERe! 'a,,e+ e+e'-e: 0( a 0FFG 9-e, R0 ? 4;( 4;J

CLR C # THIS IS NEEDED AS I> CARR@>LA" IS SET 9 THE >INAL ANSWER ISSBTRACTED B@ ONE.e A -e ,(. -a- 8e,g 8-a'-e: 1

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# CALLINT THE PRINT_>RO%_RA% ROTINE RAISES THE CARR@>LA"8e'ae - e-, e, A?0 a,: A?0 ae 'a ag 9 SO WE %ANALL@ CLEAR IT

#BT WHATE<ER %I"HT BE THE REASON 9 WE %ST ALWA@S %ANALL@CLEAR THE CARR@>LA" BE>ORE SBTRACTION

SBB A9=0 #ge- -e eg-e A -( ge- -e ,)e' a+e ( -e 'a,,e+ e+e'-e: . IESBTRACT 0OR ASCII 4; >RO% IT

ACALL SET_ADC_ADDR

AC_READ!ACALL READ_ADC

# a- - *(,- e ae -e ADC a+e , -e A'')+a-( A 9 ( e M- e,: - -( -e

-e),a+ 8- a-e '(,e-,g -

# :g- ,-( -e '(e*(,:,g 'aa'-e

ACALL CON<ERT_N%BER_TO_CHARS_AND_SEND

#WAIT_!S$%P WAIT_

S$%P %AIN_LOOP

S$%P AC_READ

CON<ERT_N%BER_TO_CHARS_AND_SEND!

#%O< R09A #%AKE SRE THAT R0 IS NOT IN SE B@ THIS TI%E AND THAT ACONTAINS THE N%BER TO BE CON<ERTED AND SENT STORE THE <ALE O> A IN R0 >OR>RTHER SE

%O< B9=100

DI< AB# QOTIENT IN A AND RE%AINDER IN B 9 a- - *(,- A '(,-a, -e,:e:- *+a'e >ACE a+e a,: B -e e)a,:e

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ADD A9=0 # CON<ERT THE <ALE IN A INTO THE CORRESPONDIN" ASCIICHARACTER

ACALL SEND_CHAR # SEND THE ,:e:- *+a'e a'e<a+e(-e,- -(-e),a+e -e (-e,-9 ' *ee,- , A a- - *(,- ( -)e.

%O< A9B # %O<E THE RE%AINDER >RO% B TO A

%O< B9=10

DI< AB # A '(,-a, TENTH *+a'e >a'e<a+e a,: B -e e)a,:e' a+( -e (,e *+a'e >ACE<ALE

ADD A9=0

ACALL SEND_CHAR

%O< A9B # %O<E THE RE%AINDER' (,e *+a'e INTO A

ADD A9=0

ACALL SEND_CHAR

%O< A9=13 # WRITE a' O> CARRIA"E RETRN INTO A AND SEND IT TWICE

ACALL SEND_CHAR

ACALL SEND_CHAR

RET

SET_ADC_ADDR!

%O< P29A

# Re,-a+e -e '(,-(+ *, (, *(-2 +/e EOC9ALE9SC a,: (' a -e )g- ae8ee, (e--e, 8 -e a8(e -a-e)e,-

SETB EOC

CLR ALE

CLR SC

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CLR OE

# Re,-a+a-(, '()*+e-e

ACALL DELA@

ACALL "EN_CLK_%ANALL@

RET

READ_ADC!

SETB ALE

ACALL DELA@

SETB SC

ACALL DELA@

CLR ALE

CLR SC

C$NE R79=09B@PASS2%AN_"EN # I> R7??0 THEN CLK >RO% TI%ER0 INTERRPT 9ELSE CALL "EN_CKL_%ANALL@

WAIT2EOC_LOW!$B EOC9 WAIT2EOC_LOW

WAIT2EOC_HI"H!$NB EOC9WAIT2EOC_HI"H

S$%P B@PASS2OTPT # SKIP %ANAL "ENERATION O> CLOCK 

B@PASS2%AN_"EN!ACALL "EN_CLK_%ANALL@

B@PASS2OTPT!SETB OE

ACALL DELA@

%O< A9DATAPORT

#CLR OE # CLEAR IT TO NLATCH THE ADC DATA >RO% THE OT PORT AT THEEND

RET

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DELA@!

%O< R39=255

HERE2DELA@!

NOP

NOP

NOP

NOP

NOP

D$N& R39HERE2DELA@

RET

DELA@2!

%O< R29=100

HERE2DELA@2!

ACALL DELA@

D$N& R29HERE2DELA@2

RET

SETP_SER_AND_CLOCK_"EN!

%O< T%OD9=22H #TI%ER1 %ODE2( ea+ a,: TI%ER0 %ODE2a-(e+(a:)(:e ( ge,ea-,g '+('/ ( 10KH ( ADC 0;0;

#SET TI%ER1 CON>I".e: ( ea+ '()).

%O< TH19=3 # G600 BAD

%O< SCON9=50H # ;8- 9 1-(* 8- 9 RECEI<E ENABLED

SETB TR1

CLR RI # '+ea RI ( -e 1- e'e*-(,

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# SET TI%ER0 CON>I".e: ( -)e ,-e*- -( ge,ea-e 10KH ( ADC0;0;

# TAKE 11.05G2%H& APPROTAL ? 12 %H

# CLOCK >OR TI%ER ? TAL12 ? 12%H12 ? 1%H

# DI<IDIN" >ACTOR ? 1%H 10 KH ? 100

# SO WE NEED TO HA<E ONE CLOCK C@CLE .e (,e aeae IN 100CLOCK C@CLES O> TI%ER0

# IN ONE CLOCK [email protected] (,e aeae 9 WE NEED TO TO""LE a PIN TWICE TO "ENERATE THE CO%PLETE SQAREWA<E

# SO WE %ST TO""LE THE PIN IN E<ER@ 50 CLOCK C@CLES O> TI%ER0

# <ALE TO BE LOADED INTO TH0WHICH ATORELOADS TL0 ? 256 50 ?206a+-e,a-e+ e 'a, ge 50

C$NE R79=09B@PASS_SSAC" # I> R7 ? 0 ENABLE TI%ER0 INTERRPT >OR CLK "EN. ELSE SKIP

%O< TH09=50

SETB TR0 # START THE TI%ER0

SETB EA #ENABLE "LOBAL INTERRPT >LA" EA IN IE RE"ISTER

>OR ENABLIN" ACCESS TO INTERRPTS

SETB ET0 #ENABLE TI%ER0 INTERRPT

B@PASS_SSAC"!RET

"EN_CLK_%ANALL@!

%O< R69254 #"ENERATE 1272 +((* ( (,e '+OCK *+e F e,'e 2542 ?127 CLK PLSES

REPEAT_CLK!%O< TH09=50

SETB TR0

WAIT2TI%ER0>LA"!$NB T>09WAIT2TI%ER0>LA"

CLR T>0#CLEAR TI%ER0 O<ER>LOW >LA"

CPL CLK_PIN # TO""LE CLOCK PIN

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D$N& R69REPEAT_CLK 

RET

SEND_CHAR!

%O< SB>9A

WAIT2SEND!$NB TI9WAIT2SEND

CLR TI

RET

RC<_CHAR!

WAIT2RC<!$NB RI9WAIT2RC<

%O< A9SB>

CLR RI

RET

SEND_LINE!

CLR A

%O<C A9AJDPTR

ACALL SEND_CHAR

INC DPTR

 $N& SEND_LINE

RET

#SEL_CH!

#%O< DPTR9=SEL_CH_TET

#ACALL SEND_LINE

#RET

RC<_LINE!

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%O< R19=30H# RA% +('a-(, 30H -( 7>H-(-a+ ? 7>H 30H ? 4>H ? 7G 8-eae aa+a8+e a *+a'e -( ae 8-e e: :a-a

#ONL@ R1 AND R0 CAN BE SED AS POINTERS 9 AS WEHA<E ALREAD@ SED R0 9 HERE WE SE R1 >OR BEIN" ON THE SA>E SIDE

RC<_A"AIN!ACALL RC<_CHAR

C$NE A9=139STORE_CHAR #I> ENTER IS HITI.E WE RECEI<E CARRIA"ERETRN ( ASCII 13 9 THEN EIT ELSE STORE THE CHAR

%O< R19=0 # PT NLL CHARACTER IN THE LOCATION

RET

STORE_CHAR!%O< R19A

INC R1

C$NE R19=;0H9RC<_A"AIN # WE %ST NOT "O BE@OND RA% ADDRESS 7>HAS IT CONTAINS S>R

RET

PRINT_>RO%_RA%!

%O< R19=30H# RA% +('a-(, 30H -( 7>H-(-a+ ? 7>H 30H ? 4>H ? 7G 8-eae aa+a8+e a *+a'e -( ae 8-e e: :a-a

#ONL@ R1 AND R0 CAN BE SED AS POINTERS 9 AS WE

HA<E ALREAD@ SED R0 9 HERE WE SE R1 >OR BEIN" ON THE SA>E SIDEPRINT_A"AIN!%O< A9R1

 $N& PRINT_CHAR # I> READ B@TE IN A ?? 0NLL CHARACTER THEN STOPAS IT INDICATES END O> STRIN"

RET

PRINT_CHAR!ACALL SEND_CHAR

INC R1

C$NE R19=;0H9PRINT_A"AIN #WE %ST NOT "O BE@OND RA% ADDRESS 7>HAS IT CONTAINS S>R

RET

%ATCH_TET!

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%O< R19=30H# RA% +('a-(, 30H -( 7>H-(-a+ ? 7>H 30H ? 4>H ? 7G 8-eae aa+a8+e a *+a'e -( ae 8-e e: :a-a

#ONL@ R1 AND R0 CAN BE SED AS POINTERS 9 AS WEHA<E ALREAD@ SED R0 9 HERE WE SE R1 >OR BEIN" ON THE SA>E SIDE

#%O< DPTR9=SCREWIT

CO%PARE!CLR A

%O<C A9AJDPTR

 $& %ATCH_PASSED

%O< R59A

%O< A9R1

C$NE A905H9%ATCH_>AILED # WE CANT PASS R5 TO C$NE BT WE CAN PASSITS ADDRESS WHICH IS 05H

INC DPTR

INC R1

S$%P CO%PARE

%ATCH_PASSED!%O< A9=1

RET

%ATCH_>AILED!%O< A9=0

RET

CREDITS_TET ! DB UU(/e+aUNa-(,a+ I,---e O Te',(+(gUU ae,e91391390

SEL_CH_TET ! DB Se+e'- ADC Ca,,e+! 90 # CARRIA"E RETRN ASCII?13

ENTERED_CH_TET ! DB Ca,,e+ ADC Rea:,g! 90

END

+E#(2T#:

Circ!it:

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Figure 5 : ADC # DAC Circuit

O!t"!t 4hen #in!soidally ecited

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Figure 6: Channe$1%&nput' Channe$ 2%DAC Output

4hen C ecited

Figure 7: DC output

CO*C2(#IO*:

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A C as well as #in!soidal in"!t signal was s!ccessf!lly converted to a digital o!t"!t !sing a AC$%$% chi"& The

res!lt was verified !sing a virt!al oscillosco"e9 The o!t"!t fro the AC was taen as an in"!t for the AC and it

was verified that a corres"onding Analog signal was obtained at the o!t"!t of a AC chi"&

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