Re-examination of PQ Standards, Mark Stephens – EPRI

NYSDPS Power Quality Technical Conference

December 12, 2013

Re-examination of PQ Standards, Mark Stephens – EPRI

2© 2013 Electric Power Research Institute, Inc. All rights reserved.

NYSDPS Power Quality Technical Conference 12/12/2013

Original EPRI R&D Project (1996-2000)

• In 1996 EPRI Began “Task 24: Power Quality in the Semiconductor Industry”

• Original Participants:

Original

Task 24 Testing



Original R&D Project Timeline

Mid 1996

Feb 1999T24 Final Report

April 97Workshop 1

Dallas

Sept 97Workshop 2

Tempe

June 98Workshop 3

Dallas

April 99Workshop 4

Tempe

June 97

Task 24 Research and Testing

Nov 1998

33 Tools TestedBy EPRI PEAC

Oct 97

Oct 97Approval forTask Force

By SEMI

Sept 99SEMI F47 Published

June 2000SEMI F42

AndSEMI F47Revisions

June 99Test Methodology

SEMI F42Published

SEMI Task Force Standards Work



SEMI F47-0706 Test Levels

Relevant for Single and Two Phase Voltage Sags Only – does not address

Three-Phase Events.



The Question Remains…

• Previous EPRI studies have shown that SEMI F47 has made an impact on reducing fab downtime.

• However, there are still PQ events above the SEMI F47 requirements that are causing downtime in semiconductor fabs.

•WHY?



New EPRI Research Projectto Re-Examine SEMI F47

• Understand electric service quality requirements.

• Identify post SEMI F47 mechanisms for continued semiconductor processing equipment downtime through industry collaboration.

• Determine key strategies and methodologies to further harden semiconductor equipment to power quality events.

• Inform development of revised standards, equipment designs, power system requirements, and PQ testing methodologies for current and next generation semiconductor tools.

• Improve productivity through minimizing production downtime.



Example Utility PQ Data at Semiconductor Plant

• 72 Sag Events• 38 Diff. Days• 16 Events affected

production,– Only 1 clearly

below SEMI F47!

1 10 100 1000 100000

0.5

1

1.5

2

Cycles

No

min

al

Vo

lta

ge

(x

10

0%

)

SEMI F47

VoltageSag



Objectives

•The key objectives of this project are:–Determine the characteristics of power quality

events still causing semiconductor plant process downtime

–Take a new look at the sensitivities in the process equipment

–Determine any required adjustments to equipment design or standards to further reduce voltage sag induced losses by the semiconductor industry.



Benefits (1)

• Utility Collaborators will gain information about the characterization of a broad spectrum of equipment and fabrication tools, which will enable them to evaluate industry expectations in the context of the service capabilities of electric power systems.

• Utility Host-Collaborators will work closely with partnering Semiconductor Site-Hosts to gain specific understanding of the needs and expectations of their customer.



Benefits (2)

• Semiconductor Site-Hosts will gain an in-depth understanding of why their equipment is still sensitive to specific power quality events and learn specific measures that can be taken to further harden their current and future process systems.

• Equipment and Tool Manufacturers will gain a better understanding of why their equipment may still be vulnerable to power quality issues and methods for improving their power quality robustness.



Stakeholder Collaboration

System Compatibility

Electric Utilities*

Tool Suppliers/ OEMs

SEMI & SEMATECH

EPRI

Consultants

Semi Fabs Site-Hosts

• Collaboration between stakeholders will be required.

• Project approach is to

carefully examine the cause of PQ related downtime

• The outcome of basic R&D will inform processes and standards to further improve system compatibility

*Utilities can participate as Collaborators or Host-Collaborators.



Project Approach and Summary (1)

• This project will methodically investigate the potential factors that continue to cause semiconductor plant downtime in a post-SEMI F47 environment.

• These factors may include: – (1) three-phase voltage sag events– (2) repeated voltage sag events due to recloser operations– (3) events outside SEMI F47 scope of magnitude, duration, phase-shift

or point-on-wave– (4) voltage sag testing methods utilized during certification, tool

software, design, or configuration differences– (5) electrical system differences between the certification environment

and the actual fab environment. – (6) Equipment not certified to SEMI F47




• Working through EPRI, Utility Host-Collaborators will partner with a specific Semiconductor Site-Hosts to investigate SEMI F47 requirements against specific site electrical environments and identify potential gaps against tool shutdown data.

• SEMI F47 certification documents will be reviewed for the sensitive tool sets and characterization of this equipment will be accomplished through additional analysis and testing.

• Specific design and mitigation strategies including cost-benefit will be determined and documented.




• The general, non-confidential findings from these partnerships will help inform the overall collaborative effort through workshops, white papers, and the final report.

• Utility Collaborators will participate in the overall effort through participation in project web-meeting and workshops, inclusion in engagement with SEMI and SEMATECH, and involvement in any proposed standards modifications.



Research Project Tasks

Task Activity Plan1 Document the Electrical System Environment of the Semiconductor fab. 2 Identify gaps and opportunities for creating a successor to the current SEMI F47

standard that addresses the electrical environment for known equipment shutdowns.3 Review SEMI F47 certification documents for sensitive tool sets.4 Determine the susceptibility of the current tool sets .5 Indentify effective design and mitigation strategies. 6 Perform Cost-Benefit Analysis7 Provide Technical Materials for Host Site (Reporting, Findings, Recommendations)8 Write White Paper on Initial Findings.9 Collaborative Workshop No. 1

10 Propose modification to existing SEMI F47 performance criteria as necessary as identified by the previous tasks.

11 Develop and Validate Test Methods to Confirm that Tools Meet proposed Power Quality and Ride-Through Requirements.

12 Suggest Revisions to SEMI 49 “Review Guide for Semiconductor Factory Voltage Sag Immunity”

13 Suggest Revisions to SEMI F50 “Performance Guidelines for Power Supplied to Semiconductor Factories by utilities”

14 Perform a gap analysis to determine the potential reduction in power quality related costs.

15 Collaborative Workshop No. 216 Technical Transfer Documentation and Reporting

Specific R&D Activities at

each Host-Site

Collaborative Activities

Technical Deep Dive Slides…



Potential Causes for Downtime (1)

Three-Phase voltage sag events.– SEMI F47 does not require the OEM to test their equipment against

three phase voltage sags events– CIGRE study (C4.110) has shown that three-phase (Type III) events

can make up to 20 percent of the events that occur

Sites Voltage range

Number of sites

Single-phase (Type

I)

Two-phase (Type II)

Three-phase (Type III)

MV & HV Sites

6 kV – 230 kV 969 27% 53% 20%

Sites <1KV 206 64% 25% 11%




Repeat voltage sag events– Reclosing to restore operations.– SEMI F47 does not require testing

for back to back events – Sag events can be multiple events

in close intervals based on fault clearing

Faulted Feeder “A”

Adjacent Feeder “B”

Line to Ground

FaultProtectiveRelays

(reclosers)

Su

bst

atio

n B

us

TD 1 TD 2

Initial Fault

Reclose Attempt 2

TD 3

Reclose Attempt 3

Reclose Attempt 1

Time

RM

S V

olt

age

TD 1 TD 2

From Initial FaultReclose

Attempt 2

TD 3

Reclose Attempt 3

Reclose Attempt 1

Sag Event Sag Event Sag Event Sag Event

Time

RM

S V

olt

age

Adjacent Feeder “B”

Faulted Feeder “A”




Event magnitude, duration, phase-shift, and point-on-wave are outside of SEMI F47 scope

– SEMI F47 calls for testing at 0 degree point-on-wave.• Actual events can occur at various

points-on-wave– Possible Phase-shifts are based on

set of test vectors.• Actual events can be different

– Minimum magnitudes and durations are:• 50% Vnom, 200ms• 70% Vnom, 500ms• 80% Vnom, 1 Second




Voltage sag testing methods utilized during certification. – There are three types of phase-to-phase voltage sag test vectors

that are allowed for SEMI F47 testing. – These three types of vectors result in various voltage magnitudes

and phase shifts.




Tool Software, design, or configuration differences

– The tool configuration and

software during SEMI F47 testing may have been slightly different than the equipment that is installed at the semiconductor fab’s facility.

Graphic Ref: SEMI F49 “Guide for Semiconductor Factory Voltage Sag

Immunity””




Electrical System Differences

– During SEMI F47 certification

testing, the equipment is tested against the nominal voltage available at the site.

– The available nominal and peak voltage at the point of connection at the semiconductor fab can change due to changes to the system configuration.

0%

10%

20%

30%

40%

50%

60%

70%

80%

90%

100%

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Pre

-sa

g A

ctu

al V

olta

ge

(%)

Energy Loss (%)

The Lower the Pre-Sag Voltage, the Less Energy (and ride-through time)Is Available in the Components with Capacitors




Installed Equipment In the Fab is not Compliant to SEMI F47

• Equipment in the factory may not

actually be compliant to power quality standards such as SEMI F47.

• In procurement, tool capabilities and delivery schedule may trump testing for SEMI F47 compliance

REF: Impact of SEMI F47 on Utilities and Their Customers, EPRI, Palo Alto, CA: 2004. 1002284.

Documents

Re-examination of PQ Standards, Mark Stephens – EPRI