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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8711 0.1
Block Diagrams
Custom
1 57Sunday, November 27, 2011
2011/06/29 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8711 0.1
Block Diagrams
Custom
1 57Sunday, November 27, 2011
2011/06/29 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8711 0.1
Block Diagrams
Custom
1 57Sunday, November 27, 2011
2011/06/29 2011/06/29
Compal Electronics, Inc.
Intel Ivy Bridge Processor with DDRIII + Panther Point
PAGANI M/B Schematics Document
Compal Confidential
Date : 2011/11/22 Version 0.1
http://www.rosefix.com
A
A
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B
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C
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1 1
2 2
3 3
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8711 0.1
Block Diagrams
Custom
2 57Sunday, November 27, 2011
2011/06/29 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8711 0.1
Block Diagrams
Custom
2 57Sunday, November 27, 2011
2011/06/29 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8711 0.1
Block Diagrams
Custom
2 57Sunday, November 27, 2011
2011/06/29 2011/06/29
Compal Electronics, Inc.
2011/11/22
Model Name : Zonda
File Name : LA8711P
Compal Confidential
USB 2.0 x1
X1
X1
BANK 0, 1, 2, 3DDR3-SO-DIMM X 2
DDR3 1333/1600MHz 1.5V
DDR3L 1333MHz 1.35V
Dual Channel
ENE KB932
X1
X1
X1
JMINI1
Accelerometer
FAN conn.
SPK conn HP Amp
HPA00929
Card Reader
/LAN controller
RTL8411
HP&MIC
Combo jack
100MHz
100MHz
HDMI Conn.
LVDS(1Ch)
HDMI
PS2 SPI
LVDS Conn. 100MHz
33MHz
100MHz
5GT/s
DMI x4FDI x8
SPIGEN3 6Gb/S
PCI-Express x 2 (PCIE2.0 5GT/s)
2.7GT/s
Touch Pad
LPC BUS
SV Processor
Int.KBD
IDT 92HD91
IVY BridgeIntel
EC ROM,
256kB
HDA Codec
PCH HD Audio
rPGA 988B
Intel
BIOS SPI ROM,
8MB
USB 2.0 x4
m-SATA
(mini card)
989pin BGA
WLAN&BT
(mini card)
SD socket
SATA HDD
X1
SATAx3
JMINI2
USB3.0 x2
X2
USB 3.0 x3
31mm*24mm
Panther Point
25mm*25mm
RTC CKT.
DC/DC interface CKT.
HP3DC2
HD webcam
PEG 2.0 x16AMD
Chelsea Pro128Bit
64Mx16
VRAMx8pcsDDRIII
Sub Woofer Amp
HPA2011
Sub Woofer
conn
RJ45
Lid switch FAN/LED
D-MIC(daul)
USB2.0 x1
USB chargerX1
port0port1
3.0 port1,2
port9
Daughter board
port1
port 10
port2
port8
128Mx16
3.0 port3USB3.0 x1
X1
port2
SATA ODD
X1 Finger print
port3
X1
ModuleModule
HDD LED & PWR LED
Daughter board
ODD connector board
& PWR BTN LED
Power On/Off CKT.
Daughter board
GEN1 1.5Gb/S GEN3 6Gb/S
SM bus
25W
LED
CRT
TP BTN on daughter board
page33 page33 page33page34
page34 page34
page42
page37
page29 page32
page27 ~ 29page21 ~ 26
page4 ~ 10
page13 ~ 20
page36
page37
page14
page30
page43
page33
page38
page11 ~ 12
page35
page41
page39
page40
page41
page35
page36 page37page37page37
page31
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Notes List
C
3 57Sunday, November 27, 2011
2011/11/02 2011/11/02
Compal Electronics, Inc.
LA-8711
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Notes List
C
3 57Sunday, November 27, 2011
2011/11/02 2011/11/02
Compal Electronics, Inc.
LA-8711
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Notes List
C
3 57Sunday, November 27, 2011
2011/11/02 2011/11/02
Compal Electronics, Inc.
LA-8711
USB 2.0 USB 1.1 Port1 ExternalUSB Port
Camera
USB2.0 FRP
0
1
2
3
4
5
6
7
8
9
10
11
12
13
UHCI0
UHCI1
UHCI2
UHCI3
UHCI4
UHCI5
UHCI6
EHCI1
EHCI2
USB Port Table
ON OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+1.8VS (+5VALW ) to 1.8V switched power rail to PCH
+3VS
+5VALW
+3VALW +3VALW always on power rail
+VSB B+ to +VSB always on power rail for sequence control ON ON*
ONON
ON
ON
EC SM Bus1 address
Device
OFF
DDR DIMM0 1010 0000b
+1.5VS switched power rail
+CPU_CORE
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
PCH SM Bus address
Device Address
Address
Address
Voltage Rails
VIN
B+
+1.05VS_VCCP
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
+V1.05SP to +1.05VS_VCCP switched power rail for CPU
ON
OFF
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON
ON
ON ON*
OFF
OFF
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
ON ON*
+3V_PCH
+LAN_VDD_3V3
+3VALW to +3V_PCH power rail for PCH (Short Jumper)
+3VALW to +LAN_VDD_3V3 power rail for LAN
ON ON
ON ON
S1
+5V_PCH
S3 S5
ON
ON ON
N/A N/A N/A
N/AN/AN/A
Power Plane Description
EC SM Bus2 address
DeviceSmart Battery
OFF
+1.5VP to +1.5V power rail for DDRIII (1.35V OR 1.5V) ON ON OFF
0001 011X b
ON*
OFF
minPCIE-WLAN/BT
+1.5V
ON OFF OFF
+VCCP (1.05V ) power for PCH
ON OFF OFF
ON OFF OFF
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF
BATT+ Battery power supply (12.6V) N/A N/A N/A
+3VALW_EC +3VALW always to KBC ON ON ON*
ON*
+3VALW to +3VS power rail
+5VALWP to +5VALW power rail
+5VALW to +5V_PCH power rail for PCH (Short resister)
+5VS +5VALW to +5VS switched power rail OFFON OFF
ON*
UMA
V
X
CONN@@Option
m-SATA
USB 3.0 Port3 ExternalUSB Port
0
1X
CLKOUT_PCIE7 None
NoneCLKOUT_PCIE6
CLKOUT_PCIE4
CLKOUT_PCIE5
CLKOUT_PCIE1
CLKOUT_PCIE2
CLKOUT_PCIE3
DESTINATIONDIFFERENTIAL
CLK
CLKOUT_PEG_B
FLEX CLOCKS DESTINATION
CLKOUTFLEX1
CLKOUTFLEX2
CLKOUTFLEX3
WLAN
None
Symbol Note :
: means Digital Ground
: means Analog Ground
SATA5
SATA4
HDD,JHDD1
SATA3
SATA2
SATA1
DESTINATION
SATA0
SATA
None
None
None
ODD, JODD1
m-SATA,JMINI2
None
None
None
+VCCP
PCH (Reserve) 1010 0110b
Mini Card2
Mini Card1
G-sensor
PX@None
TP module
0101001b
CLKOUT_PCIE0 CR+ Giga LAN CLKOUTFLEX0 None
DDR DIMM1
USB2.0 and sleep charger
X
X
X
X
X
X
USB3.0
USB3.0
USB3.0
None
None
None
2
USB3.0
USB3.0
USB3.0(SB)DIS
X
XX
PCH_SML1DATA
PCH_SML1CLKHP AMP
PCH
EC_SMB_DA2
EC_SMB_CK2
PCHPCH_SML1DATAPCH_SML1CLK
V
V
TP
EC_SMB_CK2
BATT
Charger SODIMMBATTWLAN
MIINI1
KB930
SOURCE
SMBUS Control Table
PCHPCH_SMBDATAPCH_SMBCLK
PCH_SML0CLK
KB930
EC_SMB_DA1EC_SMB_CK1
EC_SMB_DA2
V
PCH_SML0DATA
VV
VV
V
G-Sensor GPU
V
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EDP_COMP
PEG_COMP
PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3
PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8
PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8
PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13
PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2
PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2
PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7
PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7
PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12
PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1
PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1
PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6
PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6
PEG_HTX_GRX_N11 PEG_HTX_C_GRX_N11
PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0
PEG_HTX_GRX_P11 PEG_HTX_C_GRX_P11
PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0
PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12PEG_HTX_GRX_P13 PEG_HTX_C_GRX_P13
PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5
PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5
PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10
PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10
PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4
PEG_HTX_GRX_P15 PEG_HTX_C_GRX_P15
PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4
PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9
PEG_HTX_GRX_P9 PEG_HTX_C_GRX_P9
PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3
PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15
PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14
PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_P13
PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_N11
PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_P11
PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_P7PEG_GTX_C_HRX_P8
PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_N10
PEG_GTX_C_HRX_P10
PEG_GTX_C_HRX_N15
PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_N9
PEG_GTX_C_HRX_P9
PEG_GTX_C_HRX_N14
PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_N8
PEG_GTX_C_HRX_P15
PEG_GTX_C_HRX_N13
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_N12
PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_P12
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_P[0..15]
PEG_GTX_C_HRX_N[0..15]
PEG_HTX_C_GRX_N[0..15]
PEG_HTX_C_GRX_P[0..15]
DMI_CTX_PRX_P015
DMI_CRX_PTX_P015
DMI_CTX_PRX_N115
DMI_CRX_PTX_N115
DMI_CTX_PRX_P315
DMI_CRX_PTX_P315
DMI_CTX_PRX_P215
DMI_CTX_PRX_N015
DMI_CRX_PTX_N315
DMI_CRX_PTX_P215
DMI_CTX_PRX_N315
DMI_CTX_PRX_P115
DMI_CRX_PTX_N015
DMI_CRX_PTX_N215
DMI_CRX_PTX_P115
DMI_CTX_PRX_N215
FDI_CTX_PRX_N015FDI_CTX_PRX_N115FDI_CTX_PRX_N215FDI_CTX_PRX_N315FDI_CTX_PRX_N415FDI_CTX_PRX_N515FDI_CTX_PRX_N615FDI_CTX_PRX_N715
FDI_CTX_PRX_P015FDI_CTX_PRX_P115FDI_CTX_PRX_P215FDI_CTX_PRX_P315FDI_CTX_PRX_P415FDI_CTX_PRX_P515FDI_CTX_PRX_P615FDI_CTX_PRX_P715
FDI_FSYNC015FDI_FSYNC115
FDI_INT15
FDI_LSYNC015FDI_LSYNC115
PEG_GTX_C_HRX_N[0..15] 21
PEG_HTX_C_GRX_P[0..15] 21
PEG_HTX_C_GRX_N[0..15] 21
PEG_GTX_C_HRX_P[0..15] 21
+1.05VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(1/7) DMI,FDI,PEG
Custom
4 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(1/7) DMI,FDI,PEG
Custom
4 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(1/7) DMI,FDI,PEG
Custom
4 57Sunday, November 27, 2011
2011/11/02 2011/11/02
PEG_ICOMPI and RCOMPO signals should beshorted and routedwith - max length = 500 mils - typicalimpedance = 43 mohmsPEG_ICOMPO signals should be routed with -max length = 500 mils- typical impedance = 14.5 mohms
eDP_COMPIO and ICOMPO signalsshould be shorted near ballsand routed with typicalimpedance
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP_TRST#
XDP_TMS
XDP_TDI
H_PROCHOT#
SM_RCOMP1
SM_RCOMP2
SM_RCOMP0
XDP_TDO
XDP_DBRESET#
H_CPUPWRGD_R
H_DRAMRST#
PM_SYS_PWRGD_BUF
H_PECI_ISO
H_THEMTRIP# H_THEMTRIP#_R
H_PROCHOT#_R
H_PM_SYNC_R
H_CPUPWRGD_R
PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF
BUF_CPU_RST#
H_PROCHOT#
XDP_TCK
BUF_CPU_RST#
XDP_DBRESET#_R
H_CPUPWRGD_R
PLT_RST#BUFO_CPU_RST#
XDP_TRST#
PLT_RST#
PM_SYS_PWRGD_BUF
BUF_CPU_RST#
SM_RCOMP1SM_RCOMP2
SM_RCOMP0
XDP_TMSXDP_TRST#
XDP_TDIXDP_TDO
XDP_TCK
XDP_DBRESET#XDP_DBRESET#_R
XDP_BPM#4_RXDP_BPM#5_RXDP_BPM#6_RXDP_BPM#7_R
H_PROCHOT#
H_PM_SYNC15
H_CPUPWRGD17
H_PROCHOT#36,47
H_SNB_IVB#17
H_PECI17,36 H_DRAMRST# 6
SYS_PWROK15
PM_DRAM_PWRGD15
PLT_RST#16,21,31,34,36
XDP_DBRESET# 15
CLK_CPU_DMI# 14CLK_CPU_DMI 14
H_THEMTRIP#17
+1.05VS
+3VS
+1.5V_CPU_VDDQ
+3VALW
+3VS
+3VS
+1.05VS
+3VS
+1.05VS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(2/7) PM,XDP,CLK
C
5 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(2/7) PM,XDP,CLK
C
5 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(2/7) PM,XDP,CLK
C
5 57Sunday, November 27, 2011
2011/11/02 2011/11/02
PU/PD for JTAG signals
DDR3 Compensation Signals
Processor Pullups
Compal Electronics, Inc.
circuit check 10k
PROC_DETECT (Processor Detect): pulled to
ground on the processor package. There is no
connection to the processor silicon for this
signal. System board designers may use this
signal to determine if the processor is present
This pin is for compability with future
platforms. A pull up resistor to VCCIO is
required if connected to the DF_TVS strap
on the PCH.
Buffered reset to CPU
LA-8041P
6/27 Add ESD solution
SI# 8/19 BOM
C118 220P
C266 220P
C264 220P
C263 0.1u
CC4 0.1u ok
SI# 10/02 Change to Pull High +3VS
Check circuit!!!
UNCOREPWRGOOD:非非非非CORE外外外外外外外外外外外外OKSM_DRAMPWROK:DRAM power ok
Reset# signal is driven by the PCH to multiple agents on the platform. PCH Reset# output DC levels are 0-V and 3.3 V, processor Reset input DC levels are 0V and 1.0 V.Processor high-voltage level is lower than PCH high voltage level, therefore a voltage level shifter is required on the Reset# signal.In order for Reset# to meet the signal quality requirement at the input to the processor OD buffer must be placed on the motherboard between the PCH and the processor.
Requires a series resistor of 43±5% between processor and PCH. It also a needs an Rtt of 75±5% to VCCP after the OD buffer and before the series resistor.
ITP CLK change to part E.
2011.10.18 delete all reserved XDP conponent.Just reserve test point for XDP.
2011.10.18 delete all reserved XDP conponent.Just reserve test point for XDP.
SI# 8/16 Reserve RC81~RC85 by ESD request
6/27 Add ESD solution
100MHz
Sharing add for module desige
11/21 follow QAZ60 cost down CPU_RST#
Remove mos for layout
RC11 10K_0402_5%RC11 10K_0402_5%12
R9560_0402_5%
R9560_0402_5%
1 2
CC10.1U_0402_16V4Z
@ CC10.1U_0402_16V4Z
@1
2
CC4 0.1U_0402_16V7K
CC4 0.1U_0402_16V7K
12
RC4
1.5K_0402_1%
RC4
1.5K_0402_1%12
RC5 1K_0402_5%RC5 1K_0402_5%12
RC160_0402_5%
RC160_0402_5%
1 2
UC1
SN74LVC1G07DCKR_SC70-5
@ UC1
SN74LVC1G07DCKR_SC70-5
@
NC1
A2
G3
Y4
P5
RC25200_0402_5%RC25200_0402_5%
12
RC270_0402_5%@ RC270_0402_5%@
1 2
RC6750_0402_1%
RC6750_0402_1%
12
RC8 62_0402_5%RC8 62_0402_5%12
RC84 1K_0402_5%RC84 1K_0402_5%12
T60 PAD@T60 PAD@
RC24 25.5_0402_1%RC24 25.5_0402_1%12
C264 220P_0402_50V7KC264 220P_0402_50V7K
1 2
T46 PAD@T46 PAD@
RC7 10K_0402_5%@
RC7 10K_0402_5%@1 2
RC17 0_0402_5%RC17 0_0402_5%1 2
RC26 200_0402_1%RC26 200_0402_1%12
C4680
47P
_0402_50V
8J
C4680
47P
_0402_50V
8J
12
RC9 0_0402_5%RC9 0_0402_5%1 2
RC18 130_0402_5%RC18 130_0402_5%1 2
T62 PAD@T62 PAD@T61 PAD@T61 PAD@
RC85 1K_0402_5%RC85 1K_0402_5%12
RC23 140_0402_1%RC23 140_0402_1%12
T40 PAD@T40 PAD@
T43 PAD@T43 PAD@
T39PAD
@T39
PAD@
T35PAD
@T35
PAD@
RC10 56_0402_5%RC10 56_0402_5%1 2
RC28
200_0402_5%
@RC28
200_0402_5%
@
1 2
C118 220P_0402_50V7KC118 220P_0402_50V7K1 2
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPUB
TYCO_2013620-2_IVY BRIDGE
@
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPUB
TYCO_2013620-2_IVY BRIDGE
@
SM_RCOMP[1]A5
SM_RCOMP[2]A4
SM_DRAMRST#R8
SM_RCOMP[0]AK1
BCLK#A27
BCLKA28
DPLL_REF_CLK#A15
DPLL_REF_CLKA16
CATERR#AL33
PECIAN33
PROCHOT#AL32
THERMTRIP#AN32
SM_DRAMPWROKV8
RESET#AR33
PRDY#AP29
PREQ#AP27
TCKAR26
TMSAR27
TRST#AP30
TDIAR28
TDOAP26
DBR#AL35
BPM#[0]AT28
BPM#[1]AR29
BPM#[2]AR30
BPM#[3]AT30
BPM#[4]AP32
BPM#[5]AR31
BPM#[6]AT31
BPM#[7]AR32
PM_SYNCAM34
SKTOCC#AN34
PROC_SELECT#C26
UNCOREPWRGOODAP33
CC20.1U_0402_16V4Z
CC20.1U_0402_16V4Z
1
2
T5PAD @T5PAD @
RC12 0_0402_5%RC12 0_0402_5%
1 2
RC30
200_0402_5%
RC30
200_0402_5%
1 2
T42 PAD@T42 PAD@
RC13 0_0402_5%RC13 0_0402_5%1 2
RC81
10K_0402_5%
RC81
10K_0402_5%
12
T63 PAD@T63 PAD@
C263 0.1U_0402_16V7KC263 0.1U_0402_16V7K
1 2UC274AHC1G09GW_TSSOP5
Part Number = SA00003Y000
UC274AHC1G09GW_TSSOP5
Part Number = SA00003Y000
B1
A2
G3
O4
P5
C266 220P_0402_50V7KC266 220P_0402_50V7K
1 2
C265 100P_0402_50V8J@C265 100P_0402_50V8J@
1 2
RC375_0402_5%
@RC375_0402_5%
@
12
T41 PAD@T41 PAD@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA15
DDR_A_MA0
DDR_A_MA14
DDR_A_MA5DDR_A_MA4
DDR_A_MA1DDR_A_MA2DDR_A_MA3
DDR_A_MA9
DDR_A_MA7DDR_A_MA6
DDR_A_MA12DDR_A_MA13
DDR_A_MA8
DDR_A_MA11DDR_A_MA10
DDR3_DRAMRST#_RH_DRAMRST#
DRAMRST_CNTRL
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D3DDR_A_D4
DDR_A_D7
DDR_A_D5DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D42DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44DDR_A_D45
DDR_A_D35
DDR_A_D41DDR_A_D40
DDR_A_D38
DDR_A_D36DDR_A_D37
DDR_A_D32DDR_A_D33
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50DDR_A_D49
DDR_A_D52DDR_A_D53
DDR_A_D31
DDR_A_D14DDR_A_D15
DDR_A_D25DDR_A_D24
DDR_A_D26DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D10DDR_A_D11
DDR_A_D29DDR_A_D28
DDR_A_D19DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_B_MA15
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14
DDR_B_D33
DDR_B_D14
DDR_B_D42
DDR_B_D59
DDR_B_D63
DDR_B_D43
DDR_B_D55
DDR_B_D53
DDR_B_D29
DDR_B_D24
DDR_B_D34
DDR_B_D4
DDR_B_D26
DDR_B_D13
DDR_B_D10
DDR_B_D21
DDR_B_D11
DDR_B_D57
DDR_B_D44
DDR_B_D0
DDR_B_D7
DDR_B_D46
DDR_B_D3
DDR_B_D15
DDR_B_D27
DDR_B_D30
DDR_B_D35
DDR_B_D40
DDR_B_D49
DDR_B_D23
DDR_B_D25
DDR_B_D19
DDR_B_D37
DDR_B_D48
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D47
DDR_B_D9
DDR_B_D60
DDR_B_D50
DDR_B_D62
DDR_B_D52
DDR_B_D2
DDR_B_D51
DDR_B_D56
DDR_B_D39
DDR_B_D22
DDR_B_D28
DDR_B_D6
DDR_B_D45
DDR_B_D17
DDR_B_D58
DDR_B_D61
DDR_B_D31
DDR_B_D54
DDR_B_D1
DDR_B_D41
DDR_B_D5
DDR_B_D12
DDR_B_D20
DDR_B_D38
DDR_B_D32
DDR_B_D16
DDR_A_DQS0
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_B_DQS7
DDR_B_DQS0DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS4DDR_B_DQS3DDR_B_DQS2
DDR_B_DQS6
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_DQS#5DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#2
DDR_A_D[0..63]11
DDR_A_WE#11DDR_A_RAS#11DDR_A_CAS#11
DDR_A_BS011DDR_A_BS111DDR_A_BS211
H_DRAMRST#5
DDR_A_MA[0..15] 11
DDR3_DRAMRST# 11,12
DRAMRST_CNTRL_PCH9,14
DDR_B_MA[0..15] 12
DDR_B_BS012DDR_B_BS112DDR_B_BS212
DDR_B_D[0..63]12
DDR_B_WE#12DDR_B_RAS#12DDR_B_CAS#12
DDR_CKE0_DIMMA 11
M_CLK_DDR0 11M_CLK_DDR#0 11
M_CLK_DDR1 11M_CLK_DDR#1 11DDR_CKE1_DIMMA 11
DDR_CS0_DIMMA# 11DDR_CS1_DIMMA# 11
DDR_A_DQS[0..7] 11
DDR_A_DQS#[0..7] 11
M_ODT0 11M_ODT1 11
DDR_CKE0_DIMMB 12
M_CLK_DDR2 12M_CLK_DDR#2 12
DDR_CKE1_DIMMB 12
M_CLK_DDR3 12M_CLK_DDR#3 12
DDR_CS0_DIMMB# 12DDR_CS1_DIMMB# 12
M_ODT2 12M_ODT3 12
DDR_B_DQS[0..7] 12
DDR_B_DQS#[0..7] 12
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(3/7) DDRIII
Custom
6 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(3/7) DDRIII
Custom
6 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(3/7) DDRIII
Custom
6 57Sunday, November 27, 2011
2011/11/02 2011/11/02Compal Electronics, Inc.
LA-8041P
9/7 Folllow PAJ80 BOM by Light
del: SB501380020
add: SB00000QO00
S0
DRAMRST_CNTRL_PCH hgih ,MOS ON
H_DRAMRST# HIGH,DDR3_DRAMRST# HIGH
Dimm not reset
S3
DRAMRST_CNTRL_PCH Low ,MOS OFF
H_DRAMRST# lo,DDR3_DRAMRST# HIGH
Dimm not reset
S4,5
DRAMRST_CNTRL_PCH Low ,MOS OFF
H_DRAMRST# lo,DDR3_DRAMRST# low
Dimm reset
CPU通通DIMM做reset
10/05 change net name.
RC361K_0402_5%
RC361K_0402_5%
12
RC350_0402_5%@RC350_0402_5%@
1 2
RC371K_0402_5%RC371K_0402_5%
1 2
DDR SYSTEM MEMORY A
JCPUC
TYCO_2013620-2_IVY BRIDGE
@
DDR SYSTEM MEMORY A
JCPUC
TYCO_2013620-2_IVY BRIDGE
@
SA_BS[0]AE10
SA_BS[1]AF10
SA_BS[2]V6
SA_CAS#AE8
SA_RAS#AD9
SA_WE#AF9
SA_CLK[0]AB6
SA_CLK[1]AA5
SA_CLK#[0]AA6
SA_CLK#[1]AB5
SA_CKE[0]V9
SA_CKE[1]V10
SA_CS#[0]AK3
SA_CS#[1]AL3
SA_ODT[0]AH3
SA_ODT[1]AG3
SA_DQS[0]D4
SA_DQS#[0]C4
SA_DQS[1]F6
SA_DQS#[1]G6
SA_DQS[2]K3
SA_DQS#[2]J3
SA_DQS[3]N6
SA_DQS#[3]M6
SA_DQS[4]AL5
SA_DQS#[4]AL6
SA_DQS[5]AM9
SA_DQS#[5]AM8
SA_DQS[6]AR11
SA_DQS#[6]AR12
SA_DQS[7]AM14
SA_DQS#[7]AM15
SA_MA[0]AD10
SA_MA[1]W1
SA_MA[2]W2
SA_MA[3]W7
SA_MA[4]V3
SA_MA[5]V2
SA_MA[6]W3
SA_MA[7]W6
SA_MA[8]V1
SA_MA[9]W5
SA_MA[10]AD8
SA_MA[11]V4
SA_MA[12]W4
SA_MA[13]AF8
SA_MA[14]V5
SA_MA[15]V7
SA_DQ[0]C5
SA_DQ[1]D5
SA_DQ[2]D3
SA_DQ[3]D2
SA_DQ[4]D6
SA_DQ[5]C6
SA_DQ[6]C2
SA_DQ[7]C3
SA_DQ[8]F10
SA_DQ[9]F8
SA_DQ[10]G10
SA_DQ[11]G9
SA_DQ[12]F9
SA_DQ[13]F7
SA_DQ[14]G8
SA_DQ[15]G7
SA_DQ[16]K4
SA_DQ[17]K5
SA_DQ[18]K1
SA_DQ[19]J1
SA_DQ[20]J5
SA_DQ[21]J4
SA_DQ[22]J2
SA_DQ[23]K2
SA_DQ[24]M8
SA_DQ[25]N10
SA_DQ[26]N8
SA_DQ[27]N7
SA_DQ[28]M10
SA_DQ[29]M9
SA_DQ[30]N9
SA_DQ[31]M7
SA_DQ[32]AG6
SA_DQ[33]AG5
SA_DQ[34]AK6
SA_DQ[35]AK5
SA_DQ[36]AH5
SA_DQ[37]AH6
SA_DQ[38]AJ5
SA_DQ[39]AJ6
SA_DQ[40]AJ8
SA_DQ[41]AK8
SA_DQ[42]AJ9
SA_DQ[43]AK9
SA_DQ[44]AH8
SA_DQ[45]AH9
SA_DQ[46]AL9
SA_DQ[47]AL8
SA_DQ[48]AP11
SA_DQ[49]AN11
SA_DQ[50]AL12
SA_DQ[51]AM12
SA_DQ[52]AM11
SA_DQ[53]AL11
SA_DQ[54]AP12
SA_DQ[55]AN12
SA_DQ[56]AJ14
SA_DQ[57]AH14
SA_DQ[58]AL15
SA_DQ[59]AK15
SA_DQ[60]AL14
SA_DQ[61]AK14
SA_DQ[62]AJ15
SA_DQ[63]AH15
RSVD_TP[1]AB4
RSVD_TP[2]AA4
RSVD_TP[4]AB3
RSVD_TP[5]AA3
RSVD_TP[3]W9
RSVD_TP[6]W10
RSVD_TP[7]AG1
RSVD_TP[8]AH1
RSVD_TP[9]AG2
RSVD_TP[10]AH2
CC30.047U_0402_16V4ZCC30.047U_0402_16V4Z
1
2
RC384.99K_0402_1%
RC384.99K_0402_1%
12
G
DS
QC2BSS138_NL_SOT23-3
G
DS
QC2BSS138_NL_SOT23-3
2
13
RC390_0402_5%
RC390_0402_5%
1 2
DDR SYSTEM MEMORY B
JCPUD
TYCO_2013620-2_IVY BRIDGE
@
DDR SYSTEM MEMORY B
JCPUD
TYCO_2013620-2_IVY BRIDGE
@
SB_BS[0]AA9
SB_BS[1]AA7
SB_BS[2]R6
SB_CAS#AA10
SB_RAS#AB8
SB_WE#AB9
SB_CLK[0]AE2
SB_CLK[1]AE1
SB_CLK#[0]AD2
SB_CLK#[1]AD1
SB_CKE[0]R9
SB_CKE[1]R10
SB_ODT[0]AE4
SB_ODT[1]AD4
SB_DQS[4]AN6
SB_DQS#[4]AN5
SB_DQS[5]AP8
SB_DQS#[5]AP9
SB_DQS[6]AK11
SB_DQS#[6]AK12
SB_DQS[7]AP14
SB_DQS#[7]AP15
SB_DQS[0]C7
SB_DQS#[0]D7
SB_DQS[1]G3
SB_DQS#[1]F3
SB_DQS[2]J6
SB_DQS#[2]K6
SB_DQS[3]M3
SB_DQS#[3]N3
SB_MA[0]AA8
SB_MA[1]T7
SB_MA[2]R7
SB_MA[3]T6
SB_MA[4]T2
SB_MA[5]T4
SB_MA[6]T3
SB_MA[7]R2
SB_MA[8]T5
SB_MA[9]R3
SB_MA[10]AB7
SB_MA[11]R1
SB_MA[12]T1
SB_MA[13]AB10
SB_MA[14]R5
SB_MA[15]R4
SB_DQ[0]C9
SB_DQ[1]A7
SB_DQ[2]D10
SB_DQ[3]C8
SB_DQ[4]A9
SB_DQ[5]A8
SB_DQ[6]D9
SB_DQ[7]D8
SB_DQ[8]G4
SB_DQ[9]F4
SB_DQ[10]F1
SB_DQ[11]G1
SB_DQ[12]G5
SB_DQ[13]F5
SB_DQ[14]F2
SB_DQ[15]G2
SB_DQ[16]J7
SB_DQ[17]J8
SB_DQ[18]K10
SB_DQ[19]K9
SB_DQ[20]J9
SB_DQ[21]J10
SB_DQ[22]K8
SB_DQ[23]K7
SB_DQ[24]M5
SB_DQ[25]N4
SB_DQ[26]N2
SB_DQ[27]N1
SB_DQ[28]M4
SB_DQ[29]N5
SB_DQ[30]M2
SB_DQ[31]M1
SB_DQ[32]AM5
SB_DQ[33]AM6
SB_DQ[34]AR3
SB_DQ[35]AP3
SB_DQ[36]AN3
SB_DQ[37]AN2
SB_DQ[38]AN1
SB_DQ[39]AP2
SB_DQ[40]AP5
SB_DQ[41]AN9
SB_DQ[42]AT5
SB_DQ[43]AT6
SB_DQ[44]AP6
SB_DQ[45]AN8
SB_DQ[46]AR6
SB_DQ[47]AR5
SB_DQ[48]AR9
SB_DQ[49]AJ11
SB_DQ[50]AT8
SB_DQ[51]AT9
SB_DQ[52]AH11
SB_DQ[53]AR8
SB_DQ[54]AJ12
SB_DQ[55]AH12
SB_DQ[56]AT11
SB_DQ[57]AN14
SB_DQ[58]AR14
SB_DQ[59]AT14
SB_DQ[60]AT12
SB_DQ[61]AN15
SB_DQ[62]AR15
SB_DQ[63]AT15
RSVD_TP[11]AB2
RSVD_TP[12]AA2
RSVD_TP[13]T9
RSVD_TP[14]AA1
RSVD_TP[15]AB1
RSVD_TP[16]T10
SB_CS#[0]AD3
SB_CS#[1]AE3
RSVD_TP[17]AD6
RSVD_TP[18]AE6
RSVD_TP[19]AD5
RSVD_TP[20]AE5
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
CFG6
CFG5
CFG2
CFG7
CFG10CFG11
CFG13CFG14CFG15CFG16CFG17
CFG12
CFG1CFG2
CFG0
CFG3CFG4CFG5CFG6CFG7CFG8CFG9
VAXG_VAL_SENSEVSSAXG_VAL_SENSE
VCC_VAL_SENSEVSS_VAL_SENSE
CPU_RSVD7CPU_RSVD6
CLK_RES_ITP# 14CLK_RES_ITP 14
+CPU_CORE
+VGFX_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(4/7) RSVD,CFG
Custom
7 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(4/7) RSVD,CFG
Custom
7 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(4/7) RSVD,CFG
Custom
7 57Sunday, November 27, 2011
2011/11/02 2011/11/02
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately followingxxRESETB de assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device isconnected to the Embedded Display Port
1 : Disabled; No Physical Display Portattached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1: Normal Operation; Lane # definition matchessocket pin map definition
Compal Electronics, Inc.
*
*
*
LA-8041P
*
Change to part G.
2011.10.18 delete XDP resistor just reserve test point for XDP.
ITP CLK change from part C.
change to install
change to install
Just modify PWR to correct ,didn't change net-name to save layout time;must modify on SI phase
T18T18T17T17
RC45 49.9_0402_1%RC45 49.9_0402_1%12
T48T48
T16T16
RC44 49.9_0402_1%RC44 49.9_0402_1%1 2
T12T12
T9T9T6T6T10T10
T47T47
T3PAD T3PAD
T14T14
T22T22
RC4349.9_0402_1%
RC4349.9_0402_1%12
T13T13
RC401K_0402_1%RC401K_0402_1%
12
T59T59
T64PAD T64PAD
T7T7
RC491K_0402_1%UMA@RC491K_0402_1%UMA@
12
T8T8
RESERVED
CFG
JCPUE
TYCO_2013620-2_IVY BRIDGE
@
RESERVED
CFG
JCPUE
TYCO_2013620-2_IVY BRIDGE
@
CFG[0]AK28
CFG[1]AK29
CFG[2]AL26
CFG[3]AL27
CFG[4]AK26
CFG[5]AL29
CFG[6]AL30
CFG[7]AM31
CFG[8]AM32
CFG[9]AM30
CFG[10]AM28
CFG[11]AM26
CFG[12]AN28
CFG[13]AN31
CFG[14]AN26
CFG[15]AM27
CFG[16]AK31
CFG[17]AN29
RSVD34AM33
RSVD35AJ27
RSVD38J16
RSVD_NCTF2AT34
RSVD39H16
RSVD40G16
RSVD_NCTF1AR35
RSVD_NCTF3AT33
RSVD_NCTF5AR34
RSVD_NCTF11AT2
RSVD_NCTF12AT1
RSVD_NCTF13AR1
RSVD_NCTF6B34
RSVD_NCTF7A33
RSVD_NCTF8A34
RSVD_NCTF9B35
RSVD_NCTF10C35
RSVD51AJ32
RSVD52AK32
RSVD27J15
RSVD16C30
RSVD15D23
RSVD17A31
RSVD18B30
RSVD20D30
RSVD19B29
RSVD22A30
RSVD21B31
RSVD23C29
RSVD37T8
RSVD8F25
RSVD9F24
RSVD11D24
RSVD12G25
RSVD13G24
RSVD14E23
RSVD32W8
RSVD33AT26
RSVD_NCTF4AP35
RSVD10F23
RSVD5AJ26
VAXG_VAL_SENSEAJ31
VSSAXG_VAL_SENSEAH31
VCC_VAL_SENSEAJ33
VSS_VAL_SENSEAH33
KEYB1
VCC_DIE_SENSEAH27
BCLK_ITPAN35
BCLK_ITP#AM35
VSS_DIE_SENSEAH26
RSVD31AK2
RSVD30AE7
RSVD29AG7
RSVD28L7
RSVD24J20
RSVD25B18
RC481K_0402_1%
@
RC481K_0402_1%
@
12
RC42 49.9_0402_1%RC42 49.9_0402_1%1 2
T15T15
T21T21
T58T58
RC501K_0402_1%
@RC501K_0402_1%
@
12
T11T11
RC411K_0402_1%RC411K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE_RVCCSENSE_R
H_CPU_SVIDALRT#H_CPU_SVIDCLK
VCCIO_SENSE_RVSS_SENSE_VCCIO
H_CPU_SVIDDAT
VR_SVID_ALRT# 55VR_SVID_CLK 55VR_SVID_DAT 55
VCCIO_SENSE 50
VCCSENSE 55VSSSENSE 55
VSS_SENSE_VCCIO 50
+CPU_CORE
+CPU_CORE
+1.05VS
+1.05VS
+1.05VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(5/7) PWR,BYPASS
Custom
8 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(5/7) PWR,BYPASS
Custom
8 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(5/7) PWR,BYPASS
Custom
8 57Sunday, November 27, 2011
2011/11/02 2011/11/02Compal Electronics, Inc.
Place the PUresistors close to VR
Place the PUresistors close to CPU
LA-8041P
10/05 mount.(follow check list)
RC62 0_0402_5%RC62 0_0402_5%1 2
RC57 43_0402_1%RC57 43_0402_1%1 2
RC60 100_0402_1%RC60 100_0402_1%1 2
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
JCPUF
TYCO_2013620-2_IVY BRIDGE
@
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
JCPUF
TYCO_2013620-2_IVY BRIDGE
@
VCC_SENSEAJ35
VSS_SENSEAJ34
VIDALERT#AJ29
VIDSCLKAJ30
VIDSOUTAJ28
VSS_SENSE_VCCIOA10
VCC1AG35
VCC2AG34
VCC3AG33
VCC4AG32
VCC5AG31
VCC6AG30
VCC7AG29
VCC8AG28
VCC9AG27
VCC10AG26
VCC11AF35
VCC12AF34
VCC13AF33
VCC14AF32
VCC15AF31
VCC16AF30
VCC17AF29
VCC18AF28
VCC19AF27
VCC20AF26
VCC21AD35
VCC22AD34
VCC23AD33
VCC24AD32
VCC25AD31
VCC26AD30
VCC27AD29
VCC28AD28
VCC29AD27
VCC30AD26
VCC31AC35
VCC32AC34
VCC33AC33
VCC34AC32
VCC35AC31
VCC36AC30
VCC37AC29
VCC38AC28
VCC39AC27
VCC40AC26
VCC41AA35
VCC42AA34
VCC43AA33
VCC44AA32
VCC45AA31
VCC46AA30
VCC47AA29
VCC48AA28
VCC49AA27
VCC50AA26
VCC51Y35
VCC52Y34
VCC53Y33
VCC54Y32
VCC55Y31
VCC56Y30
VCC57Y29
VCC58Y28
VCC59Y27
VCC60Y26
VCC61V35
VCC62V34
VCC63V33
VCC64V32
VCC65V31
VCC66V30
VCC67V29
VCC68V28
VCC69V27
VCC70V26
VCC71U35
VCC72U34
VCC73U33
VCC74U32
VCC75U31
VCC76U30
VCC77U29
VCC78U28
VCC79U27
VCC80U26
VCC81R35
VCC82R34
VCC83R33
VCC84R32
VCC85R31
VCC86R30
VCC87R29
VCC88R28
VCC89R27
VCC90R26
VCC91P35
VCC92P34
VCC93P33
VCC94P32
VCC95P31
VCC96P30
VCC97P29
VCC98P28
VCC99P27
VCC100P26
VCCIO1AH13
VCCIO12J11
VCCIO18G12
VCCIO19F14
VCCIO20F13
VCCIO21F12
VCCIO22F11
VCCIO23E14
VCCIO24E12
VCCIO2AH10
VCCIO3AG10
VCCIO4AC10
VCCIO5Y10
VCCIO6U10
VCCIO7P10
VCCIO8L10
VCCIO9J14
VCCIO10J13
VCCIO11J12
VCCIO13H14
VCCIO14H12
VCCIO15H11
VCCIO16G14
VCCIO17G13
VCCIO25E11
VCCIO32C12
VCCIO33C11
VCCIO34B14
VCCIO35B12
VCCIO36A14
VCCIO37A13
VCCIO38A12
VCCIO39A11
VCCIO26D14
VCCIO27D13
VCCIO28D12
VCCIO29D11
VCCIO30C14
VCCIO31C13
VCCIO_SENSEB10
VCCIO40J23
RC56
75
_0
40
2_
5% RC56
75
_0
40
2_
5%
12
RC65 0_0402_5%RC65 0_0402_5%1 2
RC6310_0402_1%
RC6310_0402_1%
1 2
RC61 0_0402_5%RC61 0_0402_5%1 2
RC64
100_0402_1%
RC64
100_0402_1%
12
RC59 0_0402_5%RC59 0_0402_5%1 2
RC58 0_0402_5%RC58 0_0402_5%1 2
RC55130_0402_5%RC55130_0402_5%
12
RC6610_0402_1%RC6610_0402_1%
12
RC121100_0402_1%~D
@
RC121100_0402_1%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DRAMRST_CNTRL_PCH
+V_DDR_REFB_R
+V_DDR_REFA_R
DRAMRST_CNTRL_PCH
+1.8VS_VCCPLL
+V_SM_VREF_CNT
+V_DDR_REFA_R
+VCCSA
+V_DDR_REFB_R
VCCSA_SENSE
VCCSA_VID1VCCSA_VID0
RUN_ON_CPU1.5VS3#RUN_ON_CPU1.5VS3#
RUN_ON_CPU1.5VS3
VCCP_PWRCTRL_R
DRAMRST_CNTRL_PCH 6,14
VCCSA_SENSE 52
VCC_AXG_SENSE 55VSS_AXG_SENSE 55
VCCSA_VID1 52VCCSA_VID0 52
CPU1.5V_S3_GATE36
SUSP#36,43,50,51,52,53
+1.5V_CPU_VDDQ
+1.5V_CPU_VDDQ +1.5V
+VGFX_CORE
+V_DDR_REFA
+V_DDR_REFB
+1.8VS
+VCCSA
+1.5V_CPU_VDDQ
+1.5V +1.5V_CPU_VDDQ+VSB
+3VALW
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(6/7) PWR
Custom
9 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(6/7) PWR
Custom
9 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(6/7) PWR
Custom
9 57Sunday, November 27, 2011
2011/11/02 2011/11/02
+1.5V_CPU_VDDQ Source
Compal Electronics, Inc.
Can connect to GND if motherboard only‧‧‧‧supports external graphics and if GFX VR is notstuffed in a common motherboard design,
VAXG can be left floating in a common‧‧‧‧motherboard design (Gfx VR keeps VAXG fromfloating) if the VR is stuffed
VID[0] VID[1] 2011 2012
0 0 0.90 V Yes Yes
0 1 0.80 V Yes Yes
1 0 0.725 V No Yes
1 1 0.675 V No Yes
LA-8041P
For Chief River only
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
10/03 add +V_DDR_REFB
QC4 Change to SA0000JA00 for small package
1016
SI# 7/29 Add CC26 10uF and reserve 330U on 1.8V power Rail
+V_SM_VREF shouldhave 20 mil trace width
100±5% pull-up to VCC;100±5% pull-down to GND.
Delete CC25 330U cap 10.19(after check with power)
11/21 follow PBL22 design remove 10u*2, 1U*5
11/21 follow PBL22 design remove 10u*2, 1U*8;keep 10U*5
SI# BOM Change CC118 0.1u 25V form 0.1u 16V
Follow DG 0.71 page 6
CPU EDS descript as follow:For Chief River platforms this pin should not be used.
RC80 0_0402_5%RC80 0_0402_5%1 2
CC
99
10
U_
06
03
_6
.3V
6M
CC
99
10
U_
06
03
_6
.3V
6M
1
2
RC681K_0402_1%RC681K_0402_1%
12
RC141K_0402_1%@
RC141K_0402_1%@
1 2
RC790_0402_5%
RC790_0402_5%
1 2
RC82
0_0402_5%@
RC82
0_0402_5%@1 2
RC740_0402_5%
RC740_0402_5%
1 2
RC770_0805_5%
RC770_0805_5%
1 2
+ CC100330U_D2_2V_Y
+ CC100330U_D2_2V_Y
1
2
CC
12
11
U_
04
02
_6
.3V
6K
CC
12
11
U_
04
02
_6
.3V
6K
1
2
Q10A2N7002DWH_SOT363-6Q10A2N7002DWH_SOT363-6
61
2CC1180.1U_0402_25V6CC1180.1U_0402_25V6
1
2
RC53
10K_0402_5%
@ RC53
10K_0402_5%
@
1 2
RC72100K_0402_5%RC72100K_0402_5%
12
QC5A
2N7002DWH_SOT363-6
QC5A
2N7002DWH_SOT363-6
61
2
CC790.1U_0402_16V4Z
CC790.1U_0402_16V4Z
1
2
RC78 0_0402_5%@RC78 0_0402_5%@1 2
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREF
MISC
JCPUG
TYCO_2013620-2_IVY BRIDGE
@
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREF
MISC
JCPUG
TYCO_2013620-2_IVY BRIDGE
@
SM_VREFAL1
VSSAXG_SENSEAK34
VAXG_SENSEAK35
VAXG1AT24
VAXG2AT23
VAXG3AT21
VAXG4AT20
VAXG5AT18
VAXG6AT17
VAXG7AR24
VAXG8AR23
VAXG9AR21
VAXG10AR20
VAXG11AR18
VAXG12AR17
VAXG13AP24
VAXG14AP23
VAXG15AP21
VAXG16AP20
VAXG17AP18
VAXG18AP17
VAXG19AN24
VAXG20AN23
VAXG21AN21
VAXG22AN20
VAXG23AN18
VAXG24AN17
VAXG25AM24
VAXG26AM23
VAXG27AM21
VAXG28AM20
VAXG29AM18
VAXG30AM17
VAXG31AL24
VAXG32AL23
VAXG33AL21
VAXG34AL20
VAXG35AL18
VAXG36AL17
VAXG37AK24
VAXG38AK23
VAXG39AK21
VAXG40AK20
VAXG41AK18
VAXG42AK17
VAXG43AJ24
VAXG44AJ23
VAXG45AJ21
VAXG46AJ20
VAXG47AJ18
VAXG48AJ17
VAXG49AH24
VAXG50AH23
VAXG51AH21
VAXG52AH20
VAXG53AH18
VAXG54AH17
VDDQ11U4
VDDQ12U1
VDDQ13P7
VDDQ14P4
VDDQ15P1
VDDQ1AF7
VDDQ2AF4
VDDQ3AF1
VDDQ4AC7
VDDQ5AC4
VDDQ6AC1
VDDQ7Y7
VDDQ8Y4
VDDQ9Y1
VDDQ10U7
VCCPLL1B6
VCCPLL2A6
VCCSA1M27
VCCSA2M26
VCCSA3L26
VCCSA4J26
VCCSA5J25
VCCSA6J24
VCCSA7H26
VCCSA8H25
VCCSA_SENSEH23
VCCSA_VID[1]C24
VCCPLL3A2
VCCSA_VID[0]C22
SA_DIMM_VREFDQB4
SB_DIMM_VREFDQD1
VCCIO_SELA19
CC75 0.1U_0402_10V7KCC75 0.1U_0402_10V7K12
G
D
S
QC8
BSS138W-7-F_SOT323-3SB000002X00
G
D
S
QC8
BSS138W-7-F_SOT323-3SB000002X00
2
13
RC15
0_0402_5%@
RC15
0_0402_5%@1 2
RC70100K_0402_5%RC70100K_0402_5%
12
CC
98
10
U_
06
03
_6
.3V
6M
CC
98
10
U_
06
03
_6
.3V
6M
1
2
CC
95
10
U_
06
03
_6
.3V
6M
CC
95
10
U_
06
03
_6
.3V
6M
1
2
CC
24
10
U_
06
03
_6
.3V
6M
CC
24
10
U_
06
03
_6
.3V
6M
1
2
CC
97
10
U_
06
03
_6
.3V
6M
CC
97
10
U_
06
03
_6
.3V
6M
1
2
RC157 100_0402_1%~D@RC157 100_0402_1%~D@1 2
RC691K_0402_1%RC691K_0402_1%
12
RC750_0402_5%
@RC750_0402_5%
@
1 2
RC73330K_0402_5%
RC73330K_0402_5%
12
CC
21
10
U_
06
03
_6
.3V
6M
CC
21
10
U_
06
03
_6
.3V
6M
1
2
R78
20
K_
04
02
_5
%
@
R78
20
K_
04
02
_5
%
@
12
RC71470_0603_5%RC71470_0603_5%
12
RC5275_0402_5%
@RC5275_0402_5%
@
12
CC74 0.1U_0402_10V7KCC74 0.1U_0402_10V7K12
CC
12
21
U_
04
02
_6
.3V
6K
CC
12
21
U_
04
02
_6
.3V
6K
1
2
+
CC
12
0
33
0U
_D
2_
2V
M_
R6
M
@
+
CC
12
0
33
0U
_D
2_
2V
M_
R6
M
@
1
2
G
D
S
QC7
BSS138W-7-F_SOT323-3SB000002X00
G
D
S
QC7
BSS138W-7-F_SOT323-3SB000002X00
2
13
QC5B
2N7002DWH_SOT363-6
QC5B
2N7002DWH_SOT363-6
34
5
CC
96
10
U_
06
03
_6
.3V
6M
CC
96
10
U_
06
03
_6
.3V
6M
1
2
RC831K_0402_1%@
RC831K_0402_1%@
1 2
CC
26
10
U_
06
03
_6
.3V
6M
CC
26
10
U_
06
03
_6
.3V
6M
1
2
QC4AON6718L_DFN8-5QC4AON6718L_DFN8-5
4
5
123
CC
22
10
U_
06
03
_6
.3V
6M
CC
22
10
U_
06
03
_6
.3V
6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(7/7) VSS
Custom
10 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(7/7) VSS
Custom
10 57Sunday, November 27, 2011
2011/11/02 2011/11/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(7/7) VSS
Custom
10 57Sunday, November 27, 2011
2011/11/02 2011/11/02Compal Electronics, Inc.
LA-8041P
VSS
JCPUH
TYCO_2013620-2_IVY BRIDGE
@
VSS
JCPUH
TYCO_2013620-2_IVY BRIDGE
@
VSS1AT35
VSS2AT32
VSS3AT29
VSS4AT27
VSS5AT25
VSS6AT22
VSS7AT19
VSS8AT16
VSS9AT13
VSS10AT10
VSS11AT7
VSS12AT4
VSS13AT3
VSS14AR25
VSS15AR22
VSS16AR19
VSS17AR16
VSS18AR13
VSS19AR10
VSS20AR7
VSS21AR4
VSS22AR2
VSS23AP34
VSS24AP31
VSS25AP28
VSS26AP25
VSS27AP22
VSS28AP19
VSS29AP16
VSS30AP13
VSS31AP10
VSS32AP7
VSS33AP4
VSS34AP1
VSS35AN30
VSS36AN27
VSS37AN25
VSS38AN22
VSS39AN19
VSS40AN16
VSS41AN13
VSS42AN10
VSS43AN7
VSS44AN4
VSS45AM29
VSS46AM25
VSS47AM22
VSS48AM19
VSS49AM16
VSS50AM13
VSS51AM10
VSS52AM7
VSS53AM4
VSS54AM3
VSS55AM2
VSS56AM1
VSS57AL34
VSS58AL31
VSS59AL28
VSS60AL25
VSS61AL22
VSS62AL19
VSS63AL16
VSS64AL13
VSS65AL10
VSS66AL7
VSS67AL4
VSS68AL2
VSS69AK33
VSS70AK30
VSS71AK27
VSS72AK25
VSS73AK22
VSS74AK19
VSS75AK16
VSS76AK13
VSS77AK10
VSS78AK7
VSS79AK4
VSS80AJ25
VSS81AJ22
VSS82AJ19
VSS83AJ16
VSS84AJ13
VSS85AJ10
VSS86AJ7
VSS87AJ4
VSS88AJ3
VSS89AJ2
VSS90AJ1
VSS91AH35
VSS92AH34
VSS93AH32
VSS94AH30
VSS95AH29
VSS96AH28
VSS98AH25
VSS99AH22
VSS100AH19
VSS101AH16
VSS102AH7
VSS103AH4
VSS104AG9
VSS105AG8
VSS106AG4
VSS107AF6
VSS108AF5
VSS109AF3
VSS110AF2
VSS111AE35
VSS112AE34
VSS113AE33
VSS114AE32
VSS115AE31
VSS116AE30
VSS117AE29
VSS118AE28
VSS119AE27
VSS120AE26
VSS121AE9
VSS122AD7
VSS123AC9
VSS124AC8
VSS125AC6
VSS126AC5
VSS127AC3
VSS128AC2
VSS129AB35
VSS130AB34
VSS131AB33
VSS132AB32
VSS133AB31
VSS134AB30
VSS135AB29
VSS136AB28
VSS137AB27
VSS138AB26
VSS139Y9
VSS140Y8
VSS141Y6
VSS142Y5
VSS143Y3
VSS144Y2
VSS145W35
VSS146W34
VSS147W33
VSS148W32
VSS149W31
VSS150W30
VSS151W29
VSS152W28
VSS153W27
VSS154W26
VSS155U9
VSS156U8
VSS157U6
VSS158U5
VSS159U3
VSS160U2
VSS
JCPUI
TYCO_2013620-2_IVY BRIDGE
@
VSS
JCPUI
TYCO_2013620-2_IVY BRIDGE
@
VSS161T35
VSS162T34
VSS163T33
VSS164T32
VSS165T31
VSS166T30
VSS167T29
VSS168T28
VSS169T27
VSS170T26
VSS171P9
VSS172P8
VSS173P6
VSS174P5
VSS175P3
VSS176P2
VSS177N35
VSS178N34
VSS179N33
VSS180N32
VSS181N31
VSS182N30
VSS183N29
VSS184N28
VSS185N27
VSS186N26
VSS187M34
VSS188L33
VSS189L30
VSS190L27
VSS191L9
VSS192L8
VSS193L6
VSS194L5
VSS195L4
VSS196L3
VSS197L2
VSS198L1
VSS199K35
VSS200K32
VSS201K29
VSS202K26
VSS203J34
VSS204J31
VSS205H33
VSS206H30
VSS207H27
VSS208H24
VSS209H21
VSS210H18
VSS211H15
VSS212H13
VSS213H10
VSS214H9
VSS215H8
VSS216H7
VSS217H6
VSS218H5
VSS219H4
VSS220H3
VSS221H2
VSS222H1
VSS223G35
VSS224G32
VSS225G29
VSS226G26
VSS227G23
VSS228G20
VSS229G17
VSS230G11
VSS231F34
VSS232F31
VSS233F29
VSS234F22
VSS235F19
VSS236E30
VSS237E27
VSS238E24
VSS239E21
VSS240E18
VSS241E15
VSS242E13
VSS243E10
VSS244E9
VSS245E8
VSS246E7
VSS247E6
VSS248E5
VSS249E4
VSS250E3
VSS251E2
VSS252E1
VSS253D35
VSS254D32
VSS255D29
VSS256D26
VSS257D20
VSS258D17
VSS259C34
VSS260C31
VSS261C28
VSS262C27
VSS263C25
VSS264C23
VSS265C10
VSS266C1
VSS267B22
VSS268B19
VSS269B17
VSS270B15
VSS271B13
VSS272B11
VSS273B9
VSS274B8
VSS275B7
VSS276B5
VSS277B3
VSS278B2
VSS279A35
VSS280A32
VSS281A29
VSS282A26
VSS283A23
VSS284A20
VSS285A3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VREF_CA
DDR_A_D31
DDR_A_D12
DDR_CKE0_DIMMA
DDR_A_D59
DDR_A_D6
DDR_A_MA3
DDR_CS1_DIMMA#
DDR_A_MA7
DDR_A_MA0
DDR_A_DQS7
DDR_A_D0
DDR_A_D57
DDR_A_D46
DDR_A_D28DDR_A_D19
DDR_A_DQS#5
DDR_A_D51
DDR_A_D4
DDR_A_D30
DDR_A_DQS2
DDR_A_D44
DDR_A_D33
DDR_A_D58
DDR_A_DQS3
DDR_A_MA8
DDR_A_D10
DDR_A_MA6
DDR_A_D27
DDR_A_D3
DDR_A_MA10
DDR_A_DQS#7
DDR_A_D1
DDR_A_DQS#6
DDR_A_D40
DDR_A_MA9
DDR_A_D16
DDR_A_D29
DDR_A_DQS#4
DDR_A_D52
DDR_A_DQS5
DDR_A_D54
DDR_A_D49
DDR_A_BS2
DDR_A_D45
DDR_A_D9
DDR_A_D7
DDR_A_MA1
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_BS0
DDR_A_CAS#
DDR_A_D37
DDR_A_MA5
DDR_A_DQS#1
DDR_A_MA14
DDR_A_D55
DDR_A_MA4
DDR_A_D21
DDR_A_D62
DDR_A_D24
DDR_A_D15
DDR_A_D23
DDR_A_D56
DDR_A_D53
DDR_A_D47
DDR_A_D18
DDR_A_D43
DDR_A_D34
DDR_A_D48
DDR_A_DQS#2
DDR_A_D11
DDR_A_D38
M_CLK_DDR0M_CLK_DDR#0
DDR_A_DQS#3
DDR_A_D32
DDR_A_D8
DDR_A_DQS1
DDR_A_MA13
DDR_A_MA11
DDR_A_D50
DDR_A_D61
DDR_A_MA2
DDR_A_D41
DDR_A_D17
DDR_A_D26
DDR_A_D63
DDR_A_D2
DDR_A_D5
DDR_A_D22
DDR_A_D25
DDR_A_DQS6
DDR_A_D35
DDR_A_D14
DDR_A_MA12
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_D42
+V_DDR_REFA
DDR_A_MA15
DDR_A_D39
DDR_A_DQS0
DDR_A_WE#
DDR_CKE1_DIMMA
DDR3_DRAMRST#
DDR_A_BS1
DDR_CS0_DIMMA#
M_CLK_DDR#1M_CLK_DDR1
DDR_A_RAS#
M_ODT0
M_ODT1
PCH_SMBCLKPCH_SMBDATA
DDR_A_D36
DDR_A_DQS#[0..7]6
DDR_A_DQS[0..7]6
DDR_A_MA[0..15]6
DDR_A_BS26
DDR_A_BS06
DDR_A_WE#6DDR_A_CAS#6
PCH_SMBDATA 12,14,37,40
DDR_A_D[0..63]6
DDR_CKE1_DIMMA 6
PCH_SMBCLK 12,14,37,40
M_CLK_DDR#1 6M_CLK_DDR1 6
M_ODT1 6
M_ODT0 6DDR_CS0_DIMMA# 6
DDR_A_RAS# 6DDR_A_BS1 6
DDR_CKE0_DIMMA6
M_CLK_DDR06M_CLK_DDR#06
DDR_CS1_DIMMA#6
DDR3_DRAMRST# 6,12
+0.75VS
+3VS
+1.5V +1.5V+V_DDR_REFA
+VREF_CA
+1.5V
+1.5V
+1.5V
+V_DDR_REFA
+1.5V
+0.75VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DDRIII DIMM
C
11 61Sunday, November 27, 2011
2011/11/02 2011/11/02
LA-8711
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DDRIII DIMM
C
11 61Sunday, November 27, 2011
2011/11/02 2011/11/02
LA-8711
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DDRIII DIMM
C
11 61Sunday, November 27, 2011
2011/11/02 2011/11/02
LA-8711
Layout Note: Place these 4 Caps near Commandand Control signals of DIMMA
DDR3 SO-DIMM A
3.56A@+1.5V
0.6A@+0.75VS
Layout Note:Place near JDIMM1
DDR3 SO-DIMM A
All VREF traces should
have 20 mil trace width
Delete DDR_A_DM[0..7]
LA-8041PSI# 8/16 Reserve 4 pcs 0.1uF for EMI noise issue
Standard
11/18 for layout spacing: remove CD5/CD6/CD9
Layout Note:Place near JDIMM1.203 & JDIMM1.204
11/21 1U*4 only
CD
16
10U
_0603_6.3
V6M
CD
16
10U
_0603_6.3
V6M
1
2
CD
25
0.1
U_0402_16V
7K
@
CD
25
0.1
U_0402_16V
7K
@
1
2
CD
14
10U
_0603_6.3
V6M
CD
14
10U
_0603_6.3
V6M
1
2
CD
10.1
U_0402_16V
7K
CD
10.1
U_0402_16V
7K
1
2
CD
17
10U
_0603_6.3
V6M
CD
17
10U
_0603_6.3
V6M
1
2
JDDRL1
LCN_DAN06-K4806-0102CONN@
JDDRL1
LCN_DAN06-K4806-0102CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
CD
20
0.1
U_0402_16V
7K
CD
20
0.1
U_0402_16V
7K
1
2
CD
18
0.1
U_0402_16V
7K
CD
18
0.1
U_0402_16V
7K
1
2
CD
22.2
U_0603_6.3
V6K
CD
22.2
U_0603_6.3
V6K
1
2
RD41K_0402_1%RD41K_0402_1%
12
CD
15
10U
_0603_6.3
V6M
CD
15
10U
_0603_6.3
V6M
1
2
CD
6
1U
_0402_6.3
V6K
CD
6
1U
_0402_6.3
V6K
1
2
RD31K_0402_1%RD31K_0402_1%
12
CD
26
0.1
U_0402_16V
7K
@
CD
26
0.1
U_0402_16V
7K
@
1
2
CD
11
2.2
U_0603_6.3
V6K
CD
11
2.2
U_0603_6.3
V6K
1
2
CD
23
2.2
U_0603_6.3
V6K
CD
23
2.2
U_0603_6.3
V6K
1
2R
D6
10K
_0402_5%
RD
610K
_0402_5%
12
CD
4
1U
_0402_6.3
V6K
CD
4
1U
_0402_6.3
V6K
1
2
CD
19
0.1
U_0402_16V
7K
CD
19
0.1
U_0402_16V
7K
1
2
RD11K_0402_1%RD11K_0402_1%
12
CD
24
0.1
U_0402_16V
7K
CD
24
0.1
U_0402_16V
7K
1
2
CD
10
0.1
U_0402_16V
7K
CD
10
0.1
U_0402_16V
7K
1
2
CD
13
10U
_0603_6.3
V6M
CD
13
10U
_0603_6.3
V6M
1
2
CD
12
10U
_0603_6.3
V6M
CD
12
10U
_0603_6.3
V6M
1
2
+ CD22330U_B2_2.5VM_R15M
SGA00004400
+ CD22330U_B2_2.5VM_R15M
SGA00004400
1
2
CD
28
0.1
U_0402_16V
7K
@
CD
28
0.1
U_0402_16V
7K
@
1
2
RD5 10K_0402_5%RD5 10K_0402_5%1 2
CD
5
1U
_0402_6.3
V6K
CD
5
1U
_0402_6.3
V6K
1
2
RD21K_0402_1%RD21K_0402_1%
12
CD
27
0.1
U_0402_16V
7K
@
CD
27
0.1
U_0402_16V
7K
@
1
2
CD
21
0.1
U_0402_16V
7K
CD
21
0.1
U_0402_16V
7K
1
2
CD
3
1U
_0402_6.3
V6K
CD
3
1U
_0402_6.3
V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VREF_CB
DDR_B_D31
DDR_B_D12
DDR_CKE0_DIMMB
DDR_B_D59
DDR_B_D6
DDR_B_MA3
DDR_CS1_DIMMB#
DDR_B_MA7
DDR_B_MA0
DDR_B_DQS7
DDR_B_D0
DDR_B_D57
DDR_B_D46
DDR_B_D28DDR_B_D19
DDR_B_DQS#5
DDR_B_D51
DDR_B_D4
DDR_B_D30
DDR_B_DQS2
DDR_B_D44
DDR_B_D33
DDR_B_D58
DDR_B_DQS3
DDR_B_MA8
DDR_B_D10
DDR_B_MA6
DDR_B_D27
DDR_B_D3
DDR_B_MA10
DDR_B_DQS#7
DDR_B_D1
DDR_B_DQS#6
DDR_B_D40
DDR_B_MA9
DDR_B_D16
DDR_B_D29
DDR_B_DQS#4
DDR_B_D52
DDR_B_DQS5
DDR_B_D54
DDR_B_D49
DDR_B_BS2
DDR_B_D45
DDR_B_D9
DDR_B_D7
DDR_B_MA1
DDR_B_D13
DDR_B_D20
DDR_B_D60
DDR_B_BS0
DDR_B_CAS#
DDR_B_D37
DDR_B_MA5
DDR_B_DQS#1
DDR_B_MA14
DDR_B_D55
DDR_B_MA4
DDR_B_D21
DDR_B_D62
DDR_B_D24
DDR_B_D15
DDR_B_D23
DDR_B_D56
DDR_B_D53
DDR_B_D47
DDR_B_D18
DDR_B_D43
DDR_B_D34
DDR_B_D48
DDR_B_DQS#2
DDR_B_D11
DDR_B_D38
M_CLK_DDR2M_CLK_DDR#2
DDR_B_DQS#3
DDR_B_D32
DDR_B_D8
DDR_B_DQS1
DDR_B_MA13
DDR_B_MA11
DDR_B_D50
DDR_B_D61
DDR_B_MA2
DDR_B_D41
DDR_B_D17
DDR_B_D26
DDR_B_D63
DDR_B_D2
DDR_B_D5
DDR_B_D22
DDR_B_D25
DDR_B_DQS6
DDR_B_D35
DDR_B_D14
DDR_B_MA12
DDR_B_DQS#0
DDR_B_DQS4
DDR_B_D42
+V_DDR_REFB
DDR_B_MA15
DDR_B_D39
DDR_B_DQS0
DDR_B_WE#
DDR_CKE1_DIMMB
DDR3_DRAMRST#
DDR_B_BS1
DDR_CS0_DIMMB#
M_CLK_DDR#3M_CLK_DDR3
DDR_B_RAS#
M_ODT2
M_ODT3
DDR_B_D36
PCH_SMBCLKPCH_SMBDATA
DDR_B_DQS[0..7]6
DDR_B_MA[0..15]6
DDR_B_BS26
DDR_B_BS06
DDR_B_WE#6DDR_B_CAS#6
PCH_SMBDATA 11,14,37,40
DDR_B_D[0..63]6
DDR_CKE1_DIMMB 6
PCH_SMBCLK 11,14,37,40
M_CLK_DDR#3 6M_CLK_DDR3 6
M_ODT3 6
M_ODT2 6DDR_CS0_DIMMB# 6
DDR_B_RAS# 6DDR_B_BS1 6
DDR_CKE0_DIMMB6
M_CLK_DDR26M_CLK_DDR#26
DDR_CS1_DIMMB#6
DDR3_DRAMRST# 6,11
DDR_B_DQS#[0..7]6
+1.5V
+0.75VS
+3VS
+1.5V +1.5V+V_DDR_REFB
+VREF_CB
+1.5V
+1.5V
+1.5V
+V_DDR_REFB
+3VS
+0.75VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DDRIII-DDRH
12 61Sunday, November 27, 2011
2011/11/02 2011/11/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DDRIII-DDRH
12 61Sunday, November 27, 2011
2011/11/02 2011/11/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DDRIII-DDRH
12 61Sunday, November 27, 2011
2011/11/02 2011/11/02Compal Electronics, Inc.SI# 8/16 Reserve 4 pcs 0.1uF for EMI noise issue
Layout Note: Place these 4 Caps near Commandand Control signals of DIMMA
DDR3 SO-DIMM B
3.56A@+1.5V
0.6A@+0.75VS
Layout Note:Place near JDIMM1
DDR3 SO-DIMM B
All VREF traces should
have 20 mil trace width
Delete DDR_B_DM[0..7]
10/03 change to +V_DDR_REFB
10/03 change to +VREF_CB
10/03 change to +V_DDR_REFB
Standard
10/05 change to PH.
Layout Note:Place near JDIMM1.203 & JDIMM1.204
11/18 for layout spacing: remove CD51/CD54/CD53
11/21 keep 1u*4 only -Kenny
RD111K_0402_1%RD111K_0402_1%
12
CD
53
1U
_0402_6.3
V6K
CD
53
1U
_0402_6.3
V6K
1
2
CD
46
10U
_0603_6.3
V6M
CD
46
10U
_0603_6.3
V6M
1
2
CD
32
0.1
U_0402_16V
7K
@
CD
32
0.1
U_0402_16V
7K
@
1
2
CD
56
10U
_0603_6.3
V6M
CD
56
10U
_0603_6.3
V6M
1
2
RD
910K
_0402_5%
RD
910K
_0402_5%
12
CD
38
0.1
U_0402_16V
7K
CD
38
0.1
U_0402_16V
7K
1
2
CD
51
1U
_0402_6.3
V6K
CD
51
1U
_0402_6.3
V6K
1
2
+ CD36330U_B2_2.5VM_R15M
SGA00004400
+ CD36330U_B2_2.5VM_R15M
SGA00004400
1
2
CD
45
10U
_0603_6.3
V6M
CD
45
10U
_0603_6.3
V6M
1
2
RD81K_0402_1%RD81K_0402_1%
12
CD
34
0.1
U_0402_16V
7K
@
CD
34
0.1
U_0402_16V
7K
@
1
2
CD
47
0.1
U_0402_16V
7K
CD
47
0.1
U_0402_16V
7K
1
2
CD
48
1U
_0402_6.3
V6K
CD
48
1U
_0402_6.3
V6K
1
2
CD
42
10U
_0603_6.3
V6M
CD
42
10U
_0603_6.3
V6M
1
2
CD
35
0.1
U_0402_16V
7K
@
CD
35
0.1
U_0402_16V
7K
@
1
2
CD
41
1U
_0402_6.3
V6K
CD
41
1U
_0402_6.3
V6K
1
2
CD
29
2.2
U_0603_6.3
V6K
CD
29
2.2
U_0603_6.3
V6K
1
2
CD
55
0.1
U_0402_16V
7K
CD
55
0.1
U_0402_16V
7K
1
2
RD101K_0402_1%RD101K_0402_1%
12
CD
31
2.2
U_0603_6.3
V6K
CD
31
2.2
U_0603_6.3
V6K
1
2
CD
44
0.1
U_0402_16V
7K
CD
44
0.1
U_0402_16V
7K
1
2
JDDRL2
LCN_DAN06-K4406-0102CONN@
JDDRL2
LCN_DAN06-K4406-0102CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639