PWM Control 2A Step-Down Converter - Lite-On · PDF fileLSP5504 PWM Control 2A Step-Down Converter 3/14 Ver.1.2 Functional Block Diagram Output Buffer Absolute Maximum Ratings Parameter

LSP5504 PWM Control 2A Step-Down Converter

1/14 Ver.1.2

Typical Application Circuit

LSP5504

Vout=5V/2A

Applications Cellular Phones PC Motherboard LCD Monitor Graphic Card DVD-Video Player Telecom Equipment ADSL Modem Networking power supply Microprocessor core supply Printer and other Peripheral Equipment

General Description

The LSP5504 is high efficiency, simple to use, 2A step-down regulator flexible enough to be optimized for a variety of applications.

LSP5504 provides low-ripple power, high efficiency, and excellent transient characteristics. The PWM control circuit is able to vary the duty ratio linearly from 0 up to 100%. This converter also contains an error amplifier circuit as well as a soft-start circuit that prevents overshoot at startup. An enable function, an over current protect function and a short circuit protect function are built inside, and when OCP or SCP happens, the operation frequency will be reduced from 300KHz to 50KHz. Also, an internal compensation block is built in to minimum external component count.

With the addition of an internal buffer driver, a coil, capacitors, and resistors connected externally, these ICs can function as step-down switching regulators. They serve as ideal power supply units for portable devices when coupled with the SOP-8L mini-package, providing such outstanding features as low current consumption. Since this converter can accommodate an input voltage up to 18V, it is also suitable for the operation via an AC adapter.

Features

Input voltage: 3.6V to 18V. Output voltage: 0.8V to VCC. Duty ratio: 0% to 100% PWM control Oscillation frequency: 300KHz typ. Soft-start, Current limit, Enable function Thermal Shutdown function SOP-8L Package.


2/14 Ver.1.2

Ordering Information

Package:S: SOP-8L

Packing:A: Tape & Real

Temperature Grade:C: -20 ~ +85°C

LSP5504 X X X X

Output Voltage:Blank: Adj

Pin Assignment

8

5

6

7

1

2

3

4

SOP-8L

Top View

FB

EN

OCSET

VCC

VSS

VSS

OUTPUT

OUTPUT

Pin Description

Pin NO. Pin Name Pin Description

1 FB Feedback Pin

2 EN Enable Input Pin. H: Normal operation. L: All circuits deactivated.

3 OCSET Add an external resistor to set max output current

4 VCC IC power supply pin

5,6 OUTPUT Switch pin. Connect external inductor here. Minimize trace area at this pin to reduce EMI.

7,8 VSS GND pin


3/14 Ver.1.2

Functional Block Diagram

Output Buffer

Absolute Maximum Ratings

Parameter Value Unit

VCC Pin Voltage, VCC VSS-0.3 to VSS+20 V

Feedback Pin Voltage, VFB VSS-0.3 to VCC V

EN Pin Voltage, VEN VSS-0.3 to VIN + 0.3 V

Switch Pin Voltage, VOUTPUT VSS-0.3 to VIN + 0.3 V

Power Dissipation, PD Internally limited mW

Operating Range, TOP -20 to 85 °C

Storage Temperature Range, TSTG -40 to +150 °C

Note: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability.


4/14 Ver.1.2

Electrical Characteristics (VIN = 12V, TA= 25°C, unless otherwise specified.)

Parameter Symbol Test Conditions Min. Typ. Max. Unit

Input Voltage VIN 3.6 18 V

Feedback Voltage VFB IOUT= 0.1A 0.784 0.8 0.816 V

Feedback Bias Current IFB IOUT= 0.1A 0.1 0.5 µA

Switch Current ISW 3.5 A

Current Consumption During Power Off ISSS VEN = 0 10 µA

Line Regulation ∆VOUT / VOUT VIN =5V~18V, IOUT= 0.3A 1 2 %

Load Regulation ∆VOUT / VOUT IOUT= 0.1A~0.3A 0.2 0.5 %

Oscillation Frequency fosc Measure waveform at SW pin 240 300 360 KHz

Frequency of Current Limit or Short Circuit Protect fosc1 Measure waveform at SW pin 30 50 70 KHz

VSH Evaluate oscillation at SW pin 2.0 Enable Pin Input Voltage

VSL Evaluate oscillation stop at SW

pin 0.8 V

ISH 20 Enable Pin Input Leakage Current ISL -10

µA

OCSET Pin Bias Current IOCSET 85 100 115 µA

Soft-Start Time tSS 0.3 2 5 ms

VIN =5V, VFB = 0 80 90 Internal MOSFET Rdson Rdson

VIN =12V, VFB = 0 50 65 mΩ

Efficiency EFFI VIN =12V, VOUT =5V,

IOUT= 2A 91 %

Thermal Resistance

Junction to Ambient θJA 65 °C/W

Thermal Resistance

Junction to Case θJC 20 °C/W

Over temperature shutdown TSD 150 °C

Over temperature shutdown Hysteresis THYS 25 °C


5/14 Ver.1.2

Application Description

CON1

CON1_1 CON1_1

CON3

C1

470uF/25V

C3

0.1uF

R2

0.1uF

R2

4.7K

C5

NC

U1

LSP5504

VCC

OCSET

EN VSS VSS

FB

OUTPUT

OUTPUT

L1

D122uH

C6

NC

R3

31K

R4

10K

C2

NC

C7 C8

C4

100K

470uF/6.3V

470uF/6.3V

CON2

CON1_1

CON4

CON1_1

1. PWM Control

The LSP5504 is a DC/DC converter that employs a pulse-width modulation (PWM) system. The pulse width varies in a range from 0 to 100%, according to the load current. The ripple voltage produced by the switching can easily be removed through a filter because the switching frequency remains constant. Thus, the converter provides a low-ripple power over broad ranges of input voltage and load current.

2. Under Voltage Lockout

The under voltage lockout circuit of the LSP5504 will turn off PWM-Switched control circuit when the supply voltage drops below 3.3V. Normal operation resumes once VCC rises above 3.5V.

3. Output Voltage Programming

Output voltage can be set by a resistor divider network. In this application circuit, a designer can calculate the Vout as below equation:

⎟⎟⎠

⎞⎜⎜⎝

⎛+×=

B

AOUT R

RV 18.0

The resistor should be large enough to avoid power loss in feedback voltage divider that combination of RA and RB. And the lower resistor values minimize noise pickup in the sensitive feedback pin. Designer can reference the values of Table 1, to initial your design.

Vout is determined by the two feedback resistor And the Vout=VFB*(1+R3/R4)=0.8V*(1+R3/R4) the feedback resistor table for some common output voltage is list below:

the feed forward capacitor C6： The feed forward capacitor is the capacitor which connects the feedback resistor R3 in parallel, referring to the schematic circuit in page 6; the C6’range is 100pF~1nF; And you had better layout C6’s position and add C6 to add up the loop stability when you find the switching waveform swing left and right.

Vout 0.8V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 5.0V R3 (KΩ) 1 0.47 1.0 1.3 2.5 4.7 4.7 6.8 R4(KΩ) open 2.0 2.0 1.5 2.0 2.2 1.5 1.3


6/14 Ver.1.2

3.1 Inductor selection： To Buck DC/DC, the inductor’s formula is listed below: L≥Vout*(Vin min-Vout)/(Vin*fsw*0.2*Iload max) The below inductor selection table is for some common output voltage application:

Vin=5V

Vout 0.8V 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V N/A L 5uH 6.8uH 6.8uH 6.8uH 10uH 10uH 10uH N/A

Vin=12V

Vout 0.8V 1.0 V 1.2V 1.5V 1.8V 2.5V 3.3V 5.0V L 5uH 6.8uH 6.8uH 10uH 10uH 15uH 15uH 22uH

Vin=18V

Vout 0.8V 1.0 V 1.2V 1.5V 1.8V 2.5V 3.3V 5.0V L 5uH 6.8uH 6.8uH 10uH 10uH 15uH 22uH 22uH

3.2 Output capacitor selection： The output capacitor type must be Aluminum Electrolytic Capacitor or Tantalum Capacitors, not MLCC capacitor; The capacitor voltage rating should be at least 1.5 times greater than the output voltage, and often much higher voltage ratings are needed to satisfy the low ESR requirements needed for low output ripple voltage. Output capacitor’s ESR≤Vripple/(2* Iload min) For typical Vout≤5V,we use 470uF/10V Aluminum Electrolytic Capacitor 3.3 Input capacitor selection： This capacitor should be located close to the IC using short leads and the voltage rating should be approximately 1.5 times the maximum input voltage. And Input capacitor’s RMS current is calculated by the below formula:

Symbol Calculation

δ TON TON +TOFF

IPK Iload max + Iload min Im Iload max - Iload min IL 2×L LOAD(min)

IIN(rms)


7/14 Ver.1.2

3.4 R1 selection： R1 is used for limit the maximum inductor peak current in order to realize the OCP function; R1’s formula is listed below： Ipeak ×Rds(on) =Iocset × R1； Ipeak is the maximum inductor peak current, in general, Ipeak=1.1* Iload max，and we define Ipeak=3.5A for LSP5504, Iocset=100uA for LSP5504,； the below R1 table for common combination with Vin and Vout：

Vin Vout

5V 12V 18V

0.8V 4.7KΩ 3KΩ 3.3KΩ

1.0V 5.6KΩ 3KΩ 3.9KΩ

1.2V 5.6KΩ 3KΩ 3.9KΩ

1.5V 5.6KΩ 3KΩ 3.9KΩ

1.8V 5.6KΩ 3KΩ 3.9KΩ

2.5V 5.6KΩ 3KΩ 3.9KΩ

3.3V 5.6KΩ 3KΩ 3.9KΩ

5.0V N/A 3KΩ 4.7KΩ

3.5 delay startup R2 C4 selection： The R2 and C4 connected with LSP5504’s PIN2 constitute the integrator circuit which realize the delay startup function. The voltage of CEN’formula:

VEN=1.3V for LSP5504，t=R2*C4，so for R2=100K，C4=0.1uF，delay time=1.147mS 4. Design Example： 4.1 the target design specification： Input Power Vin max = +12V; Vin min = +12V Regulated Output Power Vout = + 5V; Iload max = 2.0A; Iload min = 0.2 A Output Ripple Voltage Vripple ≤50 mV peak-to-peak Output Voltage Load Regulation 1% (1/2 full load to full load) Efficiency 91% minimum at full load Switching Frequency f = 300KHz ± 15 %


8/14 Ver.1.2

VRIPPLE

2×ILOAD(min)

4.2 Calculating and Components Selection：

Calculation Formula Select Condition Component spec.

R3 = R4×( −1) 470Ω ≤R4≤5KΩ R4=1.3KΩ;

R3=6.8KΩ

Lmin ≥ (Vin min - VOUT) ×Vout Vin min*fsw*0.2*Iload max

L(min) ≥22µH Irms ≥ IPK = 2.2 A 22µH/2.5A

ESR= VWVDC≥1.5× VOUT

ESR≤125mΩ VWVDC ≥ 7.5V 470uF/10V

IIN(rms)=

VWVDC≥1.5× VIN(max)

Iripple≥IIN(rms)≥1.29 A VWVDC ≥ 18V 470uF/25V

4.3 BOM： Item Part Number MFG/Dist. Description Value Quan C1 MK1CM471JA0OT AISHI Aluminum electrolytic 470μF, 16V 1

C3 Ceramic capacitor 0.1μF, 50V 1


C5 Ceramic capacitor 1nF, 50V 1

C6 Ceramic capacitor 100pF, 50V 1

C2 MK1CM471JA0OT AISHI Aluminum electrolytic 470μF, 16V 1


D1 Schottky diode B240A 0

L1 Inductor 22μH, 2.5A 1

U1 LSP5504 Liteon semi corp PWM buck converter 300KHz, 2A 1

R2 Std Film chip resistor 100K 1

R1 Std Film chip resistor 3.0 K 1

RA Std Film chip resistor 6.8KΩ±1%, 1/8W 1

R4 Std Film chip resistor 1.3KΩ±1%, 1/8W 1

VOUT VREF


9/14 Ver.1.2

4.4 Layout： 4.5.1 the actual Layout：

4.5.2 Layout suggestion：

4.5.2.1 Cin and Cout should be used over 220uF high frequency low ESR Aluminum Electrolytic Capacitor or Tantalum Capacitors, not MLCC capacitor. It is recommended to add a 0.1uF MLCC decoupling capacitor (Decoupling capacitor must be connected by the same copper). Place the Cin and Cout capacitor as close as possible to the IC. Care should be taken to minimize the loop area formed by the Cin capacitor connections, the IN pin, and the ground pin. It is suggested to use VIAs around Cin negative pole from top side to bottom side. 4.5.2.2 OUT PIN (PIN5/6)’s copper should be large enough to reduce the thermal resistance, which helps to distribute the heat of the internal PMOSFET and reduce LSP5504’s temperature. Inductor should be close to OUT PIN, to avoid the high frequency oscillation caused by inductor’s drain capacitance and trace’s distributed capacitance.


10/14 Ver.1.2

4.5.2.3 minimize the output current loop area( surround by OUT pin, L1, Cout and GND). 4.5.2.4 Connect the VOUT trace to the FB pin using the resistor divider network to set the output voltage. Do not route this trace too close to the SW trace. Due to the size of the IC package and the device pin-out, the trace may need to be routed under the output capacitor. Alternately, the routing may be done on an alternate layer if a trace under the output capacitor is not desired. And it is better to make the sampling point is the maximum current point of load. The sampling line should not overflow large current. 4.5.2.5 The copper trace’s width should be large enough for the large current path, 40 mil trace per 1A. Such as the path from Vin to LSP5504’s PIN4; the path from LSP5504’s PIN5/6 to L1; the path from L1 to Vout; It should add VIAs from LSP5504’s PIN7/8 to the bottom GND. 4.5.2.6 It should avoid to layout signal or other power line under the inductor L1, and avoid to layout GND trace under the inductor L1,It is better to keep 15 mil distance around SW’s trace. 4.6 Demo board test data and curve(VOUT=5V)

4.6.1 quiescent current IQ 12 24 #1 4.50 3.83 #2 4.56 3.90

AVG 4.53 3.87

4.6.2 load regulation / line regulation IL 0 100 300 500 1000 1500 12 5.090 5.070 5.040 5.040 5.040 5.050 24 5.100 5.120 5.100 5.100 5.100 5.100 % 0.196 0.986 1.190 1.190 1.190 0.990

4.6.3 VFB

IL 0 100 300 500 1000 1500 2000 12 0.814 0.811 0.806 0.806 0.806 0.808 0.806 24 0.816 0.819 0.816 0.816 0.816 0.816 0.816

4.6.4 Efficiency curve

eff 100 300 500 1000 1500 2000 12V 81.25 89.36 91.30 92.11 92.56 91.50 24V 56.14 76.81 81.73 86.03 87.33 87.63


11/14 Ver.1.2

Typical Characteristics

0.78

0.79

0.80

0.81

0.82

0.83

0 2 4 6 8 10 12 14 16 18

VIN vs. VFB(VOUT =3.3V, IOUT = 0.2A)

VFB

(V)

VIN (V)

300

310

320

330

340

350

0 2 4 6 8 10 12 14 16 18VIN (V)

VIN vs. Frequency(VOUT =3.3V, IOUT = 0.2A)

FO

SC

(kH

z)

3.00

3.10

3.20

3.30

3.40

3.50

0 2 4 6 8 10 12 14 16 18VIN (V)

VO

UT

(V)

Line Regulation(VOUT =3.3V, IOUT = 0.2A)

3.25

3.27

3.29

3.31

3.33

3.35

0.0 0.5 1.0 1.5 2.0

VO

UT

(V)

IOUT (A)

Load Regulation(VIN =12V)

50%

60%

70%

80%

90%

100%

0.0 0.5 1.0 1.5 2.0

Efficiency(VIN =12V, VOUT =3.3V)

Effi

cien

cy (%

)

IOUT (A)


12/14 Ver.1.2

Typical Characteristics (Continued) Vout Ripple Vout Ripple

( Vin =12V; Vout = 3.3V; Iout = 0.1A ) ( Vin = 12V; Vout = 3.3V; Iout = 2A )


13/14 Ver.1.2

Test Circuit 1) Enable Function Test 2) Feedback Function Test

3) Operation Function Test

Marking Information


14/14 Ver.1.2

Package Information

SOP-8L:

Dimensions In Millimeters Dimensions In Inches

Symbol Min. Nom. Max. Min. Nom. Max.

A 1.35 1.6 1.75 0.053 0.063 0.069

A1 0.1 0.25 0.004 0.01

A2 1.25 1.45 1.55 0.049 0.057 0.061

B 0.31 0.41 0.51 0.012 0.016 0.02

C 0.1 0.2 0.25 0.0039 0.008 0.01

D 4.8 4.9 5 0.192 0.196 0.2

E 3.8 3.9 4 0.148 0.154 0.16

e 1.27 BSC 0.050 BSC

H 5.7 6 6.3 0.224 0.236 0.248

L 0.4 0.71 1.27 0.015 0.028 0.05

θ 0ο 8ο 0ο 8ο

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PWM Control 2A Step-Down Converter - Lite-On · PDF fileLSP5504 PWM Control 2A Step-Down Converter 3/14 Ver.1.2 Functional Block Diagram Output Buffer Absolute Maximum Ratings Parameter