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Projects overview Dr. Evgeny Chernyavskiy PhD in Semiconductor Physics and Solid State Electronics Senior Research Scientist Chip Design Engineer [email protected]

Project_Overview_Chernyavskiy

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Page 1: Project_Overview_Chernyavskiy

Projects overview Dr. Evgeny Chernyavskiy

PhD in Semiconductor Physics and Solid State Electronics

Senior Research ScientistChip Design [email protected]

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Personal Born 30th August, 1962. Married. Speak, read and write English fluently.Mother tongue – Russian. Technical German - good

Academic qualifications:2000 – 2004: PhD. in Semiconductor Physics and Solid State Electronics, Institute of Semiconductor Physics, SB RAS.

PhD Thesis: Quasi static simulation of maximum controllable current density in MOS controlled thyristor.

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Multi-Silicon solar cell

Advantages

Cost-effective technologyMono-silicon competitive Efficiency 11.2%Cell area 1 cm^2 Using Transparent metallization ITO

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Integrated Sensors

Humidity sensor – Integrated capacitorPressure sensor – bulk silicon, orientation (110) Design and manufacturing BIB (Blocked Impurity

Band) Photoresistors for the 12-16 micron wavelength, 64x64 array, flip chip mounting with multiplexor, cooled T=10 K.

Design and manufacturing 64 cells microbolometer linear array.

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Fast Recovery Diode (FRD) manufacturing

First Shot Diode leakage current density comparison with ABB diode, U=1200 V.

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MOS Gated Power Devices

Areas of expertise

• Device Physics

• Modeling

• Manufacturing and Testing • Integration scale 200 000

GatesArray structure of MOS controlled thyristor

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Device Physics

New criterion for evaluating the maximum controllable current density in MCTs has been offered.

If the electron concentration is lower than the acceptor concentration (n < Na) when a negative gate voltage is applied, then current density is controllable. Result was approved by ABB

[1] E. Chernyavskiy PhD Dissertation, 2004[2] Friedhelm Bauer, „Bipolar superjunction Power Devices: A case study for complex

numerical modeling“, ABB Switzerland Ltd., ROBUSPIC Workshop, ISPSD 2006.

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MCT Structure, Compact Model

Tools: Synopsys Tcad, Silvaco TCAD

New approach for simulation MOS controlled thyristor.

Offered MOS gated p-i-n diode model reflecting carrier distribution in thyristor. MOS controlled thyristor equivalent circuit.

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MCT Manufacturing and Testing

Maximum anode voltage 2.5 kVMaximum controllable current density 100-150 A/cm2 Active area 0.33 cm2

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MCT carrier lifetime control

Carrier lifetime control technologyReduced turn-off time for irradiated (b) MCT in comparison with non-irradiated MCT (a)

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Trench Gate Technology

Distribution of the electrons (a) and holes (b) current density's in MOS-gated trench P-I-N diode. The gate voltage Vg=-15 V, total current density is 160 A/cm2.

Carrier lifetime is 25 μs.

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Deep Trench with Field Plate MOSFET

Deep Trench MOSFET termination structure BV=400V. A combination floating gates and blanket JTE.

Deep Trench Structure Potential distribution at Vd=400V

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HV-IGBT Design, manufacturing, testing

Active area 1 cm2, Die size 1.4x1.4 mm, Presspack mounting.Voltage 4500 V, On-state current 50 A, Saturation voltage Vc sat=2.6 V

Newly Developed: JTE VLD Optimization and Design (Own theoretical results)Effective hot (T=125 C) leakage current suppression, Jleak<1mA/cm2, Vce=4.5 kV

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HV-IGBT Design, manufacturing, testing

Internal Gate Resistor (5 Ohm)

For parallel operation.

Controlled Short Circuit Current Density 420 A/cm2 , Pulse Power Density 1MWt/cm^2, pulse time = 10 us

Short circuit current degradation

because of hot leakage current

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Junction Termination Extension with Variation Lateral Doping (JTE VLD)

A New mathematical method for optimization VLD structure was developed and tested for IGBT HV die edge terminationBV= 5200 V

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Superjunction MOSFET (CoolMOS)Design, manufacturing and testing

• 600 V, 20 A, Ron*A=25 mOhm*cm^2• Original cell design • New termination system (epi layer concentration Nd= 3E15 cm^-3)• New concept for SJ layer manufacturing• New concept for short circuit behaviour and avalanche current density Jas.

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SJ Device Physic

SJ lateral depletion constraintsTopology: Stripes and columnsTechnology:Implanted and filled

RonA and manufacturabilityTrade-Off.BV=600 V, Cell pitch=12 um

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SJ LDMOS - Expanding limits

Lateral and Vertical Devices Voltage Range - Economy Limits

BV increasing – 2 timesRon redusing 120/BV times

SJ LDMOS integrated Push-Pull Output Stage

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Project management skills

International team supervising: USA, UK, Germany, Switzerland, Korea

Hyundai KTX-II high-speed train propulsion system.

Press-pack IGBT 4.5 kV

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VHDL-AMS compact modeling skills

Experienced with RF Rincon™ Harmonic Balance VHDL-AMS simulator.

Developed VHDL compact models for MOSFET, BJT, HBT, JFET, MESFET, HEMT.

Features: self heating effects, radiation-induced damage effects,hot carrier damage effects, Failure Mechanisms and Reliability Modeling.

Ridgetop Group, Inc. is the world leader in providing electronic prognostics (ePHM),

semiconductor IP blocks and Built-in Self Test (BIST) solutions. The mission of the

Ridgetop Group is to provide advanced tools, intellectual property, and services to its

customers where enhanced reliability and performance are of utmost importance.

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VHDL Compact Modelling

Capacitance – voltage curvesfor different models and conditions

Basis function set.Examples: Polynomial basis, Fourier basis,Radial basis function (RBF)

Offered Step function basis f(x)=(exp(Cx-B)-exp(-Cx-B))/(exp(Cx-B)+exp(-Cx-B)+2A)

Decomposed function is a sum of basis FunctionsF(x)=K1*f(x)+K2*f(x)+...+Kn*f(x)

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ChemFET and enzyme - protein sensitive FET

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Geiger Mode APD Simulation

Single photon pulse and avalanche

Self-quenching behaviour

Floating P-well and conventional APD

Pulse shape comparison

Floating P-well 3D structure, 4x4 um

Geiger mode Multipixel Avalanche Photodiode (MAPD) cell simulation study was performed. Transient current waveforms corresponded single photon event upset was obtained in case of conventional APD and floating P-well APD cell. Results indicate advantages of P-welled APD cell in comparison with conventional structure. Current pulse FWHM was reduced in factor of two at the multiplication factor M=30000. At the same conditions current tailing was reduced in factor of eight. A floating P-well APD cell demonstrates an outstanding time resolution characteristics for single photon detectors.

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List of publications P. A. Borodovskii, A. F. Buldygin, A. S. Tokarev and E. V. Chernyavskiy, "Method for the Microwave Measurement of Carrier Lifetime in Lightly Doped Silicon Ingots", Russian Microelectronics Volume 34, Number 5 (2005), pp. 316 – 324

E. Chernyavskiy, V. Popov, B. Vermeire, “Thyristor - MCT - with High Controllable Current Density”, 27th International Conference on the Physics of Semiconductors (ICPS-27), AIP Conference Proceedings, Volume 772, pp. 1507-1508 (2005).

E.V. Chernyavskiy, V.P.Popov, Yu.S. Pakhmutov and Safronov L.N., Carrier Lifetime and turn-off current control by electron irradiation of MCT, Nuclear Instruments and Methods in Physic Research B, v.186, 2002, pp. 157-160.

E.V. Chernyavskiy, V. P. Popov, Yu. S. Pakhmutov, and L. N. Safronov, MOS-Controlled Thyristor: A Study of a Promising Power-Switching Device , Russian Microelectronics, v.31, N 5, 2002, p.318.

E.V. Chernyavskiy, V. P. Popov, Yu. S. Pakhmutov, and L. N. Safronov, Trench-Gate MOS-Controlled Thyristor: An Evaluation, Russian Microelectronics, v.31, N 5, 2002, p.323.

E.V. Chernyavskiy, V.P.Popov, Yu.S. Pakhmutov, Yu.I. Krasnikov and L.N. Safronov, Transient Responses of Electron-Irradiated MOS-Controlled Thyristors, Fiz. Tekh. Poluprovodn. (S.-Peterburg), 2001, vol. 35, issue 9, p. 1154.

E.V. Chernyavskiy, V.P.Popov, Yu.S. Pakhmutov, Yu.I. Krasnikov and L.N. Safronov,, Dynamic and Static Characteristics of MOS Thyristors Irradiated with Electrons, Chemistry for Sustainable Development, 2001, 9, pp.65-69

E.V. Chernyavskiy, V.P.Popov, Yu.S. Pakhmutov, Yu.S., Mirgorodsky, Yu.N., and Safronov, L.N., A Project of Bipolar Field-Effect Transistor(IGBT) 50A 1800V Manufactured on the Plates of High-Resistance Crucible-Free Silicon with Orientation (100), Chemistry for Sustainable Development, 2001, 9, pp.71-73

D.G. Esaev, S.P. Sinitsa, E.V. Chernyavskiy, - "Current - voltage characteristics of Si:As blocked impurity band photodetectors", Fizika i Teknika Poluprovodnikov ,Vo. 33, No. 5, pp. 613-618 (1999).

D.G. Esaev, S.P. Sinitsa, E.V. Chernyavskiy, - "Current - voltage characteristics of Si:As blocked impurity band photodetectors (BIB-II)", Fizika i Teknika Poluprovodnikov ,Vo. 33, No. 8, pp. 1005-1009 (1999).