Presentation byTom Hummel

OverSoC: A Framework for the Exploration of RTOS for RSoC

Platforms

Background

Complexity of SystemsParallelismMemory ManagementConcurrency

Design ExplorationTestingValidation Experimentation

2

Motivation

Prior WorksDo not consider dynamic reconfigurationDo not provide OS-like resources and

programming model

Framework must provide exploration ofSpatiotemporal SchedulingReconfiguration and Resource ManagementTask Pre-emption and migrationInter-process communication

3

Platform ExplorationHierarchal

Top down designEvaluation at each level

Performance MetricsUser DefinedSystemC Simulation Model

4

System Description3 Elements

Operating SystemCommunication

Memories and resourcesProcessing

GPU’s and DRA’s (Reconfig Blocks)

AbstractionLayers are separated via API’sEvaluation and exploration at each levelSystemC based simulation

5

Refinement

Process Element RefinementVirtual Nodes

Functional SimulationAnnotated Nodes

Functional with timing constraintsCycle Accurate Nodes

GPU and DRA simulationsRTL Nodes

Bit level accuracy

6

Refinement

7

RTOS IntegrationSystemC OS

Highly AbstractDesigned to be service and

time accurateTest various scheduling

algorithms and resource sharing methods

CommunicationsProxy like resource

accessDoes not distinguish

between HW/SWInstantaneous

Communication

8

Reconfiguration

DRA PortioningRe-active ComponentsActive ComponentsTask Parameters

MultilevelAllocation problem

defined as 3 levels for verification

Provides determinism in case HW version of task cannot run, software can take over

9

Reconfiguration

10

DOGME ToolDesign Exploration Tool

Platform DesignSystemC Code GenerationCompilation and SimulationAnalysis

11

Processor Modeling

Instruction Set SimulatorAVR Instruction Set

Easy to model and many compilersSystemC Based

Cycle accurate explorationPredictable Execution

Code broken into blocks which encapsulate system call free code

Improves simulation performance

12

Validation

ApplicationRobotic Vision (Object Recognition)Nios-II on Cyclone-II SoC PlatformuC/OS-II style services

Ability of FrameworkOptimal number of CPU’s determinedTask timing versus size of reconfigurable blocksOccupation rate of reconfigurable blocksSimulation time proportional to number of OS in

system

13

14

15

16

Opinion

Long PaperCould be divided into 2-3 papers

Poor FlowDescription of DOGME platform is begun in middle of

paper, yet most of its features are elaborated in the experimental section

Vague DescriptionsExplanation of inter-OS communication not well describedCommunication Elements were not elaborated on

ISS Architecture vs. ExperimentationISS Simulator uses AVR IS, however simulation was

performed on a NIOS-II. This discrepancy was not addressed

17

ReferencesMiramond, B., Huck, E., Verdier, F.,

Benkhelifa, M. E. A., Granado, B., Aichouch, M., et al. (2009). OveRSoC : A framework for the exploration of RTOS for RSoC platforms. International Journal on Reconfigurable Computing, 2009(450607), 1-18.

18