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1I1iS lNI:ORMA nOI\! IS CONFIDENTIAL AND PfiUPHll T AAY TO WD':: AND SHALL NOT BE .,fHP',ODUCED OR FURTHER DISCLOSED TO II.~·(ONE OTHER THAN WDC EMPLOVEES WITHOUT WRITTEN AUTHORIZATION FROM WESTERN DIGITAL CORPORATION.
PREPARED BY
APPO R" D
A.PPD ENG
APPO OP'S
PRELIMINARY
C P 1 631 8
512 X 22 MICROPROGRAM ROM
(MICROM)
PRELIMINARY
TITLE WI.TIRN ¢ DIDITAI. 512 X
n • '" .' .. A' D '"
ISSUE DATE SHEET NUMBER
1 of 14 500281
Rev. 1 1-/5-- I j 1\
r~ev , 2-25-74 f~
Rev. 4-10-74 C Rev. 6-3-74 D Rev. 10-2-74 E Q.o. "-111-711 r' Rev. 11-20-74 ( )
Rev. 12-11-74 II
Rev. 12-16-74 I Rev. 1-30-75 J
Rev, 3-26-75 V
Rev. 5-2-75 l
Rev. 12-15-7~J t'
,
CP16S 1B 22 MICfWPROGHAM f~( )M I (MICROM)
-REV
M
l'~"S 11111 ORMA T lUi. r:, <"'Vr'fr v .. ,~, __
'fH)PAI~ TAAY TO WDC AND SHALL NOT BE iUPfi')()UCEO OR FURTHER DISCLOSED TO ~NYONE OTHE R THAN woe EMPLOYEES NIHWUr WRITTEN AUTHORIZATION FROM " .... ESTERN DIGITAL CORPORATION,
INTRODUCTION
The WDC CP16318 (MICROM) is a 512 word by 22-bit N-channel si I icon gate ROM.
The RQt.1 coding is programmed on the diffusion mask level (IN). The primar-y appl i-
cation for the ROM is for microprogram storage In the WDC microprocessor system.
It is designed to interface directly with the CP16118 and CP1621S microprocessor
chip set. The chip is packaged in a 40-lead plastic cavity dual-in-I ine packagp.
FEATURES
OPH<ATION ----,,--
Organization - 512 X 22
Access T I me - < 200 nsec
Si-Directional, Common Address and Data Sus Directly Compatible With WDC Microprocessor Microinstruction Sus
Low Power Dissipation - Typically 150 mW
Four High Voltage Clocks
The basic operation of the microinstruction Control ROM (MICROM) is io receive
addresses sent on the Microinstruction Sus (MIS) from the location counter of Itw
CP16218 Control Chlpl decode the address, access the ROM, and then output a 22-t) it
wide microinstruction to the Microinstruction Bus. The microinstruction address is
I transferred to the M!CROM during 02. It Is decoded during 03 and the ROt." is
accessed during 04. The microinstruction is transferred to the MIB bus at 01.
Address and data on the MIS Is active low (Logic "1" = Low). The MIS bus is
precharged high by a II M I CROMs on the bus as deser i bed by the f 0 I low i ng de fin i t i (In'.
of pin functions.
PREPARED BY TITLE CP1631U WESTERN ¢ Dill/TAt
:1 • , t ... .I 1 c .... CHECK BY 512 X 22 M I Cf<OPI<OCPNi nU\1 (M Icr~OM)
APPOR&O
APPO ENG
APPD OP'S
ISSUE DATE SHEET
2
NUMBER REV
500281 M
.... "<il,' ......... ' __ .... ____ , __________ - .. _._ ... __ • __ $~~~"'M_~"'~ ___ . __ .. _._
NI!, INI'OI'lMI'l.nON IS CONFIOENTtAL AND HOP.lIt , MlV TO woe AND SHALL NOT 8E [Pf«)UUCEO OR F,H'lTHER DISCLOSED TO
• ,NYONf OTHER THA'\i WDC EMPLOYEES wrHOUT WAITTEN AU1HORIZATION FROM ,<[SHRN DIGITAL CORPORATION.
1. MI800 - MIBH2I; The address is transferred into the MICROM on these I ines at
02 from the CP1621B. They are unconditionally precharged high at 04 by all
the MICROMs on the MIB. ~·lIB~0 is the least sigr.lificant address (MD and
MIB10 is the most significant address (A10)' The micr-oinstruction data is
placed on these I ines at 01 by conditional discharge. MIB00 is the LSD of
the microinstruction. Chip selection is performed by ~IB09, M1810, and Chip
Select. These signals are programmable.
2. MIB11 - MIB14; These I ines are microinstruction outputs only. They are
unconditionally precharged high at 04 and conditionally discharged at 01 by
the ROM microinstruction data.
3. t-1IB15; Thl~ I ine functions I Ike MI811 - MIB14 except that it is prechnrged
high during 03 by the MICROM.
---II. MIB16; This Is a MICROM Input and output line. It is unconditionally pre'-
charged high at both 02 and 04. Microinstruction data is transferred out ai
01 as with the other MICROM outputs. This output wi! I enable the loading of
the Return Register CRR) on the Control 'Chip when It is low at 01 (LRR). At
tJ3 it performs as an Output Enable for the MICROM. If this I im'~ is dischiJrged
low by the Control Chip at 03 then MICROM lines MIB00 to MIBl5 and MIGlli --
MIB21 wi I I not be discharged at the next 01.
5. MIS17; This MICROM output functions I ike MIS11 to M1814. It is used o~ the
Control Chip to enable the "Read Next Instruction" translation whi 1(: over-
riding any other translation. Discharging MIS17 to a low at 01 aelivalu::..
PREPARED BY 1-----+-----1 WE6TEIIN ¢ DIBITAl
CHECK BY I)j/lj ~ • p' • ., ()'
APPD R &. 0
APPD ENG
ISSUE DATE SHEET
3
TITLE CP1631El 512 X 22 M I CHOPI«)(A<N~ P()I~
(MICROtJ!) NUMBER
500281
RlV
APPD OP'S ,-,-____ "'-____ ...i-____ """-___________ -..JI..-.. __ I
HIS tNFO .. MATION IS CONFIDENTIAL ANO ftUPRI( TARY TO woe ANO SHALL NOT BE ilPfM()UCEO OR FURTHER DISCLOSED TO .NVONE OTHER THAN woe EMPLOYEES
• IIHiOUT WRITTEN AUTHORIZATION FROM ;![SHRN DIGITAL CORPORATION.
the translation. ~------------~-
6. MIBle - MfB21i These four I ines are extra TTL compatible outputs which can
be used for externa I contro I funct ions. They ar-e not used by the Control
or Data chips. These outputs have wired-OR capabi I ity.
7 •. CHIP SELECT (CS); This is an MOS level input that wi II select (Enable) the
MICROM with a high input level. This Input is sampled I ike an address inrut
at 02.
NOTE: A 'transistor programmed in the Memory Matrix wi II read as a high level on
the Microinstruction Bus when It Is accessed.
Chip Select and Output Disable functions are performed by two additional
rows In the ROM Matrix and therefore are programmable to affect any or dl I
of the outputs.
NOTE: The MICROM is responsible for precharging the MIB I ines unconditionally.
MIB00-MIB14 and MIBl7-MIB21 are precharged high during 04. MIBtS is
precharged high during 03 and MI816 Is precharged high during 02 and 04.
~he MIB I ines are precharged also when the chip Is disabled.)
':.1
TiTlE WE. TERN ¢ DIIIITAl. CP16318
512 X 22 M I Cf~OPHOCI~AM : " . • ,I .. • , D •
PREPARED BY
CHECK BY I '.It: ,/I,i:'
ROM (M I CROM) ISSUE DATE SHIET NUMBER APPO R&D
APPO ENG 4 5007.81
APPO OP'S
.
REV
,..,
---'k , ..... - .-.---.
THIS INFORMATION IS CONFIDENTIAL AND 'ROPAIETARY TO woe AND SHALL NOT BE REPRODUCED OR FURTHER DISCLOSED TO ANYONE OTHER THAN woe EMPLOYEES WITHOUT WRITTEN AUTHORIZATION FROM WESTERN DIGITAL CORPORATION.
CP16>IB - 11K (MICROM)
r,j I b00-10
MIB00-08 I
19
'12 I
MIE!9-10
I 'I
CHIP
S~LECT
.. -
• ADDRESS 512 X 22 DECODE • ROM 02 & 03 •
• •
.. -
- CHIP - CHIP SELECT SELECT DECODE .. 02 & 03 -
~~I "'v '11
~ bo' '4
~ ~.I ~- '\
~I .~ ,.. V- '4 -~J V'1 , .... I
-~ 'I
OUTPUT DISABL~o-
.. -
..
------... -
PRECHARGE PHN.; E ( n t' I CI'. Ll
~11 B 1 1-14
Mlbl5
MIB18-21 (User TTL
Output)
M I E17 (f~tJl)
PREPARED BV 1-----..... ----...... w,.r,.", m /lI.lrAI. APPO OPEAS. ~I/t.. !P
TITLE F I (JURE tJO. 1 512 X 22 ~1I CROf'ROrrW1 POM (M I Cf{m1 ) - (T 1 IS ) 1 B 1-____ +.;..;..;. ___ ...... t: • • ,. • • • , • • //I
APPORItD
APPO ENG ISSUE DATE SHEET
5 NUMBER ~)OO/:31
",," ---- ,....... . ..... -----. .........--.. ...... --.. -....... -~~-.. ..,.",---------lUIS INr:r.lr:\MI\'·IO~·t I:: CC!·!FI!'l£:NTI".!. ArIIJ pr:OI,wr'IAIIY 1'0 \.'(; "Nl, :;!ll\l.l I.()'/' :,:r; f,.::,I'II(';AJCED 011 It .• tr:<:rl. OI~;Cl.('~;i!() 1'0
. ANVtYJ£: (lnffR 1! ~ ~.~ J WDC fp.'.Pt.OY.F.CS wnlfour \/lilHUI 1,IJ1tWIIIZA110N hiOIA wt.:!lTL: I'll" VIGil AL CUiH'ORI\ l'ION.
CLOCK b, I\Gr~Ar·1
-V90rfJ .
Vov -Yt VOV --\
__ . __ v 10% --A '-_-v 10% v 1 o~--l -: -,-- V 101-I ---- L __ . __ _
~,~-,,-- TeVJ ----!.,
OfT W' T LQJJ OF_,_!..Q1:..-!~~~Q_~!,Q~_Y2I,.1/·,C~J.~Q"UJJ S FOR CLOCK, INPUTS AND OUTPUTS
v10% _. VLOVJ(mdx.) oj .1 ~HIC;H(n'ir,,) - VL0\1(mi:lX.~
This definition applies to clock, input and output pins.
!
!
' .. "'~ !fIIFOI'IMA I 'i."~ ,,:;' \,;unrl'Ur;,.., '''' ...... 't., PROiP'fHETARY TO woe AND SHALL. NOT BE REPflOlJUCED OR FURTHER DISCLOSED TO ANVONE OTHER THAN woe EMPLOYEES WITHOUT WRnTEN AUTHORIZATION FROM 'WESl£RN OIGITAl CORPORATION.
CLOCK FtIASE
1
CLOCK PHASf_
2
CLOCK PHASE
3
CLOCV PHASf:
4
--MIB16
..... ------'-~?--~!:T .t'!C trll1P£«§ff--\ \. - TCYC -----+t ------ ---eo-! I
~
4
+;RE···· T ~----'-.....&
I ~;RE
, ,
r ,
1----.....:..' --' 3',,-AI ~ t ;':'1 !.\,i ,
MICRO INSrR. BUS (Mii3'00-~, M I BI7)
Il.' Ti. MI'~V( mid
T~~------~----~4------
I" M1B15 is prechar<J(~(j ,11 O·~,
NOTES: 1. 2. 7 ..:>,
4. 5.
_.. TpR[ app lies. MIS I ines except MIS15 are precharged high at Phase 4. MIB16 is also precharged high at P1l£:3e 2. _____ _ MIB16 is di'char'ged to di'-able the Mlb00 tll815 and f11818 MII"j (JtpIII' J :..> - "
, - ." H
at 01 fran d i schcH-g I n9 low. Addres5 i npl:1 trans i stl ons occur only on t,~ I R0V'J-tt. I A 10 I i nf'S d nrl Ch iii f) (. I e<. I , . Sw! khing 1 imes ewe moasured at to% and 90% of '>pec i f i cd I eve I',.
PREPARED BY TITLE WI. rIll'" !)5 1III1'I'AI. f 11_~Uhf- flO. ')
APPO OPERS. # II "
, II " .. t I tI .. MICROM 11~11 t:r, I) It: .1·J',i·~ i I ({'1/,1,11'
",PPDRAO ISSUE DATE SHEET NUMBER REV', APPO ENG I J00/81 :1
-.J
flil:S INfORMA110ili IS tONFii5t:NT~,"\l p;NO 'flOf'I1lIHAllIV TO woe AND SHALL NOT BE REPAOI:I'UCED OR FURTHER DISCLoseo TO ANYONE: OTHER THAN woe EMPlOyeeS
. WIlHOUT WRITTEN AUTHORIZATION FROM WESTERN DIGITAL CORPORATION •
....... ____ ~ _____ . __ TCYC
CLOCK PHASE
1
ClOCK PHAS[
2
CLOCK PHAsr
3
CLOCK PHASE
4
-------------
M I B18-rJ\ I ElL 1
/ 2
YUH! (Tl L)
cs ~_~-... --.-.-- V I fit',
NOiE: 1H ou'tputs <rv1IBI8-tv1lB21) are unconditionally driven high at 011 and conditionally driven low at 01. This conditional low wi I I be val id unt i I the next 04.
PREPARED BY TITlE f !t;lJW NO. t ,I WI!IITIIIN ¢ Dill/TAl.
APPO OPERS. ~ " If ,. II If "
, t " N TTL Olllf'ln : I r~ 1i;1 ,
APPO R" D ('I'lI'~LJI
ISSUE DATE SHEET NUMBER
APPO ENG 8 'JOT 1
V Il f~
ri::V-.. __ .,
1111:; I'NrOAMATlON IS CONFIDENTIAL AND PICOPR,(.TARY TO WOC AND SHALL NOT BE HI. I'F1UDUCEO OR FURTHER DISCLOSED TO ANVhNE OTHER THAN woe EMPLOYEES W .... 'HOUT WAITTEN AUTHORIZATION FROM WEST[ RN DIGITAL CORPORATION.
ABSOLUTE MAXIMUM RATINGS OVER FREE AIR TEMPERATURE RANGE (Unless Otherwise Noted)*
Supply Voltage VOO (See NOTE)
Supply Voltage Vee (see NOTE)
Supply Voltage VBB (see NOTE)
AI I Other Pin Voltages (see NOTE)
Clock Voltage (see NOTE)**
Operating Free Air Temperature Range
Storage Temperature Range
-0.5V to 15V
-O.5V to 15V
-lOV to 1.0V
-l.OV to 15V
-1.0V to 15V
NOTE: These voltage values are with respect to VSS Supply Voltage. If Ves is more positive than any other voltage, then IBB must be I imited to lOrna.
Stresses beyond those I isted under Absolute Maximum Ratings may cause permannnt
damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions beyond those indicated .in the oporil-
tionol sections of this specification Is not implied. Exposure to absolute
ma>dmum-rating conditions for extended periods may affect device reI iabi I ity.
The c,'iher three clock voltages must be between O.5V and -0.6V except for
switching overlaps. Not more than one clock may be high at anyone time.
Applying power to the part may be any sequence of conditions that do not
violate the maximum ratings specified on this sheet.
PREPARED BY TITL.E CP163lB WI.TIIIN ¢ II/II/TAl.
" .. _ ,J ". .., tI 11: CHECK BY .t;1/ I.: 5 t 2 X 22 M I CI~OrH()CrU\r'i r~or,l (MICRQM)
APPD R .. D ISSUE DATE
APPD ENG SHlEf
9
NUMBER
500281 ____ ~~A~pp~O~O~P'~S~~ ______ ~ ______ ~ __ ~_~ ... ~,~~------.
REV
M
I I
r THiSli'lFOAMATIOhi IS CONflLlI:NllAL ~rou PROPRIETARY TO woe AND SHALL NOT BE REphoD~eEO OR FURTHER DISCLOSED TO ANYONE OTHER THAN woe EMPLoyeES WITl~'OUT WRITTEN AUTHORIZATION FROM Wl"STERN DIGITAL CORPORATION.
! !
I
OPERATING CHARACTERISTICS
TCASE = 00C to 70ce, VOO = +12.0V ± .6V, VSS = -3.9 ± .25V, VSS = 0V, VCC = +5V ± .25V
SYMBOL
I l
IS8
ilC
ICCAVE
IDDAVE
V I ~f\1
VILM
VOHM
VOHT
VOlM
VOLT
VOv
VeH
VCl
NOT E:
)(No1o:
CHARACTERISTIC
leakage Current For Any Pin Other Than Clock Or Power
VS8 Supply Current
Clock leakage Current
Average VCC Operating Current*
Average Voo Operating Current
Input High Voltage (AI I Inputs)
Input Low Voltage (All Inputs)
Output High Voltage (MOS)
Output High Vol tage <TTl)
Output Low Voltage (MOS)
Output low Voltage nTL)
Overlap Voltage Of Any Two Adjacent Clock Phases
Clock High Voltage (SEE NOTE)
Clock Low Voltage (SEE NOTE)
MIN TYP MAX UNITS -- --
4.0
0.0,
4.35
2.4
VSS
0.0
0.0
11.8 12.0
-0.6
10-,.0
10.0
±10
-500 ~A
±100 VA
20.0 rnA
20.0 rnA
Vce V
0.8 V
Vee v
Vee v
0.4 V
0.4 V
3.0 V
13.0 V 13.7
0.5 V
COMMENTS ANO CONDITIONS
Y,N :: 5.25V/0V
Vss :: -5.25V
VCLOCK ::: 13.7V/0V
TCYC .. 300 nsec Cl -.. 25 pf
TCYC :: 300 nscc CL ::: 50 pf
10 :: -30 llA
10 ::: -50 lJA
10 = 100 pA
10 :: 1 .8 ma
VDO = 11.4 VDO ::: 12.6
linear interpolation appl les for VCH when VOO Is between 11 .4V and 12.6V. No overshoot or undershoot allowable.
nil' majority of this current is used to precharge the output capacitance, CL; and 1herefore, is proportional to the CL precharged by the MICROM and the frequency of discharge.
PREPARED BV CHECK BY
WI6TIRN fI5 DIIIITAI. ~1J."II.A"tJlf
TITLE CP16318
512 X 22 MICROPROGRAM ROM (MICROM)
'--____________ ~ __ A_:_:_:D_R_E:_:~ __________ ~_IS_S_U_E_D_A_T_E~ ___ S_H_~~_T __ ~_N_~_~_~2_E:_1__________ 1 "~v.-APPDOP'S
THIS INFORMATION IS CONFIDENTIAL AND PROPAIETARY TO WOC AND SHALL NOT BE REPROnUCED OR FURTHER DISCLOSED TO ANYONE OTHER THAN woe EMPLOYEES
• WITHCUT WRITTEN AUTHORIZATION FROM WESTERN DIGITAL CORPORATION.
AC CHARACTERISTICS
TCN3E = 00C to 70°C, VDD = +12V ± .6V, VSS = -3.9V ± .25V, VSS -. 0V, VCC = +5.0V!O.25V
SYM i30L CHARACTERISTIC MIN TYP MAX
lpW Clock Width High (AI I Phases) 55 240
lCW Clock Width Low (All Phases) 75 300
IT Clock Transition Time (AI I Phases)
TCYC Clock Period (All Phases)
TMOL Output Propagation Delay From 01 Clock
IPRE Time To Precharge Outputs High
TTOL
TAS
TMOI
TMIT
Input Set-Up Time on MlB16 At Phase 3
TTL Out Switching low
Address Set-Up Time
Address Hold Time
Output Transition Start Delay Time
Input Transition Start Set-Up Time
Address Transition Start Set-Up Time
5
300
20
5
o
35
25
1000
35
55
55
20
WI.TIRN fI DIIIITAI. &tI.I'D.AtltJlII
ISSUE DATE SHEET
1 1
UN ITS COND IT IONS
nsec
nsec
nsec
nsec
nsec Cl 50 pf
nsee Cl = 25 pf
nsec
nsec Figure 5
nsec
nsec
nsec CL = 50 pf
nsee
nsec
TITLE CP1631B
512 X 22 MICROPHOGRAM HOM (MICROM)
NUMBER
·500281
REV.
115 INFr,RMA TlON IS CONFIDENTIAL AND IUPAI TAAV TO W DC AND SHALL NOT BE
• ~ PfiODUCE D OR FU RTHER DISCLOSED TO 'nONE OTHE R TH AN woe EMPLOYEES ,THOUT WRITTEN A UTHORIZATIDN FROM ESTERN DIGITAL C ORPORA TION.
CAPACITAN CE
SYfvlBOL CHARACTER I 5T I C ---- MIN TYP
Cfll Clock Phase 1 Capacitance 20
Cf)2 Clock Phase 2 Capacitance 40
Cf)3 Clock Phase 3 Capacitance 20
Cf)4 Clock Phase 4 Capacitance 50
Co Data Input/Output Pin 5.0 Capac I tance
Clock To Clock Capacitance 3.0
PREPARED BY
CHECK BY , ~i/I".~, we. TERN ¢ DIIIITAI.
u • 1# ,I .. ", 0 '\
APPD R&D ISSUE DATE SHEET
APPD ENG 12
APPD OP'S " -
MAX UNITS CONDITIONS --50 pf
60 pf VIN = 0V,
50 pf VS5 = 0V,
VOO = 0V, 100 pf
Vee = -3.9V
8.0 pf f = 1 MHz
6.0 pf
TITLE CP1631£3 512 X 22 MICHOPROGRAM ROM (M ICROM)
NUMBER
500281
R[V
M
-1 1l1:;ll'jroOflMATION IS CONFIDENTIAL AND
B()PRIE TAR V TO woe AND SHALL NOT BE fP'i100UCED OR FURTHER DISCLOSED TO
,f.JVONE OTHER THAN woe EMPLOYEES ITHOUT WRITTEN AUTHORIZATION FROM
IlSTfRN DIGITAL CORPORATION.
FIGURE 4
PIN ASSIGNMENT CP1631B
PIN NO. SIGNAL PIN'NO, SIGNAL ---1 03 21 02
2 V8S 22 VCC
3 NC* 23 CHIP SELECT
4 NC 24 NC
5 NC 25 NC
6 NC 26 M I Bl1
7 MIB15 27 MIB10
8 MI814 28 MIB09
9 MIB13 29 MIB08
10 MIB12 30 MIB07
11 MIB16 31 MIB06 -."
12 MIB17 32 MIB05
13 MIBl8 33 MIB04
14 MiB19 34 MIB03
15 MIB20 35 MIB02
16 MIB21 36 NC
17 NC 37 MIB01
18 NC 38 MIB00
19 VSS 39 VDD
20 04 40 01 .
II NOTE: NC means No Connect i on,
PREPARED BY TITLE CP16318
WE.TIRN ¢ Dill/TAl. CHECK BY
/ , 517 X 22 MICROPROGHAM II//.: .0 • .. " . • , (I •
ROM (MICROM) APPO R&D
ISSUE DAlE SHEET NUMBER REV AFPO ENG 13 5002[\1 M APPD OP'S
DATE PAGES
CP1611S
NEW REVISIONS
CHANGES
G 3-25-75 t New Title Page with new revision 6 Old: The address remains on the bus for
one complete clock cycle. The data Is. • •
New: The address is val id on the bus during Phases 2, 3, and 4. The data Is .
9 CE changes to CS 10 New Clock Diagram 11 Output delay times measured from 10%
voltages of the clocks. 12 Delete Supply Voltage VCC. 13 New 14 New 15 VIN = ~V added, and 12V changed to 0V for VDO. 17 New TTL Output Test Load.
(-G;5----------4:8:75-------,0----~---------Add;d-;,F~~-Cl~;k-I~~~t;-;~d-O~t~~t;~----___________ ~OIE~ __ Eage-15-becomes-Eage-16~---~---------____________________________ _
H 5-2-75 1 10
13
14
17
NOTE: All pages contain current
New Revision added to Title Page. Comment added: "This definition appl ies
to clock, input and output pins." 'L Condition line: VIN - changed to VIN = VOLM Condition I ine: I = changed to 10 =. VCH and VCL I ine has same eondition comment. TOOV and TOOT I ina Condition statements
changed to read: Fig. 5. Title added: Figure 5, and 50 pf added,
f rom OUT I I ne • revision letter (H).
-------------------~----------------------------------------~----~-----------~----------
11-10-75 11
13
Redrawn with output delays measured from 90% of clocks, TMOT and TMIT times added
TA changed to TCASE VSS =-5.0 changed to VSS = -3.9V 'L MAX ±5 changed to ±lO ISB MAX 10Q changed to -500 ILC MAX ±30 changed to ±100 IDDAVE TYP 10 changed to 20.0 'DDAVF. MAX 20 changed to 35.0 V,HM ~IN 4.0 changed to 4.25 VCH MIN 11.4 changed to 11.8 VCH MAX 12.6 changed to VOO + 1.1V VCL MIN 0.0 changed to -0.6 V,HT MIN 2.4 changed to 3.0
•
1.0V Overshoot and Undershoot A II owab I c chanqcl.! to No Overshoot or Undershoot AI lowaule
CP16118
NEW REVISIONS Con't
REVISION DATE
11-10-75
NOTE: AI I pages contain current revision Letter (I)
11-14-75
-2-
~
14
15
11
12
13
" i ~I
CHANGES
TA changed to TCASE Vaa ; -5.0V changed to Vaa = -3.9V TpW MIN 40 changed to 55 TCW MIN 70 changed to 75 T T cv.X dropped TMtH MIN 0 changed to 5 TMOL MAX 40 changed to 35 TJOL MAX 40 changed to 35 TOIS MIN 0 changed to 15 TOIH MIN 0 changed to 10 TWLS MIN 0 changed to 10 TMIT and TMCT added "NOTE: THESE TIMES, ETC." dropped
C~1 TYP 30 changed to 40 C01 MAX 50 changed to 60 C02 TYP 30 changed to 40 C02 MAX 50 changed to 60 C03 TYP 30 changed to 40 C03 MAX 50 changed to 60 C04 TYP 30 changed to 40 C04 MAX 50 changed to 60 Co MAX 8.0 changed to 15.0 Vaa = -5V changed to Vaa = -3.9V
TWHH measured from 10% 04 changed to 10% of 01
Vaa 0.5V changed to l.OV Pin Voltages -O.5V changed to -l.OV Clock Voltages -0.5V changed to -l.OV Operating Temp. Range 700 C changed to 125(;( (If Vea is more, etc.) added to NOTE ** -O.SV changed to -O.6V
'LC CONDITION 12.6V changed to 13.7V V,HM MIN 4.25 changed to 4.1 VCH MAX VDD + l.tV changed to t3.0 for
VOO = 11.4V, 13.7 for VOD = 12.6 VCH MIN 11.8 changed to 12.0 for VOD = 12.' NOTE added V,HT MIN 3.0 changed to 2.4
14 TOOV MAX 75 changed to 70 TOOT MAX 60 changed to 55 TWHS MIN 15 chanaed to 20 TWlS MIN 10 changed to 20
-------------------------------------------------------------------------------------------~.
( I ) 11-26-75 15 Co MAX 10.0 changed to 15.0