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Subject Name: Microelectronics Circuits

Subject Code: 10EC63

Prepared By: Arshiya Sultana, Sreepriya Kurup

Department: ECE

Date: 12/05/2015

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Content• UNIT 6: Operational Amplifiers

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UNIT 6OPERATIONAL AMPLIFIERS

Syllabus: The Ideal Opamp The Inverting Configuration The weighted summer The Non inverting configuration The difference amplifiers The Instrumentation Amplifier Large Signal Operation Of Opamps DC Imperfections Integrators Differentiators

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The Ideal Op Amp

Figure shows the equivalent circuit of an ideal Op amp.

The features of an ideal op amp are:

Infinite input impedance Zero output impedance Zero common mode gain or infinite common mode rejection ratio (CMRR) Infinite open loop gain , A Infinite bandwidth

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THE INVERTING CONFIGURATION It consists of an opamp and two resistors. R2 resistor provides negative

feedback. Expression of closed loop gain when the open loop gain is infinite.

= - The minus sign indicates the closed loop amplifier provides signal inversion. Hence this configuration is called as inverting configuration. Expression of closed loop gain when the open loopgain is finite.

As A approaches ∞, G approaches the ideal value, - . The input resistance for an ideal opamp in inverting configuration is R1. The output resistance for an ideal opamp in inverting configuration is zero.

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The WEIGHTED SUMMER Application of inverting configuration is weighted summer.

The output voltage of weighted summer isSince the output voltage is the weighted sum of the input signals, v1,v2,…vn. This circuit is called as the weighted summer.

Fig above has the constraint that all the summing coefficients are of the same sign.Therefore for summing coefficients of different signs the following circuit are being used.

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THE NON INVERTING CONFIGURATION

Expression of closed loop gain when the open loop gain is finite.

Expression of closed loop gain when the open loop gain is infinite .

As A approaches ∞, G approaches the ideal value, 1+ .

An application of the non inverting configuration is voltage follower./unity gain amplifier.Therefore, output voltage, v0 = vI. Here, we make R2 = 0 and R1 = ∞.

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DIFFERENCE AMPLIFIERSA difference amplifier is one that responds to the difference between the

two signals applied at its input and ideally rejects signals that are common to the two inputs.

Ideally the difference amplifier will amplify only the differential input signal Vld and reject completely the common-mode input signal VIcm, practical circuits will have an output voltage V0given by

V0 = Ad VId +AcmVicm, where Ad is the differential gain, Acm is the common mode gain. A single opamp difference amplifier is shown in figure. V0 = Vid

Therefore, Ad = For making Acm = 0, = condition must be satisfied. Differential Input resistance, Rid = 2R1

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The low-input-resistance problem of the difference amplifier can be solved by buffering the two input terminals using voltage followers.

It consists of two stages. The first stage is formed by op amps A1 and A2 and their associated resistors, and the second stage is the difference amplifier formed by op amp A3 and its four associated resistors. The output voltage is

INSTRUMENTATION AMPLIFIER

The overall differential voltage gain,

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Limitations on the performance of op-amp circuits when large output signals are present are considered. Output Voltage Saturation : Op amps operate linearly over a limited range of output

voltages. Specifically, the op-amp output saturates in the manner within 1 V or so of the positive and negative power supplies, respectively.

Output Current Limits : The operation of op amps is that their output current is limited to a specified maximum. For instance, the popular 741 op amp is specified to have a maximum output current of ±20 mA.

Slew Rate :Another phenomenon that can cause nonlinear distortion when large output signals are present is that of slew-rate limiting. This refers to the fact that there is a specific maximum rate of change possible at the output of a real op amp. This maximum is known as the slew rate (SR) of the op amp and is defined as

SR = |max Full-Power Bandwidth: It is the frequency at which an output sinusoid with

amplitude equal to the rated out put voltage of the op amp begins to show distortion due to slew-rate limiting. If we denote the rated output voltage Vornax, thenfMis related to SR as follows: ωmV0max = SR

LARGE SIGNAL OPERATION OF OPAMPS

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DC IMPERFECTIONS Offset Voltage: If the two input terminals of the op amp are tied together and

connected to ground, it will be found that a finite dc voltage exists at the output. In fact, if the op amp has a high dc gain, the output will be at either the positive or negative saturation level. The op-amp output can be brought back to its ideal value of 0 V by connecting a dc voltage source of appropriate polarity and magnitude between the two input terminals of the op amp. This external source balances out the input offset voltage of the op amp. It follows that the input offset voltage (Vos) must be of equal magnitude and of opposite polarity to the voltage we applied externally.

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Input Bias and Offset Currents: In order for the op amp to operate, its two input terminals have to be supplied with dc currents, termed the input bias currents. In Figure these two currents are represented by two current sources, IBI and IB2, connected to the two input terminals. The input bias currents are independent of the fact that a real op amp has finite though large input resistance . The op-amp manufacturer usually specifies the average value of IBI and IB2 as well as their expected difference. The average value IB is called the input bias current, IB = .

and the difference is called the input offset current and is given by ,Ios = |IB1 – IB2|

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The output voltage,V0(t) =- Vc(t), thus

Thus, the circuit provides an output voltage that is proportional to the time-integral of the input, with Vc being the initial condition of integration and CR the integrator time-constant

.We assume that the circuit begins operation at time t = 0, then at an arbitrary time t the current i1 (t) will have deposited on C a charge equal to dt. Thus the capacitor voltage vc(t) will change by 1/c. If the initial voltage on C (at t = 0) is denoted VC, then

INTEGRATORS

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The operation of the integrator circuit can be described alternatively in the frequency domain by substituting Z1(S) = R and Z2(S) = 1/sCin = -to obtain the transfer function = -

For physical frequencies, s = jω, = - Thus the integrator transfer function has magnitude,| |= Phase , φ = +90 ͦ The Bode plot is a straight line of slope -6 dB/octave (or, equivalently, -20

dB/ decade). This line [shown in Figure] intercepts the 0 dB line at the frequency that makes I Vo/Vi I = 1,

ωint= 1/ CR (2.54) The frequency ωintis known as the integrator frequency and is simply the inverse of the integrator time constant.

Frequency domain

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Interchanging the location of the capacitor and the resistor of the integrator circuit results in the circuit.

The opamp output voltage,

DIFFERENTIATORS

Frequency domain

The operation of the differentiator circuit can be described alternatively in the frequency domain by substituting Z1(S) = 1/sCand Z2(S) = Rin = -to obtain the transfer function = -sRC.For physical frequencies, s = jω,

=-jωRC. Thus the integrator transfer function has magnitude,| |=ωRC Phase , φ = -90 ͦ The Bode plot is a straight line of slope =6 dB/octave (or, equivalently, +20 dB/

decade). This line [shown in Figure] intercepts the 0 dB line at the frequency that makes I Vo/Vi I = 1, ωi= 1/ CR (2.54) The frequency ωis known as the integrator frequency and is simply the inverse of the differentiator time constant.