PowerSolutions.pdf

8/18/2019 PowerSolutions.pdf

1/44

Reference Design Cookbook II

Power Management Products 2Q

Technology for InnovatorsTM


2/44

2 Reference Design Cookbook

Welcome to TI Power Management’s Second in a Series of Reference Design Cookbooks

Device Quick Search Tool

➔

➔

eference Design Cookbook II for Power Management ProductsTexas Instruments 2Q 2006

Welcome to TI’s latest Power Management Cookbook! Based on popular demand and distribution of over 20,000

copies of the first Reference Design Cookbook , we are happy to bring you Issue 2. This is a collection of complete

power solutions and design documentation from TI’s extensive library of reference designs and evaluation modules

(EVMs) available to our customers. It includes input from Robert Kollman, his Design Services team and TI

Applications Engineers.

TI has hundreds of other reference designs that may be found at: www.ti.com/powerreferencedesigns. If you

want to view more of these, please check this website. It is frequently updated with new circuits. If you would like

to access the first issue of the Cookbook from 2005, please download at the URL referenced above, or request a

copy by calling; 972-644-5580 and mention Lit #: SLUB009.

TI hopes you enjoy these “recipes”, and that this Cookbook will help simplify and streamline your power supply

designs.

Check out TI’s Power Quick Search Tool for recommended power solutions across

DC/DC Conversion and PWM Controller

products based on user input criteria.

power.ti.com

device quick search

Device Quick Search

Input*Nominal Vin (V)

*Min Vin (V) *Max Vin (V) Vout (V) Iout (A)

Vout (V)

Search for isolated solutions

*Either Nominal OR both Min and Max is Required

Search for devices with

more than two outputs

Iout (A)

Output 1

OR Output 2

Search


3/44

Texas Instruments 2Q 2006Reference Design Cookbook II for Power Management Pro

Reference Design Cookbook

Table of Contents

➔Inside

Converter Design Topology VIN VOUT IOUT (A) Part Number Page

Synchronous Boost 0.9 to 6.5 1.8 to 5.5 0.5 TPS61020 4

Synchronous Buck 3.8 to 17.0 3.3 1.5 TPS62111 6




Synchronous Buck 5.5 1.0 4.0 TPS40040 14

Synchronous Buck 12.0 1.8 5.0 TPS40100 16


Dual Synchronous Buck 6.5 to 15.0 3.3, 1.5 15.0, 10.0 TPS5124 20

Dual Synchronous Buck with Regulator 4.75 to 5.25 1.22, 3.3, 2.5 2.0, 2.0, 0.3 TPS75003 22

Non-Synchronous Buck 10.8 to 33.0 3.6 3.0 TPS40200 24

Non-S

ync

hronous Bu

ck 4.5 to 8.0 1.4 1.6 TP

S40222 26

Non-Synchronous Buck 10.8 to 19.8 5.0 3.0 TPS5430 28

Multi-Channel Buck for DDR 12.0 2.5, 0.4 6.0, 3.0 TPS51116 30

Isolated Flyback for Power over Ethernet 34.0 to 57.0 12.0 1.0 TPS23750 32

Isolated Ac tive Clamp –48.0 12.0 10.0 UCC2897 34

Boost Conver ter 4.5 to 5.5 12.0 1.0 UCC3807 36

Synchronous Battery-Pack Charger 13.0 to 24.0 12.0 to 19.2 0 to 6.0 bq24721 38

Digital Half Bridge 36.0 to 75.0 12.0 8.0 UCD8220 40

TI has many other reference designs that may be found at:

www.ti.com/powerreferencedesigns


4/44

4 TPS61020

Synchronous Boost Converter for Battery-Powered Applications ➔


SpecificationsParameter Test Conditions Min Typ Max Unit

nput Voltage 0.9 6.5 V

Output Voltage 1.8 5.5 V

Output Current 500 mA

Output Ripple Voltage VIN = 1.2 V; IO = 100 mA; PWM Mode 16 mVPP

VIN = 1.2 V; IO = 10 mA; PFM Mode 18 mVPP

Efficiency VIN = 3.0 V; IO = 250 mA 96 %

VIN = 1.4 V; IO = 300 mA 85 %

Web Links:

Reference Designs:www.ti.com/powerreferencedesigns

Datasheets, User’s Guides, Samples, Software:

www.ti.comPart Number Search: TPS61020

Evaluation Module TPS61020EVM

VOUT3.3 V Up to200 mA

Low Battery

1.5

Output

0.9 V to6.5-V Input

C110 µF

L16.8 µH

SW VOUT

FB

LBO

PGND

VBAT

EN

LBI

PS

GND

TPS61020

C22.2 µF

C347 µF

Description

he TPS6102x family of synchronous boost converters provides a solution for products

owered by either a one-cell, two-cell, or three-cell alkaline, NiCd or NiMH, or one-cell

i-Ion or Li-Polymer battery. Output currents can go as high as 200 mA while using a

ingle-cell alkaline discharged down to 0.9 V. It can also be used for generating 5 V

t 500 mA from a 3.3-V rail or Li-Ion battery. The boost converter is based on a fixedrequency, pulse-width-modulation (PWM) controller using a synchronous rectifier to

btain maximum efficiency. At low load currents the converter enters the Power Save

Mode to maintain high efficiency over a wide load current range.

he TPS6102x devices keep the output voltage regulated even when the input voltage

xceeds the nominal output voltage. The output voltage can be programmed by an

xternal resistor divider, or is fixed internally on the chip. The converter can be disabled

o minimize battery drain. During shutdown, the load is completely disconnected from

he battery.


5/44


TPS61020

Synchronous Boost Converter for Battery-Powered Applications

IO – Output Current - mA

1 10 100 1000

Efficiency–%

100

90

80

70

60

50

40

30

20

10

0

VBAT = 2.4 V

VBAT = 1.8 V

VBAT = 0.9 V

VO = 3.3 V

VI = 1.2 V,RL = 33 Ω,VO = 3.3 V

t – Time – 1 µs/div

InductorCurrent

200mA/div

Outpu

tVoltage

20mV/div

Efficiency–%

100

95

90

85

80

75

70

65

60

55

50

0.9 1.4 1.9 2.4 2.9 3.4 3.9 4.4 4.9

IO = 100 mA

IO = 10 mA

IO = 250 mA

VO = 3.3 V

VI – Input Voltage – V

VI = 1.2 V,RL = 330 Ω,

VO = 3.3 V

In

ductorCurrent

1

00mA/div,DC

OutputVoltage

20mV/div,AC

t – Time – 50 µs/div

MaximumOutputCurrent–mA

1400

1200

1000

800

600

400

200

0

VO = 3.3 V

VI – Input Voltage – V0.9 1.7 2.5 3.3 4.1 4.9 5.7 6.5

VI = 1.2 V,IL = 100 mA to 200 mA,VO = 3.3 V

OutputVoltage

20mV/div,AC

OutputCurrent

100

mA/div,DC

t – Time – 2 ms/div

Efficiency vs. Output Current Output Voltage in Continuous Mode

Efficiency vs. Input Voltage

Maximum Output Current vs. Input Voltage Load Transient Response

Output Voltage in Power Save Mode


6/44

6 TPS62111

1.5-A Synchronous Buck Converter with Light Load Efficiency ➔


Specifications

Parameter Test Conditions Min Typ Max Unit

nput Voltage 3.8 17 V

Output Voltage 3.201 3.3 3.399 V

oad Current 3.8 V < VIN < 4.3 V 0 500 mA

4.3 V < VIN < 6.0 V 0 1200 mA

6.0 V < VIN

< 17 V 0 1500 mA

Output Ripple Voltage VIN = 8.4 V; IO = 100 mA 25 40 mVPP

VIN =8.4 V; IO = 1500 mA 5 10 mVPP

Efficiency VIN =8.4 V; IO = 1 mA 83 %

VIN =8.4 V; IO = 750 mA 90 %

Description

he TPS6211x family of synchronous buck converters with integrated FETs can provide

p to 1.5 A of output current from inputs as low as 6 V. The circuit below uses the

PS62111 fixed output voltage option configured to provide 3.3 V and up to 1500 mA

with a 6.8-µH inductor and 22-µF output capacitor. The TPS6211x achieves high

fficiency over the entire load current range by switching from traditional pulse widthmodulation (PWM) at high load to pulsed frequency modulation (PFM) or Power Save

Mode at light load.

Web Links:




Evaluation Module TPS62110EVM-001

VO = 3.3 V

CO = 22 µF6.3 V

CI = 10 µF25 V

VI = 3.8 V to 17 V 6.8 µH

1 MΩ

SWVIN

VIN

VINA

AGND

1 µF

LBI

SYNC

TPS62111

GND GND PGNDPwPd PGND

EN

SW

LBC

PG

FB


7/44


TPS62111

1.5-A Synchronous Buck Converter with Light Load Efficiency

t – Time = 20 µs/div

VI = 8.4 VVO = 3.3 VILOAD = 150 mA to 1350 mATA = 25° C

IO = 500 mA/div

VO = 50 mV/div

100

0

90

70

40

20

80

50

60

30

10

0.0001 0.001 0.01 0.1 101

Efficiency–%

VO - 1.5 VTA = 25° CPFM Mode

4.2 V

5 V

8.4 V

12 V

t – Time= 5 µs/div

CH2 = 5 V/div

CH1 = 20 mV/div

ILOAD = 100 mA, TA = 25° CV1 = 8.4 V, VO = 3.3 V

CH4 = 200 mA/div

t – Time = 2 ms/div

VI = 7.2 V to 12 VVO = 3.3 V

ILOAD - 800 mATA - 25° C

C2 = 50 mV/div

C1 = 5 V/div

Efficiency vs. Output Current Load Transient

Line Transient Output Ripple


8/44

8 TPS54317

1.1-MHz, Highly Efficient 3-A Buck Converter ➔


Specifications


nput Voltage 3.1 3.3 3.5 V

VOUT Set Point 1.8 V

OUT Range VIN = 3.3V 0 3 A

Operating Frequency 1.1 MHz

Output Ripple 4 mVPP

Efficiency VIN = 3.3 V, = VO = 1.8 V, IO = 0.6 A 90.5 %

Description

he TPS54317 DC/DC converter is designed to provide up to 3 A output from an input

oltage source of 3 V to 6 V. This device features extended operating frequency range.

his evaluation module is designed to demonstrate the small PCB areas that may be

chieved when designing with the TPS54317 regulator, and does not reflect the high

fficiencies that may be achieved when designing with this part. The switchingrequency is set at a nominal 1.1 MHz, allowing the use of a small-footprint 1.5-mH

utput inductor. The high- and low-side MOSFETs are incorporated inside the TPS54317

ackage along with the gate-drive circuitry. The low drain-to-source on resistance of

he MOSFETs allows the TPS54317 to achieve high efficiencies and helps to keep the

unction temperature low at high output currents. The compensation components are

rovided external to the IC, and allow for an adjustable output voltage and a customiz-

ble loop response. Additionally, the TPS54317 provides a full feature set including

rogrammable undervoltage lockout, synchronization, adjustable switching frequency,

nable, and power-good functions.

Web Links:





+

VOUT J2

JP3

PU

GND

1

2

1 Open

C7150 pF

C63300 pF

R36.81 kΩ

C2100 µF

C10100 µF

C111000 pF

C3

0.047 µF

R6

10 k

R29.76 kΩ

+VINGND

2

1

J1 VIN

1

1

2

3

4

5

6

7

8

910

11

12

24

23

22

21

20

19

18

17

1615

14

13

COMP

PWRGD

BOOT

PH

PH

PH

PH

PH

PH

NC

PGND

PGND

VSNS

AGND

RT

NC

SYNC

SS/EN

VBIAS

VIN

VIN

VIN

PGND

PGND

TP4

TP5

TP1

TP6PwrGd

TP2

JP1

JP2

U1TPS54317RHF

PwPd

C8

2200 pF

R5

442Ω

R7

0

L11.5 µH

C1150 µF

C910 µF

C40.1 µF

C5

SS/ENA

GND

GND

VIN

SYNC550 kHz350 kHz

R4

41.2 kΩ

R1

10 kΩ

TP3

VIN


9/44


TPS54317

1.1-MHz, Highly Efficient 3-A Buck Converter

Efficiency-%

IO – Output Current A

75

80

85

90

95

100

0 0.5 1 1.5 2 2.5 3 3.5

VI = 3 V

VI = 4 V

VI = 5 V

VI = 6 V

1 ms/div

VOUT = 20 mV/div (ac Coupled)

IOUT = 1 A/div, .75 A to 2.2 A step

OutputVoltageVariation-%

IO – Output Current – A

–0.3

–0.2

–0.1

0

0.1

0.2

0.3

0 0.5 1 1.5 2 2.5 3

Gain

Phase°C

f – Frequency – Hz

10 1M100 1k 10k 100k0

60 180

0

0

0

10

20

30

40

50

0

0

30

60

90

120

150Phase

Gain

OutputVoltageDeviat

ion-%


-0.3

-0.2

-0.1

0

0.1

0.2

0.3

3 4 5 6

IO = 3 A

IO = 1.5 A

IO = 0 A

5 ms/div

VOUT = 1 V/div

VIN = 1 V/div

Efficiency vs. Output Current Load Transient Response

Load Regulation

Line Regulation Power Up, VOUT Relative to VIN

Measure Loop Response


10/44

10 TPS54356

12-V to 3.3-V, 3-A Buck Converter Input with Bi-Directional Synchronization ➔


Specifications


nput Voltage 6.0 12.0 18.0 V

Output Voltage Set Point 3.3 V

Output Current Range VIN = 6 V to 18 V 0 3 A

Switching Frequency 500 kHz

Output Ripple Full Load 5 10 mVPP

Max Efficiency VIN = 6.0 V, VOUT = 3.3 V, IOUT = 0.5 A 92 %

Description

he TPS54356 DC/DC converter is designed to provide up to 3-A output from an input

oltage source of 6 to 10 V. This evaluation module is designed to demonstrate the

mall PCB areas that may be achieved when designing with the TPS54356 regulator,

nd does not reflect the high efficiencies that may be achieved when designing with

his part. The switching frequency is set at a nominal 500 kHz, allowing the use of aelatively small footprint 22-µH output inductor. The high-side MOSFET is incorporated

nside the TPS54356 package along with gate drive circuitry for an external synchronous

ET. The low drain-to-source on resistance of the MOSFET allows the TPS54356 to

chieve high efficiencies and helps to keep the junction temperature low at high output

urrents. The compensation components are provided internal to the IC. The TPS54356

s a full featured device including programmable under-voltage lockout, bidirectional

ynchronization, adjustable switching frequency, enable and power good functions.

Web Links:





+

TP4

TP5

12

PU01

J1VIN

GND

12

J31 17

12345678

161514131211109

2

J4

TP9 TP10

TP8

TP7

L122 µF

C30.1 µF

U1TPS54356PWP

R104.7

R90

C111500 pF

C41.0 µF

R12Open

R11Open

R4Open

R7Open

R6OpenC9

10 µFC1100 µF

R8

10.0 k

C6Open

D1MBRS340T3Q1

Si4888DY

TP6

TP3

3.3 V

C100.1 µF

C3100 µF

C2330 µF

TP1 TP2

1Back Side

123

5678

4

2

J2VOUTGND

+

VINVINUVLOPWRGDRTSYNCENACOMP

BOOTPHPH

LSGVBIASPGNDAGND

VSENSEPwPd

UVLO RT

Pull Up 3.3 or 5 V

VIN 4.5 to 20 V Max

6 to 18 V Nom

Power Good

J4 Open = EnableJ4 Closed = DisableJ3 = Bidirectional SynchronizationJ3 = Output if R4 open or shortJ3 = Input if R4 69 kΩ to 215 kΩ

SYNC SS / ENA


11/44


TPS54356

12-V to 3.3-V, 3-A Buck Converter Input with Bi-Directional Synchronization

50

55

60

65

70

75

80

85

90

95

100

0 1 2 3 4

VI = 6 V


E f f i c i e n c y –

%

VI = 12 V

VI = 18 V


VI = 5 V/div

VO = 2 V/div

V(PWRGD) = 2 V/div

I – Output Current – A

0 1 2 3 4

VI = 12 V

VI = 6 V

VI = 18 V

OutputVoltageChange–%

0.3

0.2

0.1

0

–0.1

–0.2

–0.3 t – Time = 2 ms/div

VI = 5 V/div

VO = 2 V/div

V(PWRGD) = 2 V/div

t – Time = 200 µs/div

IO = 1 A/div

VO = 50 mV/div (AC Coupled)

Efficiency vs. Output Current Power Up with Tracking

Load Regulation

Load Transient

Power Down with Tracking


12/44

12 TPS40021

Synchronous Buck Converter Delivers 20 A from Standard 5-V Input ➔


Specifications


nput Voltage 4.25 5 5.75 V


Load Current 0 20 A

Switching Frequency 255 300 345 kHz

Output Ripple Voltage VIN = 5 V; IO = 20 A 20 30 mVPP

Efficiency VIN = 5 V; IO = 20 A 91 %VIN = 5 V; IO = 10 A 95 %

VIN = 5 V; IO = 1 A 90 %

Description

his is a synchronous buck design that uses the TPS40021 to generate a 3.3-V output

t up to 20 A from a 5-V input. The TPS40021 is a low-input voltage synchronous buck

ontroller with integrated N-channel MOSFET drivers and Predictive Gate Drive™

echnology for high efficiency in a small footprint. A user-programmable operating

requency and synchronization input make the TPS40021 a versatile device that cane used in a wide variety of applications. The focus for this design was to generate a

ow-voltage/high-current output from a standard 5-V input.

Web Links:




Reference Design PMP1050

1

2

VIN

VINTP9

TP2

TP7

TP14.5 V to 5.5 V Input

VIN

GND

R14

2.61 kΩ0603

R7121 kΩ

J1

VOUT

3.3 V @ 20 AGND

+

+ +

TP5

TP6

2

1

+ 1

2

1

2

+ 1

2

C9150 µF

C10150 µF

C11150 µF

C1410 µF1210

D

1

2

3

4

5

6

7

8

ILIM/SYNC

VDD

OSNS

FB

COMP

SS/SD

RT

SGND

BT1

HDRV

SW

BT5

PVDD

LDRV

PGND

PGD

16

15

14

13

12

11

10

9

S

J2

Q5Si7880Dp

Q1Si7858DP

C347 µF1210

C447 µF1210

C547 µF1210

U1TPS40021PWP

+ +

TP8

TP10

TP3

C190.022 µF

0603

TP4L1B1

2.2 µH

D

G

G

S

17

PwPd

R1210 kΩ

R603

R1149.9

0603

R1010 kΩ

0603

C232700 pF

0603

R132 kΩ

0603

R911.8 kΩ

0603

C223300 pF

0603

C24133 pF

0603

R80

603

R4

0

R3

0603

C61 µF

C603

R11 kΩ0603

R210 kΩ0603

R62.61 kΩ0603

C121 µF0603

C131 µF

C2110 µF


13/44


TPS40021

Synchronous Buck Converter Delivers 20 A from Standard 5-V Input

Efficiency–%


0

10

20

30

40

50

60

70

80

90

100

0 2 4 6 8 10 12 14 16 18 20

3

.1 ms100m V

4

0.0m V

3.1 ms10.0 A

2.19 A

Gain–dB

Phase-°


0

10

20

30

40

50

60

Phase

Gain

100 1k 200k10k

180

150

90

30

0

60

120

100k


I O –

O u t p u t V o l t a g e -

V

3.25

3.27

3.29

3.31

3.33

3.35

3.37

3.39

3.41

3.43

3.45

1 3 5 7 9 11 13 15 17 19 21

45 µs20.0m V

4

1.2m V

Efficiency (VIN = 5 V) Transient Response (VIN = 5 V, IOUT = 0 A to 15 A)

Channel 3 = Output Current, Channel 4 = Output Voltage

Loop Response (VIN = 5 V, IOUT = 20 A)

Output Voltage Ripple (VIN = 5 V, IOUT = 20 A)

Output Voltage Precision


14/44

14 TPS40040

Cost-Optimized Synchronous Buck Converter Provides 4 A from 5.5 V ➔


Specifications


nput Voltage 5.5 VVOUT All 1 V

OUT 0 4 A


Efficiency 5.5 V at 4 A 88 %

Description

his reference design uses the TPS40040 controller to provide an output voltage of 1 V

t a current up to 4 A from a regulated 5.5-V input voltage. The TPS40040 is a low-cost

ynchronous buck controller that operates over the input voltage range of 2.25 V to

.5 V. The TPS40040 integrates several circuit functions, such as over-current, soft start,

nd fixed switching frequency to minimize the number of external components required.he controller also provides a short circuit threshold that is user selectable between

ne of three values. The protection level is set by a single external resistor from COMP

o GND. The controller ensures a monotonic startup of the output voltage whether the

utput voltage starts from zero volts or from a pre-biased output level. The controller

tilizes voltage mode operation at a fixed 300 kHz switching frequency (or 600 kHz

or the TPS40041) to maximize circuit efficiency. This reference design achieves a peak

fficiency of greater than 88%. The actual design PWB area is less than 0.8 in 2.

Web Links:


Datasheets, User’s Guides, Samples:


Reference Design PMP1632A

+C15

10 µF10 V

C200.1 µF

U2TPS40040

L32.2 µH

Q3 = AFDS6892A

Q3 = BFDS6892A

TP11

J3

TP12

1 V @ 4 AGND

TP13

TP10

C17220 µF10 V

C18220 µF10 V

C19220 µF10 V

1

2

3

4

1

21

2

3

4

8

7

6

5

ENB

FB

COMP

VDO

HDRV

SW

BOOT

LDRV

6 5

8 7

+GND

9

C22100 pF

C161 µF

R120

L20.33 µH

C14220 µF10 V

TP9

C2133 pF

C23820 pF

R1413 kΩ

R135.23 kΩ

R15100 kΩ

R17143 kΩ

R18Open

5.5 V

R16

49.9


15/44


TPS40040

Cost-Optimized Synchronous Buck Converter Provides 4 A from 5.5 V

78.0

80.0

82.0

84.0

88.0

86.0

90.0

92.0

94.0

96.0

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5

Efficiency–

%

Output Current – A

5.5 V Output

1 V Output

Frequency100

Gain

6 0

– 6 0

Efficiency Switch Node Waveforms (VIN = 12 V, VOUT 5.5 V)

(Loaded Current Stepped Between 0.5 A and 1 A)

Startup(VIN = 12 V, VOUT = 5.5 V @ 1 A, 1 V @ 4 A, 1.8 V @ 1.8 A)

Load Transients (VIN = 12 V, VOUT 5.5 V)

Control Loop Gain/Stability(VIN = 15 V, VOUT 5.5 V, Loaded to 4 A)


16/44

16 TPS40100

12-V IN , 5-A Synchronous Buck Converter with Voltage Margining and Tracking➔


Specifications




Load Current 0 5 6.5 A



Efficiency VIN = 12 V; IO = 5 A 89 %

VIN = 12 V; IO = 0.5 A 72 %

Description

his design utilizes the TPS40100 in a synchronous buck configuration to generate a

.8-V/5-A output from a 12-V input. In addition to providing this power conversion,

oltage margining, tracking, and device enable are supported through the use of user-

onfigurable jumpers. The TPS40100’s voltage margining feature allows the output to be

djusted 3% or 5% above or below the nominal 1.8 V through the use of a digital input.he TPS40100 also has an integrated tracking control loop that can limit the output

oltage according to the input voltage on the Tracking Input line. This feature is useful

n designs where power-up sequencing is needed. Other features of the TPS40100

nclude a wide input voltage range (4.5 V to 18 V), integrated gate drivers for N-channel

MOSFETs, adaptive gate-drive circuitry for improved efficiency, programmable Under

oltage Lockout (UVLO) protection, and programmable overcurrent protection.

Web Links:





VOUTGND

C27

1 µF1210

C3150 µFC2150 µFC1150 µF

+++

+ + + +

TP6

TP14

TP14

3

2

1

3

2

1

3

2

112

1

2 21

1

2

1

2

1

2

12

1

2

12

112

3

4

5

6

COMPFBTRKOUTTRKINUVLOILIM

VINSW

HDRVBST

V5BPLDRV

1817

16

15

14

13

VIN

7 8 2 5 9 1 0 1 1 1 2

M G U

M G D

S Y N C

P C

V O

I S N S

R T

B I A S

P w P d

G N D

S S

G M

P G N D

2 4 2 3 2 2 2 1 2 0 1 9

VIN

VIN

VIN

VIN

VIN

VIN

TP13

TP4TP3

TP1

J1

J2

TP2

J8

C280.047 µF

0603

R2811 kΩ0603 L3

4.7 µH0.492” sq

R190

R140 Q3

Si4408DYSO8

Q7Si4408DYSO8

C151 µFC603

C131 µFC603

C91 µFC603

R710 kΩR603

R40R603

R30R603

VIN = 12 VGND

TRKINVIN

Q122N7002

R2510 kΩ

R603

R186.34 kΩ

R603

R2049.9 kΩ

R603

R2410.7 kΩ

R603

R22187 kΩ

R603

R23250ΩkR603

D2

BAT54

R2151.1kΩR603

C160.015 µFC603

C170.1 µFC603

C180.022 µFC603

R174.99 kΩ

R603

R1628 kΩR603

C11180 pFC603

R1541.2 kΩ

R603

R90

R603 U2TPS40100RGE

R1110 kΩ

R603

C120.027 µF

C603

D1BAS16

C140.01 µFC603

N

N

J6

J5

J3

MGDN

VIN

MGUPVIN

R210 kΩ

R603

R110 kΩ

R603

Q22N7002

Q22N7002

C6220 µF

C7220 µF

C8220 µF


17/44


TPS40100

12-V IN , 5-A Synchronous Buck Converter with Voltage Margining and Tracking

Efficiency–%


100

90

80

70

60

50

40

30

20

10

00.0 0.1 0.2 0.3 0.4 0.5 0.6

1 ms

50 mV

1 ms5.0 A

4

3

Gain–dB

Phase–°


0

10

20

30

40

50

60

Phase

Gain

100 1 k 100 k 10 k

180

150

90

30

0

60

120

1 ms50 mV

3

3

Efficiency (VIN = 12 V) Transient Response (VIN = 12 V, IOUT = 0 A to 5 A)

Channel 3 = Output Voltage

Channel 4 = Output Current

Loop Response (VIN = 12 V, IOUT = 5 A)

Output Voltage Ripple (VIN = 12 V, IOUT = 5 A)

Tracking Input ResponseChannel 3 = 5-V Tracking Input

Channel 4 = 1.8-V Output


18/44

18 TPS40190

12-V Input, 1.5-V Output, 10-A Synchronous Buck Converter ➔


Description

he TPS40190EVM-001 evaluation module (EVM) is a synchronous buck converter

roviding a fixed 1.5-V output at up to 10 A from a 12-V input bus. The EVM is designed

o startup from a single supply, so no additional bias voltage is required for startup.

he module uses the TPS40190 reduced pin count synchronous buck controller.

PS40190EVM-001 is designed to use a regulated 12-V (10 V to 14 V) bus to produce aigh current, regulated 1.5-V output at up to 10 A of load current. The TPS40190EVM-

01 is designed to demonstrate the TPS40190 in a typical regulated bus to low-voltage

pplication while providing a number of test points to evaluate the performance of the

PS40190 in a given application. The EVM can be modified to support output voltages

rom 0.9 V to 3.3 V by changing a single set resistor.

Web Links:




Specifications


VIN 10 12 14 V

VOUT R6 = 9.53 k, R5 = 105 k 1.45 1.50 1.55 V

OUT 0 10 ASwitching Frequency 240 300 360 kHz

Output Ripple VIN = 14 V, IOUT = 10 A 25 50 mVPP

Peak Efficiency VOUT = 1.5 V, 8 A < 1OUT < 12 A VIN =10 V 87 %

VIN = 12 V 85

VIN = 14 V 83

Full Load Efficiency VOUT = 1.5 V, IOUT = 15 A VIN=10 V 84 %

VIN = 12 V 83

VIN = 14 V 81


1

25

4

321

11 PwPd

J1C12

C11330 µF

2.5 V

C1322 µF

3.3 V

C1010 µF1.5 V

C810 µF1.5 V

C64.7 µF

C50.1 µFR5Open

C11800 pF

C3270 pF

C215 pF

R449.0 kΩ

R5100 kΩ

R20.11 kΩ

R3100 kΩ

R749.9 kΩ

U1TPS40190DRC

R10.45 kΩ

C70.1 µF

Q2Si7300DP

Q12N7002

Q3Si7808DP

R9

R80

D1

MBR8038

C8

C4

L12.2 µH

C14 12 J2

1

1

2

3

4

5

1

2

3 1

EN

FB

COMP

VDD

GND

HDRV

SW

BOOT

LDRV

BP5

10

9

8

7

6

2

VIN

VIN

1.5 V

1

11

1

1

1

2

5

4

321

TP1

DISABLE

ENABLE

Optional component not populated on PCB

For loop response testing only

TP2 TP3 1.5 V

VIN

TP7

TP6

TP8

10 V - 14 VIN

GND

1.5 V @ 10 A

GND

TP9

TP10

TP11

TP4

TP5


19/44


TPS40190

12-V Input, 1.5-V Output, 10-A Synchronous Buck Converter

8 12 14

0 2 4 6 8 10

Load Current – IOUT – A

100

90

80

70

60

50

40

30

20

10

0

Efficiency–

%

8 12 14OutputVoltage–V O

U T

–(V)

0 2 4 6 8 10

Load Current – IOUT – A

1.505

1.5

1.495

1.49

1.485

1.48

1.475

Efficiency vs. Load Current

Line and Load Regulation


20/44

20 TPS5124

Dual Synchronous Converter Provides 3.3 V at 15 A and 1.5 V at 10 A from a 12-V Bus ➔


Specifications


nput Voltage 6.5 12 15 V


Channel 1

Output Current Range 6.5 V VIN 15 V 0 15 16

Output Ripple IOUT = 15 A 33 66 mVPP

Full Load Efficiency VIN = 12 V, VOUT = 3.3 V, IOUT = 15 A 90.6 %

Channel 2Output Current Range 6.5 V VIN 15 V 0 10 12

Output Ripple IOUT = 10 A 15 30 mVPP

Efficiency VIN = 12 V, VOUT = 1.53 V, IOUT = 10 A 85.5 %

Description

he TPS5124 is a dual independent synchronous buck controller. Both controllers inter-

al to the TPS5124 operate at 180° phase shift and the input ripple is partially cancelled

nd therefore the required input capacitance is reduced. Other features include separate

oft start circuit and standby control. See the TPS5124 data sheet (SLUS571) for detail.

his EVM is designed to operate from 12-V bus voltage. It generates two outputs, 3.3 Vt 15 A and 1.5 V at 10 A.

Web Links:





C70.01 µF

C25100 µF

C24100 µF

C26100 µF

C27100 µF

C1310 µF

C60.1 µF

C100.1 µF

C32.2 µF

C110.1 µF

C80.1 µF

C14 0.027 µF

C23 1000 pF

C16 47 pF

C21 1000 pF

R8 1.1 kΩ

C17 0.1 µF

C17 0.1 µF

C18 0.01 µF

C19 0.01 µF

C20 0.027 µF

C15 0.1 µF

U1TPS5124DBT

R12

1.5C2

2.2 µF

R151.5

C180.1 µF

R1414 kΩ

R1328 kΩ

R214

R7

49.9

R110 kΩ

C125600 pF

C225600 pF

R10

R913 kΩ

R1110 kΩ

R33.48 kΩ

R6100 kΩ Q2

Si7868DB

Q1Si7868DB

Q3Si7868DB

Q4Si7868DB

VO2

VIN

VO1

VIN

VIN

VO1

VO2

VIN

1

2

J2

TP1

TP11

TP2

1

1

2

1

11

S

S

G

D

D

G

S

D

D

S

G

G

2

2

J1

C4150 µF

C5150 µF

C12.2 µF

C31100 µF

C320.01 µF

C30100 µF

L22.2 µH

L12.2 µH

C 29100 µF

C28100 µF

TP5

TP12

TP6

11

2

J3

TP3

TP4

1

1

1

2

3

4

5

6

7

8

9

10

11

12

1314

15

INV1

FB1

SS1

NC

CT

NC

GND

REF

STBY1

STBY2

SCP

NC

SS2

FB2

INV2

LH1

OUT1_L1

LL1

OUT1_D

OUTGND1

TRIP1

VCC

TRIP2

VREF5

VLDS

OUTGND2

OUT2_D

LL2

OUT2_U

LH2

30

29

28

27

26

25

24

23

22

21

20

19

1817

16

TP10

TP9

JP1

JP2

R16

49.9

1

1

TP8TP7

+ +


21/44


TPS5124

Dual Synchronous Converter Provides 3.3 V at 15 A and 1.5 V at 10 A from a 12-V Bus

96

95

94

93

92

91

90

89

Efficiency–%

2 3 6 9 12 15

IOUT – Output Current – A

VIN = 15 V

VIN = 12 V

VIN = 6.5 V

VIN = 15 V

VOUT = 3.3 VIOUT = 15 A

100 1 k 10 k 100 k

fOSC – Frequency – Hz

50

40

30

20

10

0

–10

–20

–30

Gain–dB

180

160

140

120

100

80

60

40

20

0

Phase–°

Phase

Gain

VIN = 6.5 V

VIN = 12 V

VIN = 15 V

92

90

88

86

84

82

80

78

76

Efficiency–%

0 2 4 6 8 10

IOUT – Output Current – A100 1 k 10 k 100 k

fOSC – Frequency – Hz

40

30

20

10

0

–10

–20

–30

Gain–dB

180

160

140

120

100

80

60

40

20

0

–20

L = 0.6 µHVIN = 12 V

VOUT = 1.5 V

IOUT = 10 A

Gain

Phase

VIN = 15 V

VIN = 12 V

VIN = 6.5 V

96

94

92

90

88

86

Efficiency–%

0 0.2 0.4 0.6 0.8 1.0

Output Power Over the Full Power

Overall Efficiency vs. Output Current

VOUT1 (3.3 V) Enabled Only

Gain and Phase vs. Oscillator Frequency

(Channel 1)

Overall Efficiency vs. Output CurrentVOUT2 (1.5 V) Enabled Only

Overall Efficiency vs. Output Power

Both Channels Enabled

Gain and Phase vs. Oscillator Frequency(Channel 2)


22/44

22 TPS75003

Converter Provides Dual 2-A Buck Outputs and 300-mA Regulator ➔


Specifications


VIN 4.75 5 5.25 V

VOUT1 –40° C to 85° C, IOUT1 = 0 to 2 A 1.16 1.22 1.28 V

VOUT2 –40° C to 85° C, IOUT1 = 0 to 2 A 3.14 3.3 3.47

VOUT3 –40° C to 85° C, IOUT1 = 0 to 0.30 A 2.38 2.5 2.63

OUT1 0 2 A

OUT2 0 2 AOUT3 0 300 mA

VOUT1 Ripple Voltage VIN = 5.0 V; IO = 2 A 20 mVPP

VOUT2 Ripple Voltage VIN = 5.0 V; IO = 2 A 40 mVPP

VOUT1 Efficiency VIN = 5 V; IO = 10 mA 69 %

VOUT1 Efficiency VIN = 5 V; IO =1 A 79 %

VOUT2 Efficiency VIN = 5 V; IO = 10 mA 84 %

VOUT2 Efficiency VIN = 5 V; IO =1 A 91 %

Description

he TPS75003 is a multi-channel power management IC. The device consists of two

tep-down controllers, each capable of providing up to 3 A of output current and a

00-mA linear regulator. The input voltage input range is 2.2 V to 6.5 V. The buck con-

rollers can be configured for output voltages between 1.2 V and 6.5 V and the linear

egulator can be configured for output voltages between 1.0 V and 6.5 V. Individualnable pins and soft start capacitors for each output allow minimization of inrush

urrents at startup.

Web Links:




VIN

VIN

VIN

2.5 V, 300 mA OUT3 FB2

IN3

1.5 nF

100 µF

0.01 µF 1.5 nF

EN1

10 µF

1 µF

10 pF

100 µF

FB1

1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2

2 3 4 5 6 7 8 9

F B 3

E N 3

E N 2

S S 2

D G N D

S W 2

I N 2

I S 2

S S 3

A G N D

E N 1

S S 1

D G N D

S W 1

I N 1

I S 1

EN3EN2

1

20

10

11

DGND

0.1 µF

0.1 µF

Q1 SiliconixSi2323DS

Q2 1.2 V, 2 ASiliconixSi2323DS

D2

VishaySS32

L215 µH

SumidaCDRH8D43-150

L15 µH

SumidaCDRH6D38-5R0

D2ON Semiconductor

MBRM120

Sanyo POSCAP

6TPB100M

100 µFSanyo POSCAP

6TPB100M

3.3 V, 2 A

m

mR1



23/44


TPS75003

Converter Provides Dual 2-A Buck Outputs and 300-mA Regulator

Efficiency–%

20

40

60

80

100

0 500 1000 1500 2000

VIN = 5 V VOUT2 = 3.3 V

VOUT1 = 1.2 V

0

20

40

60

80

0 5 10 15 20 25 30 35 40 45 50

I O ( A C ) –

A C –

C o u p l e d O u t p u t V

o l t a g e – m V

µ

V O

( A C )

–AC–CoupledOutputVoltage–mV

0

20

40

60

80

0 5 10 15 20 25 30 35 40 45 50µ

V O

–OutputVoltage–V

t – Time – ms

0 5 10 15 20 25 30 35 40 45 50

6

5

4

3

2

1

0

IOUT1 = IOUT2 = 2 A

VOUT1 = 1.2 V

VOUT3 = 2.5 V

VOUT2 = 3.3 V

Efficiency

Output Ripple (VOUT = 3.3 V, IOUT = 2 A) Output Voltage vs. Time (EN2 = VOUT3, EN1 = VOUT2)

Output Ripple (VOUT = 1.2 V, IOUT = 2 A)


24/44

24 TPS40200

Flexible, Wide Input Range 3-A Buck Converter for 12-V and 24-V Inputs ➔


Specifications


nput Voltage 10.8 33 VOutput Voltage 3.45 3.6 3.75 V

Load Current 0 3 A


Output Ripple Voltage 40 mV/PPK

Description

he TPS40200 is a flexible non-synchronous controller with a built-in 200-mA driver

or P-channel FETs. The circuit operates with inputs up to 52 V with a power-saving

eature that turns off driver current once the external FET has been fully turned on.

he circuit operates with voltage-mode feedback and has feed-forward input-voltage

ompensation that responds instantly to input voltage change. The integral 700-mVeference is trimmed to 1%, providing the means to accurately control low voltages and

upports many of the features of more complex controllers. Clock frequency, soft start,

nd overcurrent limit are each easily programmed by a single, external component. The

art has undervoltage lockout, and can be easily synchronized to other controllers or a

ystem clock to satisfy sequencing and/or noise-reduction requirements. Ultra-wide-

nput operating range makes this controller suitable for a wide range of low-current

pplications.

Web Links:





10.8 - 33 VGND

C6820 pF

C13

470 pF

C14

0.47 µF

C15

47 pF

R6

20 kΩR7

100 kΩ

R9

49.9

R4

0

R3

1.0 kΩC5100 pF

C33.3 µF

C43.3 µF

R20.02

R273.2 kΩ

R924.3 kΩ

U1TPS40200D

L210 µH

D1MBRS340

Q1NDS9407

C9220 µF C1122 µF

3.6 V @ 3 AGND

C8

0.1 µF

R5100 kΩ

TP11

2

J8

TP2

TP3

TP6

TP8 TP9

TP4 TP5

TP7

+

1

2

1

1 2J2

23

4

57 6

8

1

2

3

4

RC

SS

COMP

FB

VDD

ISNS

DRV

GND

8

7

6

5

F = 280 kHz

C1220 µF

C722 pF

+


25/44


TPS40200

Flexible, Wide Input Range 3-A Buck Converter for 12-V and 24-V Inputs

72

74

76

7880

82

84

86

88

Efficiency–%

0 1.0 1.5 2.0 2.5 3.0 3.50.5

12 VIN

24 VIN

IOUT – A

V O U

T

–V

3.584

3.582

3.580

3.5783.576

3.574

3.5720 1.0


1.5 2.0 2.5 3.00.5

12 VIN

24 VIN

Frequency100

Gain

6 0

– 6 0

Efficiency Load Regulation

Output Ripple (VOUT = 3.65 V, IOUT = 3 A)

Start Up (VIN = 12 V, VOUT = 3.6 V) Control Loop (VIN = 33 V, Gain 1) (VIN = 10.8 V, Gain 2)

Load Transient (VIN = 3.6, Load Current = .5 A and 3 A)


26/44

26 TPS40222

5-V Input, 1.6-A Output, Non-Synch. Buck Converter with Minimal External Components ➔

eference Design Cookbook II for Power Management Products Texas Instruments 2Q 2006

Specifications


nput Voltage Range 4.5 8 V

No-Load Input Current VIN = 5 V, IOUT = 0 A, R5 = 120 Ω 11 mA(10-mA Load)

Output Voltage R2 = 10.0 k, R1 = 7.5 k 1.35 1.40 1.44 V

8 2

Output Voltage Ripple VIN = 5 V, IOUT = 1.0 A 10 mVPP

Output Load Current 0 1.6 A

Output Over Current 2.6 A

Switching Frequency 1.0 1.25 1.5 MHz

Peak Efficiency VOUT = 3.3 V, 0.1 A < IOUT < 1.0 A %

V5V_IN = 5 V 90

Full Load Efficiency VOUT = 1.25 V, IOUT = 1.6 A %

V5V_IN = 5.0 V 74

Description

he TPS40222EVM-001 evaluation module (EVM) is a non-synchronous buck converter

with a 4.5-V to 8-V input range with a built in N-channel power FET, that can deliver

.6 A of output current. The EVM is designed to operate with a minimum of components

nd yet has the features of more complex buck converters.

he TPS40222EVM-001 is designed to use a 4.5- to 8-V input voltage to produce a high

urrent, regulated 1.4 V output at up to 1.6 A of load current. This application board is

esigned to demonstrate the TPS40222 in a typical voltage bus to low-voltage applica-

on while providing a number of test points to evaluate the performance of the IC.

he EVM can be modified to support output voltages from 0.8 V to 6.3 V by changing a

ingle resistor. The TPS402224EVM-001 has been built with the internal clock operating

t 1.25 MHz.

Web Links:





+VINGND

2

1

1 2 3

6 5 4

1TP1

U1TPS40222

C32.2 µF

R310

C20.1 µF

C4

C622 µF6.3 V

C822 µF6.3 V

C722 µF6.3 V

C92.2 µF

C122 µF

D2BAT17

L13.3 µH

R451.1

R5120

R17.5 kΩ

R210 kΩ

D1RSX201L-30

C5100 nF

J1

TP2

+VOUTGND

1

2

TP1

TP5

TP4

J1

F B G N D

S W

B O O S T

A V I N

P V I N

P w P d

7

11 Optional components not installed.


27/44


TPS40222

5-V Input, 1.6-A Output, Non-Synch. Buck Converter with Minimal External Components

Efficiency

–%

Load Current – A

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

0.0000 0.2000 0.4000 0.6000 0.8000 1.0000 1.2000 1.4000 1.6000 1.8000

Efficiency

OutputVoltage–V

IOUT – Load Current – A

1.3985

1.399

1.3995

1.4

1.4005

1.401

1.4015

1.402

1.4025

1.403

0.0000 0.2000 0.4000 0.6000 0.8000 1.0000 1.2000 1.4000 1.6000 1.8000

Revision Tested E1

5 4.5 7

Efficiency vs. Load (VIN = 5, VOUT = 1.25)

Line and Load Regulation

Typical Ripple Voltage


28/44

28 TPS5430

Small, 3-A Integrated MOSFET Buck Converter from a 12-V or 15-V Input ➔


Description

he TPS5430 DC/DC converter is designed to provide up to a 3-A output from a typical

us voltage of 12 V or 15 V. This evaluation module is designed to demonstrate the

mall PCB areas that may be achieved when designing with the TPS5430 regulator and

oes not reflect the high input voltages that may be used when designing with this part.

he switching frequency is internally set at a nominal 500 kHz. The high-side MOSFETs incorporated inside the TPS5430 package along with the gate-drive circuitry. The low

rain-to-source on resistance of the MOSFET allows the TPS5430 to achieve high

fficiencies and helps to keep the junction temperature low at high output currents.

he compensation components are provided internal to the IC whereas an external

ivider allows for an adjustable output voltage. Additionally, the TPS5430 provides an

nable input. The absolute maximum input voltage is 24 V.

Web Links:





+

VOUT 5.0 VVIN

VIN

10.8 V to 19.8 V

GNDC3220 µF

D1B340A

L1

15 µH

R30

R110.0 kΩ

R23.24 kΩ

TP5

TP3TP6

TP4

J2

GND

1

2

C2

0.01 µF

C110 µF

EN

GND

TP1

JP1

J1U1

TPS5430DDA

TP2

1BOOT

PH

VSNS

PwPd

75236

VINENANCNCGND

21

8

4

9

Specifications


nput Voltage 10.8 12 or 15 19.8 VVOUT 5.0 V

OUT 0 3 A


Output Ripple Full Load 20 mVPP

Efficiency 12 VIN, 1 A Load 92.3% %


29/44


TPS5430

Small, 3-A Integrated MOSFET Buck Converter from a 12-V or 15-V Input

75

80

85

90

95

100

0 0.5 1 1.5 2 2.5 3 3.5

Efficiency–

%


VIN = 10.8 V

VIN = 12 V

VIN = 15 V

VIN = 19.8 V

VIN = 18 V

200 ms/div


IOUT = 1 A/div, .75 A to 2.25 A Step

OutputVoltageVariation–%


–0.3

–0.2

–0.1

0

0.1

0.2

0.3

0 0.5 1 1.5 2 2.5 3 –60

0

10

20

30

40

50

60

–30

–20

–10

–40–50

–180

0

30

60

90

120

150

180

–90

–60

–30

–120–150

1 M10 100 1 k 10 k 100 k

G a

i n

Phase

Gain


OutputVoltageDeviation–%


–0.1

–0.08

–0.06

–0.04

–0.02

0

0.02

0.04

0.06

0.08

0.1

10.8 13.8 16.8 19.8

IO = 3 A IO = 0 A

IO = 1.5 A

Time = 500 ns/div


PH - 5 V/div

Efficiency vs. Output Current Load Transient

Load Regulation vs. Output Current

Line Regulation vs. Input Voltage Output Voltage Ripple

Measured Loop Response


30/44

30 TPS51116

Integrated Buck Converter Plus LDO for DDR and DDR2 ➔


Specifications



Output Voltage (VDDQ) 2.425 2.5 2.575 V

Output Voltage Tol (VTT) VTT = VDDQ /2 –40 0 40 mVLoad Current (VDDQ) 0 6 A

Load Current (VTT) –3 3 A



Efficiency 1 VIN = 12 V; IO = 9 A 92 %

Efficiency 2 VIN = 12 V; IO = 4.5 A 92 %

Description

he TPS51116 provides a complete power supply solution for both DDR/SSTL-2 and

DR2/SSTL-18 memory systems. It integrates a synchronous buck controller with a

-A sink/source tracking linear regulator. The TPS51116 offers the lowest total solution

osts where system space is at a premium. This reference design operates from a

2-V rail and can provide a VDDQ voltage of either 2.5 V (DDR) or 1.8 V (DDR2) at 6-Amaximum. The VTT output voltage (1.25 V or 0.9 V) is supplied from an internal linear

egulator and is equal to half of the VDDQ output. This output voltage can either source

r sink 3-A maximum and is supplied by the VDDQ output. The synchronous buck

ontroller operates at 400 kHz using a pseudo-constant frequency PWM with an

daptive on-time control and implements current mode control.

Web Links:





2

1TP1

C522 µF6.3 V

C10

0.033 µF

C10

330 pF

C12

0.01 µF

R33.32 kΩ

R5100 kΩ

R120

R15Open

R65.76 kΩ

C154.7 µF6.3 V

C1322 µF10 V

C141 µF6 V

R70

C8220 µF4 V

C222 µF16 V

C3Open

C122 µF16 V

C947 µF6.3 V

Q2Si7636DP

C40.1 µF

Notes:1) For a VDDQ of 1.8 V (VTT - 0.9 V), R9 = 0 Ω and R8 = Open.

1) For a VDDQ of 2.5 V (VTT - 1.25 V), R8 = 0 Ω and R9 = Open.

R20

Q1Si7344DP

L11 µH

PGGND

(optional)Ext 5 V BiasGND

U2UA78M05

R4Open

R151.1 U1TPS51116PWP

R8

Open

R9

Open

R13

Open

R16

0

R110

R14Open

R10

Open

C622 µF6.3 V

VTT

0 mA Max)

25 V @ 3 AGND

VTTREFGND

J1

TP8

10.8 V - 13.2 VIN

J2

GND

1

2

TP4

TP3

VDDQ 2.5 V @ 6 AJ3

GND

1

2

TP7

TP91

2

J4

2

1 J5

2

1 J6

MODE

1

2

3

4

5

6

7

8

9

10

VBST

DRVH

LL

DRVL

PGND

CS

V5IN

PGOOD

S5

S3

VLDOIN

VTT

VTTGND

VTTSNS

GND

MODE

VTTREF

COMP

VDDQSNS

SVDDQSET

20

19

18

17

16

15

14

13

12

11

21PwPd

MODE

VDDQ

TP4

VDDQTP6

TP2

VDDQ

1

4

5

23

1

4

5

23

VIN

VIN

TP10

OUT INGND

TP11

5 V

+

+

+


31/44


TPS51116

Integrated Buck Converter Plus LDO for DDR and DDR2

88

89

90

91

92

93

0 1 2 3 4 5 6 7 8 9 10


E f f i c i e n c y – %

VIN = 12 V

Frequency 100 k100

Gain

6 0

– 6 0

Phase

1 8 0

– 1 8 0

OutputVoltage

2.490

2.491

2.492

2.493

2.494

2.495

2.4962.497

2.498

2.499

1 2 3 4 5 6 7 8 9 10


2.5 V 1.25 V X 2

Efficiency Turn On: 0.5 V/div, 200 µS/div

VIN = 12 V; 2.5 V @ 4 A, 1.25 V @ 1 A,

Control LoopVIN = 12 V; IO = 4 A

Voltage Tracking

Top Trace: VTT x 2 (1.25 V x 2)

Bottom Trace: VDDQ

Transient Response

Top Trace: 2.5 V @ 50 mV/div

Bottom Trace: IO @ 2 A/div

Output Ripple: 20 mV/div, 1µS/divVIN = 12 V; 2.5 V @ 9 A


32/44

32 TPS23750

IEEE 802.3af PD Controller with Integrated DC/DC ➔


Specifications


nput Voltage 34 48 57 VDC

Output Voltage 11.6 12.0 12.4 VDCLoad Current 0 1 A


Output Voltage Ripple VIN = 48 VDC, IOUT = 1 A 80 mV

Efficiency VIN = 48 VDC, IOUT = 1 A 84 %

Description

his reference design uses a TPS23750 in an isolated, discontinuous mode flyback

onverter for Power-over-Ethernet (PoE) applications. An input voltage of 34 to 57 VDC

s converted to 12 V at 1 A at efficiencies up to 84%. The high level of integration of

he TPS23750 provides a small, cost effective solution for PoE applications.

he TPS23750 integrates the functions of a PoE Powered Device (PD) switch and a

rimary side DC/DC PWM controller. The PoE front end is IEEE802.3af compliant and

ontains all necessary functions including detection, classification, undervoltage

ockout, and inrush current limit, plus the integrated input switch. The PWM section

upports isolated flyback and forward topologies, as well as non-isolated, low-

ide-switch buck topologies.

Web Links:





C822 µF16 V

C922 µF16 V

C722 µF16 V

C60.1 µF100 V

R4100kΩ

0.5 W

C41 µF

100 V

C120.22 µF

C200.22 µF

C15DNP

C110.1 µF100 V

C322 µF100 V

C51 µF100 V C10

330 µF16 V

12 V @ 1 AGND

C1610 pF

C142.2 µF

16 V

C175600 pF

R14121 kΩ

U3TL431ACDBZR

C2470 pF

R710

R324.9kΩ

R63570.25 W

R520

R9100

U2TCMT1107

R247

0.25 W

C132200 pF

2 kV

Q1

Si848DY

T2POE13F-12

L110 µH

C10.15 µF

T1H2019

EthernetPower

34 to 57 VDC

U1TPS23750PWP

DataPort

R160.4 kΩ

250 kHz

D3SMAJ58A

D7MURA120

D1MBRD360

D2MURA120

D8BAS16

D6BAS16

R127.5 kΩ

R152 kΩR10

0.250.25 W

C180.01 µF

C191 µF

R114.02 kΩ

2

2

1

1

11 12

103

123

3

8

4

7 6 5

7 8

5 6

REF

REF

J3

TP1

TP3

R1310 kΩ

R851.1

R162.61 kΩ

TP2

1

16

15

14

11

10

9

3

2

1 1

2

4

2

36

7

8

TMRFBCOMPSEN

SENPVDDDETCLASSVSS

FREQBL

VBIASMODE

AUXGATECOMRSNRSPRTN

20191817161514131211

123456789

10

21

PwPd

12345678

J11

2345678

J2

D5HD01-T

D4HD01-T

1

2

AC

AC

3

4ACAC

J4

+ +

–

+

–

–

+

+


33/44


TPS23750

IEEE 802.3af PD Controller with Integrated DC/DC

Efficiency

–%

IOUT – A

60.0

70.0

80.0

90.0

0.00 0.20 0.40 0.60 0.80 1.00

J2

J4

Frequency10 100 k

1 0 H z

1 0 0 H z

1 k H z

1 0 k H z

G a i n

– 6 0

6 0

P h a s e

– 1 8 0

1 8 0

-40 dB

-30 dB

-20 dB

-10 dB

0 dB

10 dB

20 dB

30 dB

40 dB

50 dB

-120 deg

-90 deg

-60 deg

-30 deg

0 deg

30 deg

60 deg

90 deg

120 deg

150 deg

1-Gain

1-Phase

Efficiency (VIN = 48 V) (J2 = System Efficiency) Load Step (3 = 1 ms, 100 mV) (4 = 1 ms, .50 A)

Control Loop (3-kHz Bandwidth, 90 Degrees)

Input Ripple (VIN = 48 V, 1-A Load Across J2-1 and 3) Turn On Response (VIN = 48 V) (0-A Load)

Output Ripple (VIN = 48 V, 1-A Load Across C10)


34/44

34 UCC2897

Negative Clamp Converter Provides 10 A at 12 V from a –48-V Telecom Input ➔


Specifications


nput Voltage –36 –48 –72 V


Load Current 0 10 A


Output Ripple Voltage VIN = –48 V; IO = 10 A 200 250 mVPP

Efficiency VIN = –48 V; IO = 7 A 93.4 %

VIN = –48 V; IO = 10 A 93.0 %

Description

his reference design uses the UCC2897 current mode, active clamp, PWM controller to

enerate an isolated 12-V/10-A output from a standard –48-V telecom input. Hot swap

nrush protection is provided by the TPS2391 hot-swap controller. The self-driven syn-

hronous rectifiers allow this design to achieve efficiencies above 93%. A secondary

urrent-sense resistor provides accurate current limit and output voltage fold back.emote sensing is also provided, allowing accurate regulation at the point of load.

Web Links:



www.ti.comPart Number Search: UCC2897


+

VO(–)

VO(+)

U3PC367N1

D9BAS16

R71 kΩ

R15 24.9 kΩ

R10 150 kΩ

R14 150 kΩ

R9 6.04 kΩ

R410 kΩ

C153900 pF

C110.1 µF

R13100 kΩ

R16100 kΩ

U5TPS2391DGK

1

2

3

4

1 W

FAULT

EN

FLTTME

IRAMP

RTN

GATE

ISNS

–VIN

8

7

6

5

J3VIN (–)

J2VIN (+)

D7BAT54

C141 µF

R12 2.49 kΩ

C16 1 µF

C23 0.01 µF

C21 0.01 µF

20

19

18

1716

15

14

13

12

11

N/C

LINEOV

LINEUV

VDD

PVDD

OUT

AUX

PGND

SS/SD

FB

VIN

N/C

RDEL

RTON

RTOFF

VREF

SYNC

GND

CS

RSLOPE

1

2

3

45

6

7

8

9

10

R17 121 kΩ

R19 66.5 kΩ

C17 1 µF

R84.99 kΩ

BIAS

VIN

REF

REF

REF

VIN

C241 µF

C22470 pF

R2549.9 kΩ

R3049.9 kΩ

C101 µF

C191 µF

C51 µF100 V

4

3

1

2

Q2FTZ491

Q4 FTZ491

Q1 SUD50N06-09L

D2 MURS110T3

D4 12 VR2 2.49 kΩ

D8 BAS16

U2:DTLC274AID

U2:BTLC274AID

U2:CTLC274AID

U1TL431AIDBZ

U2:ATLC274AIDR18

24.9 kΩ

R2920.5 kΩ

J5

J6 +SENSE

–SENSE

R5 4.99 kΩ

R3 0.01

R35 10 kΩ R35 1 kΩ

R33 10 kΩ R31 1 kΩ

C26 1 µF

C100 330 pF

C2100 µF16 V

C41 µF

C131 µF

C121 µF

J4

J1

C3DNP

C25 1 µF R11 12.1 kΩ

R21 20.5 kΩ

R20 1 kΩ

D10 BAS16

R26 49.9 kΩ

R31 49.9 kΩ

C19 1500 pFC20 4700pF

C18 56pF

R24 43.2 kΩ

R22 100 kΩ

R27 100 kΩ R28 49.9 kΩ

R23 49.9 kΩ

1 W

C61 µF100 V

C71 µF100 V

C81 µF100 V

Q8MMBT2222

Q7Si7450DP

Q5Si7450DP

L1PA1426

D1 BAS16

C168 µF16 V

T2PA1425

D3MURS110T3

Q3

SUD50N06-09L

R60.0251 W

D6BAS16

D512 V

R12.49 kΩ

Q9MMBT2907

Q6IREFR9214

Q10 IRFR7473 C9 0.047 µF

250 V

R36 0.01

BIAS2

BIAS2

VOUT+

BIAS2

BIAS

U4UCC2897PW

BIAS

VOUT–

VOUT–

VOUT–

VOUT+

3 4

2

1

7 8

6

5

18

5

8

7

6

2

3

7

6

5

2

3

4

12

1314

3

241

11

67

5

89

10

–

–

–

–

+

+

+

+

+


35/44


UCC2897

Negative Clamp Converter Provides 10 A at 12 V from a –48-V Telecom Input

78

80

82

84

86

88

90

92

94

0 1 2 3 4 5 6 7 8 9 10

Load Current – A

E f f i c i e n c y – %

-34 VIN -48 VIN -80 VIN

G a

i n

6 0

– 6 0

P h

a s e

1 8 0

– 1 8 0

Frequency 100 k100

Efficiency Output Ripple (VIN = –48 V; IO = 10 A; 100 mV/div; 2 µs/div)

Control Loop (VIN = –48 V; IO = 10 A)

Transient Response

Top Trace: VO @ 500 mV/div, 200 µs/div

Bottom Trace: IO @ 2 A/div, 200 µs/div

Turn On (VIN = –48 V; No Load)Channel 1: VOUT; 5 V/div; 5 ms/div


36/44

36 UCC3807

Boost Converter Provides 12 V from 4.5-V to 5.5-V V IN at 1 A➔


Specifications


nput Voltage 4.5 5.5 V

Output Voltage 11.88 12 12.12 V

Load Current 0 1 A


Output Ripple Voltage VOUT = 12 V 10 mV/PPK

Description

he UCC3807 family of high-speed, low-power ICs contains all of the control and drive

ircuitry required for off-line and DC/DC fixed-frequency current-mode switching power

upplies with minimal external parts count. In addition, the UCC3807 has the a program-

mable maximum duty cycle, which makes it easier to implement the boost topology.

Web Links:



www.ti.comPart Number Search: UCC3807


Q1Si7882DP

C222 µF16 V

C422 µF16 V

D1MBRD660CT

L23.3 µH

1

1

2

3

4

8

7

6

5

TRIG

COMPFB

CS

DSCHG

VDDOUT

GND

D

1

2

GS

2 1 2

L11.4 µH

R26.49 kΩ

R315 kΩ

C6470 pF

C80.1 µF

R42 kΩ

R820 kΩ

R61 M

R9332 kΩ

C122 µF16 V R1

20

C7

1 µF

C10330 pF

C111000 pF

U1UCC3807D-3

12 V @ 1 AGND

J3

.5 to 5.5 VDCGND

J3

TP5

TP3

TP2TP1

TP4

TP6

freq = 200 kHz

1

2

R7100 kΩ


37/44


UCC3807

Boost Converter Provides 12 V from 4.5-V to 5.5-V V IN at 1 A

Efficienc

y–%

76

77

78

79

80

81

82

83

84

0.00 0.10 0. 20 0. 30 0.40 0.50 0. 60 0. 70 0.80 0.90 1. 00 1. 10

5 VIN

IOUT – A

V O

U T

–V

IOUT – A

11.950

11.960

11.970

11.980

11.990

12.000

12.010

12.020

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1

5 VIN

Frequency 100 k100

Gain

6 0

– 6 0

Phase

1 8 0

– 1 8 0

Efficiency (VIN = 12 V) Start Up (VIN = 5 V, VOUT = 12 V, Loaded to 0 A)

Load Regulation

Control Loop (VIN = 5 V, Gain 1, 1 A, Phased 90 Degrees) Load Transient (VIN = 5 V, VOUT = 12 V, Pulsed to 0.1 A and

Load Transient (VIN = 5 V, VOUT = 12 V, Pulsed to 0.1 A and


38/44

38 bq24721

Advanced Multi-Chemistry and Multi-Cell Battery-Pack Charger ➔


Specifications


nput Voltage 13 24 V

Battery Regulation Voltage 12 19.2 V

Charge Current (Average) 0 3 6 A

Adapter Input Current 0 7 A

Average)

Switching Frequency 300k Hz

Efficiency VIN = 19.5 V, VBAT = 12.6 V; IO = 3000 mA 93 %

Description

he bq2472x family is a synchronous battery-pack charger and path selector with a high

evel of integration for portable applications. The output voltage, charge current and

nput current limit are programmable via a simplified SBS-like SMBus interface. It can

rovide up to 8 A of charge current from an input 8 V to 28 V for 3-cell or 4-cell Li-Ion or

i-Pol applications. The dynamic power management (DPM) function SMBus interfacemodifies the charge current depending on system load conditions, avoiding ac adapter

verload. High-accuracy current-sense amplifiers enable accurate measurement of

ither the charge current or the ac adapter current, allowing termination of nonsmart

acks and monitoring of overall system power.

Web Links:



www.ti.comPart Number Search: bq24721

Evaluation Module bq24721EVM

C210 µF

System

Pack+

Pack–

C180.1 µF

optional

C170.1 µF optional

C130.1 µF

C12 0.1 µF

Q5Si4435

Q2Si4435

Q3FDS6670A

Q4FDS6670A

C34x10 µF

L110 µH

R20.010

C140.1 µF

C52x10 µF

C16

0.1 µF

C42x10 µF

C190.1 µF

C22130 pFC20 51 pF

R11200 kΩ

R1020 kΩ

R9 7.5 kΩ

R1233 kΩ

C212000 pF

C15

0.1 µF

Q1Si4435

R40.010

D1BAT54C

C61 µF

C110 µF

R13118 kΩ

1%

PackThermistor

Sense

EmbeddedController

Host

ACGOOD

SMBus

IRQ

A/D

Adapter –

Adapter +

C90.1 µF

C101 µF

C110.1 µF Short PowerPAD™ to

PGND and AGND

bq24721

VCC

ACN

ACP

BYPASS

ACDET

VREF5

AGND

TS

CHGEN

SCLSDA

ALARM

IOUT

ISYNSET

FBO

EAI

EAO

BATSRN

SRP

SRNNSYNP

PGOODLODRV

REGN

BTST

PH

HIDRV

PVCC

BATDRV

ACDRV

SYS

PWPD

R55.6 kΩ

1%

R433.2 kΩ1%

R610 kΩ

R710 kΩ

R810 kΩ

R3464 kΩ1%

VREF5

VREF5

C7 0.1 µF

C80.1 µF

Pack+


39/44


bq24721

Advanced Multi-Chemistry and Multi-Cell Battery-Pack Charger

Battery Charge Current – A

0 1 2 3 4 5 6 7 8

100

95

90

85

80

75

E f f i c i e n c y –

%

V(BAT) = 16.8 V

V(BAT) = 12.6 V

VI = 19.5 VTA = 20° C

C h 1

2 0 V / d i v

C h 4

2 A / d i v

C h 2

2 V / d i v

Ch10 V

Ch40 A

Ch212.6 V


PH

BAT

Inductor Currrent

bq24720 OVP Response


C h 1

2 A / d i v

C h 3

2 A / d i v

C h 4

2 A / d i v

Ch40 A

Ch1Ch3

0 A

Ch4 = System Current

Ch3 = Battery Current

Ch1 = Input Current

Power Loop Verification (DPM) Transient Response

Constant Current Regulation, Then (DPM) Regulation

C h 3

1 A / d i v


0 A

InductorCurrent

Soft Start Operation

Efficiency vs. Battery Charge Current Battery Removal (Constant Current Mode)

Transient System Load Soft-Start Charge Current


40/44

40 UCD8220

Digital Half-Bridge Converter ➔

eference Design Cookbook II for Power Management Products Texas Instruments 2Q 2006

Specifications


nput Voltage 36 48 75 V

Output Voltage 12 V

Load Current 3 8.33 A

Switching Frequency Output Ripple 600 kHz

Output Ripple Voltage 20 mVPP

Efficiency VIN = 48; IO = 5 A 90.5 %

VIN = 48; IO = 8.33 A 90 %

Description

he UCD8220 is a digitally managed push-pull analog PWM controller to be used in

igitally managed power supplies using a microcontroller or the TMS320™ DSP family.

he UCD8220 is a double-ended PWM controller configured with push-pull drive logic.

ystems using the UCD8220 device close the PWM feedback loop with traditional

nalog methods, but the UCD8220 controller includes circuitry to interpret a time-omain digital pulse train “CLK Signal”. The pulse train sets the operating frequency

nd maximum duty-cycle limit which are used to control the power-supply operation.

his eases implementation of a converter with high-level control features without the

dded complexity or possible PWM resolution limitations of closing the control loop

n the discrete time domain. The UCD8220 reference design is a half-bridge topology

witching at 600 kHz. It operates from the standard telecom input range of 36 V to 75 V

nd produces 12 V at 100 W.

Web Links:



www.ti.comPart Number Search: UCD8220

Reference Design UCD8220

TP35

1

2

3

4

5

6

7

8

NC

CLK

3V3

ISET

AGND

CTRL

CLF

ILIM

VIN

NC

VDD

PVDD

OUT1

OUT2

PGND

CS

16

15

14

13

12

11

10

9

TP18

TP20

TP21

TP17

TP29

AGND

D1812 V

R4847

R82.4 kΩ

R4312.1 kΩ

Optional Start-Up Circuit for UCD8220

J6 1:2 = UCD8620J6 3:2 = UCD8220

R4412.1 kΩ

R36

0.1 µF

TP19TP15

R5817.4 kΩ

R47Open

C350.22 µF

C371000 pF

C560.1 µF

D21MBR0530

D20MBR0530

D19MBR0530

D15MBR0530

D16

BAS21

D17

BAS21

Q3KSC2881

TP34

TP30

UCD_3.3 V

CTRL

CLF

ILIM

OUT1

OUT2

CS_SENSE

UCD_12 V

CS

1

2

J11

1 2 3

J6

CLK

VIN

17

PwPd

U4

UCD8220PWP

2

2

2

2

C380.01 µF

R51Open

R490

R504.99 kΩ

R451

C34

2.2 µF

C33

4.7 µF

2

2

4

1

3

C

B

E

Note: The power stage and the remainder of the controlcircuitry is available on www.ti.com in the UCD8220 product folder.


41/44


UCD8220

Digital Half-Bridge Converter

1 2 3 4 5 6 7 8 9 10

0.93

0.92

0.91

0.900.89

0.88

0.87

0.86

0.85

0.84

0.83

IOUT

VIN = 36 VVIN = 48 VVIN = 75 V

10 100 1,000 10,000 100,000

180

135

90

45

0

–45

–90

–135

–180

40

30

20

10

0

–10

–20

–30

–40

G a

i n

Frequency

P h a s e

Mag (dB)Phase Margin (deg)

Efficiency vs. Output Current (VOUT = 12 V) Clock and VOUT Soft Start (VIN = 48 V, IOUT = 5 A)

UCD8220EVM Magnitude and Phase Plot(VIN = 48 V, IOUT = 8.3 A)

Clock and VOUT During Soft Start (VIN = 48 V, IOUT Set to 5 A) VOUT Ripple (VIN = 48 V, IOUT = 5 A)

Transient Response (VIN = 48 V, IOUT = 3 A to 8 A)


42/44

42 Resources


www.ti.com/selection

TI has a full line of selection guides to help in your design process:

• Amplifier and Data Converter

• Clocks and Timing

• DSP

• Interface

• Logic

• Low-Power RF

• MSP430

• Power Management

Information at Your Fingertips

www.ti.com/aaj-sgad

Download the current Analog Applications

Journal (and past issues) to make your design

challenges easier.


43/44


Resources

TI introduced its first “cookbook” of

power management reference designs

in 3Q 2005. In this catalog, you will find

many complete reference designs with

tables, schematics and waveforms. A

few of the designs included are:

• Synchronous Buck Converter

• Inverting Buck-Boost Converter

• 5-V, 1-A Boost Converter

• SEPIC High-Frequency Controller

• Negative-Output Flyback Converter

• Triple-Output Flyback PWM Controller • Lithium-Ion Charger

This cookbook and other reference

designs are available on TI’s power man-

agement reference design website at:

www.ti.com/powerreferencedesigns

Also, check out TI’s “Power Quick

Search” tool at power.ti.com for

recommended power solutions across

DC/DC conversion and PWM controller

products based on user input criteria.

Reference DesignCookbook I for

Power ManagementProducts

Online Available

Thanks for using TI's Design Reference Cookbook II.

TI is ready to help you with all your design challenges.

Consult TI's website specifically devoted to Power.

power.ti.com


44/44

Technology for InnovatorsTM

PRSRT STDU.S. POSTAGE

PAIDDALLAS, TEXAS

PERMIT NO. 2758

Texas Instruments Incorporated14950 FAA Blvd.

Ft. Wor th, Texas 76155-9950

Address service requested

TI Worldwide Technical SupportInternetTI Semiconductor Product Information CenterHome Pagesupport.ti.com

TI Semiconductor KnowledgeBase Home Pagesupport.ti.com/sc/knowledgebase

Product Information CentersAmericasPhone +1(972) 644-5580Fax +1(972)927-6377Internet support.ti .com/sc/pic/americas.htm

Europe, Middle East, and AfricaPhone

Belgium (English) +32 (0) 27 45 54 32Finland (English) +358 (0) 9 25173948France +33 (0) 1 30 70 11 64

Germany +49 (0) 8161 80 33 11Israel (English) 180 949 0107Italy 800 79 11 37Netherlands (English) +31 (0) 546 87 95 45Russia +7 (0) 95 363 4824Spain +34 902 35 40 28Sweden (English) +46 (0) 8587 555 22United Kingdom +44 (0) 1604 66 33 99

Fax +49 (0) 8161 80 2045Internet support.ti.com/sc/pic/euro.htm

Japan

Fax

International +81-3-3344-5317

Domestic 0120-81-0036Internet

International support.ti.com/sc/pic/japan.htmDomestic www.tij.co.jp/pic

AsiaPhone

International +886-2-23786800Domestic Toll Free Number

Australia 1-800-999-084China 800-820-8682Hong Kong 800-96-5941India +91-80-51381665 (Toll)Indonesia 001-803-8861-1006

Korea 080-551-2804Malaysia 1-800-80-3973New Zealand 0800-446-934Philippines 1-800-765-7404Singapore 800-886-1028Taiwan 0800-006800Thailand 001-800-886-0010

Fax +886-2-2378-6808Email [email protected] or [email protected] support .t i.com/sc/pic/asia.htm

Safe Harbor Statement

This publication may contain forward-looking statements that

involve a number of risks and uncertainties. These “forward-

looking statements” are intended to qualify for the safe harbor from

liability established by the Private Securities Litigation Reform Act

of 1995. These forward-looking statements generally can be

identified by phrases such as TI or its management “believes,”

“expects,” “anticipates,” “foresees,” “forecasts,” “estimates” orother words or phrases of similar import. Similarly, such state-

ments herein t hat describe the company’s products, business

strategy, outlook, object ives, plans, intentions or goals also are

forward-looking statements. All such forward-look ing state-

ments are subject to certain risks and uncertainties that could

cause actual results to differ materially from those in forward-

looking statements. Please refer to TI’s most recent Form 10-K for

more information on the risks and uncertainties that could materi-

ally affect future results of operations. We disclaim any intention

or obligation to update any forward-looking statements as a result

of developments occurring after the date of this publication.

Important Notice: The products and services of Texas

Instruments Incorporated and its subsidiaries described herein

are sold subject to TI’s standard terms and conditions of sale.

Customers are advised to obtain the most current and complete

information about TI products and services before placing orders.TI assumes no liability for applications assistance, customer’s

applications or product designs, software performance, or

infringement of patents. The publication of information regarding

any other company’s products or services does not constitute TI’s

approval, warranty or endorsement thereof.

Technology for Innovators, the black/red banner, TMS320 and

PowerPAD are trademarks of Texas Instruments. All other

trademarks are the property of their respective owners.

© 2006 Texas Instruments IncorporatedPrinted in U.S.A. by (Printer, City, State), on recycled paperD120905

Documents

PowerSolutions.pdf