Powerguru.org-The HalfBridge Circuit Revealed

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by Bodos Power Systems

The Half-Bridge Circuit Revealed

Confirm zero-voltage switching during all operating conditions

The half-bridge or totem-pole configuration is one of the most common switch circuit topologies used in power

electronics today. It is used in various applications such as synchronous buck converters, resonant converters,

electronic ballasts, induction heating and motion control, and offers such benefits as four-quadrant switching,

zero-voltage switching (ZVS), zero-current switching (ZCS), high-frequency operation, low EMI and high

efficiency.

By Tom Ribarich, International Rectifier, Director, Lighting Systems and Applications

As s imple as this swit ch conf igurat ion appears , it is actually decept ively simple. Much care should be taken

during the design of the half -bridge and drive circuitry to avoid many hidden pitf alls. This article provides a

short review of the half -bridge and how it works, illustrates proper gate drive circuits and layout

techniques, and describes various circuit pitf alls and how to avoid them.

The Half-Bridge Circuit

The halfbridge circuit consists of an upper and lower switch (typically MOSFETs) connected in a cascode

arrangement (Figure 1). This 5- terminal circuit includes a DC bus voltage input (1), a mid-point between the

two switches (2), a ground return (3), a low-s ide gate drive input (4) and a high-side gate drive input (5).

The input, output and Miller capacitances, as well as the anti-parallel diodes, of each switch are also

included in the circuit and are important f or understanding the half -bridge f unctionality.
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The two switches are turned on and of f complementary to each other (and with a non-o verlapping dead-

time) by applying the correct voltage waveforms at each of the gate drive inputs. The result is a square-

wave voltage at the mid-point t hat switches between the DC bus voltage and ground (Figure 2). With a

series R-C-L load connected between the mid-point and ground, an AC current is produced in the load

circuit as t he square-wave at the mid-po int oscillates up and down. A port ion of this AC current f lows in

each of the half -bridge switches, depending on which switch is on o r of f . The voltage and current

waveforms can be divided up into the following fo ur time zones.

Zone I: The upper switch turns on and the mid-po int is connected to the DC bus voltage. Current f lows

f rom the (+) side of the DC bus capacitor, through the upper switch, through the R-C-L load, and back to


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the (- ) ground return path. The current ramps up to a pos itive peak level during the on-t ime of the upper

switch.

Zone II: The upper switch turns of f and both switches remain of f during this short dead-t ime. The load

current continues to f low out of the mid-po int node. Half o f the load current f lows out of the top of the

lower switch output capacitance (CDS2), and the other half f lows out of the bot to m of the upper switch

output capacitance (CDS1). This causes the mid-point voltage to slew down to ground at a given dv/dt rate

determined by the total capacitance at t he mid-point and the instantaneous load current. The mid-point

voltage reaches ground and cont inues to go negative until it gets limited by the internal antiparallel diode(D2) of the lower MOSFET (S2). This diode, also known as the f ree-wheeling diode, allows t he R-C-L

current to f low in the negative direction while the switches are of f .

Zone III: The dead-time ends and the lower switch turns on. Because the mid-point voltage is at ground,

zero-voltage switching (ZVS) occurs when the lower switch turns on. Current continues to f low through the

channel of lower MOSFET (instead of the diode due to t he lower resist ance of the channel) and through

the R-C-L circuit. The current crosses zero and continues to ramp down to a negative peak level during the

on- time of the lower switch. No current f lows through the DC bus capacitor during this t ime.

Zone IV: The lower switch turns of f and both switches remain of f again during this deadtime. The load

current continues to f low into the mid-point node and is equally split between both output capacitances

(CDS1 and CDS2). The mid-point voltage slews up at a dv/dt rate determined by the total midpoint

capacitance and the instantaneous load current. The mid-point voltage gets limited by the DC bus voltage

plus the diode drop of the internal anti-parallel diode (D1) o f the upper MOSFET (S1). The current

continues to f low through this diode until the upper switch is turned on again at the start of Zone I.

Because the mid-point vo ltage is at the DC bus voltage at the end of Zone IV, zero-voltage switching (ZVS)

is achieved when the upper switch is turned on again at the beginning of Zone I.

In order to maintain ZVS across both switches, it is necessary that the mid-point voltage leads the load

current during each switching cycle. This ensures that the mid-point voltage properly slews to the opposite

rail during each dead-t ime. If the mid-point voltage is in-phase or lags t he load current, then mid-pointvoltage will not slew to the opposite rail during the dead-time and hardswitching will occur (Figure 3). A

large spike of current will occur at the turn-o n of each switch as the mid-po int capacitance is instant ly

charged or discharged. This gives high switching losses and can cause the switches to thermally destruct.

When ZVS is achieved in this resonant application, switching losses and EMI are signif icantly reduced. The

reduced switching losses then allows f or higher switching speeds f or reducing the size of the magnetics.

The f our-quadrant operation of the half bridge also allows f or t he load current to f low in the pos itive and

negative directions without interruption.

Gate Drive Circuits

The half -bridge requires a low-side gate drive circuit (ref erenced to ground) f or turning the lower MOSFET

on and of f , and requires a f loating high-s ide driver (referenced to the mid-point) f or turning the upper

MOSFET on and of f (Figure 4). The type of gate drive circuit used depends on t he input and Miller


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capacitances of the MOSFET, the switching f requency, and the half -bridge current amplitude. If the current

is low (


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4 is shown in Figure 5 to help illust rate good pcb techniques.

Conclusion

The half -bridge circuit is an elegant so lution f or many switched-mode applications that of f ers many

benef its. But these benef its are realizable only when the half -bridge circuit, the gate drive circuit, and

layout , are all properly designed. The half -bridge mid-po int voltage and current wavef orms should be

checked carefully to conf irm that Z VS is maintained during all operating conditions. Partial or hard-switchingcan give high switching losses and cause t he switches to overheat and thermally destruct. The gate drive

circuit should be properly designed so that it is suitable f or the size of the MOSFET being driven, the

amplitude of the half bridge current, and the operating f requency. Finally, much care should be taken during

the design of the layout t o avoid long gate drive loops o r poor grounding that can cause IC latch-up, EMI,

or f aulty switching.

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