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Chess Review May 10, 2004 Berkeley, CA Platform-based Design for Mixed Analog-Digital Designs Fernando De Bernardinis, Yanmei Li, Alberto Sangiovanni- Vincentelli

Platform-based Design for Mixed Analog-Digital Designs

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Page 1: Platform-based Design for Mixed Analog-Digital Designs

Chess ReviewMay 10, 2004Berkeley, CA

Platform-based Design for Mixed Analog-Digital Designs

Fernando De Bernardinis, Yanmei Li,Alberto Sangiovanni-Vincentelli

Page 2: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

Abstract

A design methodology for system level analog design is proposed. Analog Platforms provide a new abstraction layer that allows fast while accurate evaluation of analog components at the system level. Analog Constraint Graphs (ACGs) are introduced to make the approach more efficient. The basic idea and design flow of Platform-based Analog Design are presented. A multi-stage amplifier design is discussed as a proof-of-concept example.

Page 3: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

Analog Platform Definition

Analog Platform

Behavioral models

Performance models

Interconnection models

• Export non-idealities at system level• Fast, reasonably accurate simulations for system exploration• Built for Top-down use

• Constrain behavioral models to implementation architecture• Accurate models obtained through bottom-up characterization of platform

• Model analog component composition• Allow composing systems from APs maintaining performance accuracy

• Encapsulate analog components providing an abstraction level consistent with platform based design paradigm

• Implement function/communication/architecture mapping in the analog context

• Provide accurate performance estimation for optimization through constraints propagation

Page 4: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

Analog Platform Design Paradigm

• Decouple circuit from system design• Harness designer creativity

exporting several circuit topologies at the system level

• Platforms do not solve circuit synthesis problem directly, they export circuits at system level

System Requirements

Architectural Space

• Given a circuit topology, performance characterization defines the platform architectural space

• Performance models allow selecting feasible points in the architectural space

• The framework is the same as for digital platforms capture mixed signal designs

System Specs

System DesignMatlab/Simulink, V-AMS, …Breakdown Requirements

Syste

mLevel

Exp

lora

tio

n

Circuit designSize, Simulate and iterate

Layout designVerify and iterate C

ircu

it

Siz

ing

&S

yn

thesi

s

Analog Platform

Page 5: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

Performance Models

• Performance models allow defining multiple levels of abstraction– Performance models map the architecture space I of level i into the

architecture space O of level i+1

• For a circuit platform i:– I is the set of n-tuples (I Rn)

{W1, W2, …, L1, L2, …, IB1, …, VB1, ..}– O is the set of m-tuples (O Rm)

{Power, Gain, NF, IIP3, P-1dB, DR,…} : Rn Rm is the AP Evaluation function

• analytical expressions, simplified simulations, Spice simulations

• A performance model is a relation P s.t. P(x)=1 x(I)

I

O

Page 6: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

Platform Characterization

• Performance models are approximated with Support Vector Machines (SVMs)

n-dimensional functions that evaluate to {0,1}, 2D projection shown aside

• Characterization cost C #sim · Tsim kdim(I) · Tsim

– Constrain with Analog Constraint Graphs so that effective dimensionality is drastically reduced

– Exploit ACGs to bias characterization

• A tool set is available to generate performance models

IB

W2L2

W4

L4

VGS2

01

2

LVVTGS

DS TGS

VV

L

WkI

0

1

2

LVVTGS

DS TGS

VV

L

WkI

VGS4

2M=WM/LM

½

½

0 DDTGS VVV

ρα γ

i

xxii

ieyxP2

sgn)(

Page 7: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

AP Flow: Bottom-up Phase

• Define the platform library for the system• New topologies can be easily added and compared through the

exploration-through optimization top-down flow

Define behavioral Define behavioral model and model and PP

Select new topologySelect new topology

Derive ACG and Derive ACG and nominal configurationnominal configuration

Generate Generate PP

Select new topologySelect new topology

Derive ACG and Derive ACG and nominal configurationnominal configuration

Generate Generate PP

……

Page 8: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

AP Design Flow: Top-down Phase• Set a well defined design

problemBuild System with APsBuild System with APs

Define a formal setDefine a formal setof conditions for feasibilityof conditions for feasibility

Define an objective Define an objective function for optimizationfunction for optimization

Optimize system constraining Optimize system constraining behavioral models to their behavioral models to their

Run local optimization to meet Run local optimization to meet requirementsrequirements

Refine/Add platformsRefine/Add platforms

• Automatic exploration needs formal definition for working systems

• Optimize the system and refine the architectural blocks – Architectural exploration is performed

Return optimal performancesReturn optimal performancesand candidate solutionsand candidate solutions

Page 9: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

AP Design Example – Bottom up

• Multi-stage gm/gm wide-band amplifier• Top-level design problem:

– determine optimal configuration (#stages and gain distribution) so to minimize power

• First step: behavioral model

• Second step: Interconnection model ( Cload)

• Third step: Performance model

2noisev

inLOADV vCA )(

inr dBf 3

+-

+-

n

Page 10: Platform-based Design for Mixed Analog-Digital Designs

Chess Review, May 10, 2004

AP Design Example – Top down

• Exploit Platforms for optimizing the system

• Formulate as an optimization problem at behavioral level

• Constrain instances with APs

• Perform optimization (SA)• Return feasible specs and

candidate instances

n

out