Performed by: Rami May , Roee Cohen

Instructor: Daniel Alkalay

מהירות ספרתיות למערכות High speed digital systems laboratoryהמעבדה

הטכניון - מכון טכנולוגי לישראל

הפקולטה להנדסת חשמל

Technion - Israel institute of technologydepartment of Electrical Engineering

פרויקט” סיכום ח דו

Implementation of generic interface To electronic components

via USB2 Connection

) שנה ) חורף 2008סמסטר1

Abstractמהירות ספרתיות למערכות High speed digital systems laboratoryהמעבדה

2

• The  project  motivation was to prove system design capabilities using a low cost (99$) FPGA evaluation board and PC control.

• demonstration of this PC/FPGA system where : control and sampling of an external analog/digital HW and image processing on the FPGA

• the system implementations should demonstrate the concept of flexible partition of applications between HW and SW.

System descriptionמהירות ספרתיות למערכות High speed digital systems laboratoryהמעבדה

3

• This  project implements a system which combines SW & HW elements

• The system shows the ability to mange the HW devices from the PC and to perform operations like data generation or sampling , image processing and controlling

• The project consist the following elements– On the PC:

• GUI• C++ main code application• Matlab functions• USB drivers

– HW :• Cypress micro-controller • Xilinx FPGA Spartan 3E• Board peripherals ( LED’s Segments, push buttons)• External devices ( A/D , D/A, PCB )

Specificationמהירות ספרתיות למערכות High speed digital systems laboratoryהמעבדה

• Hardware :•Interfacing the Cypress micro controller•Ability to active the board peripherals and GPIOs•Ability to send and receive streams from external devices.•Ability for image processing

• Software:• demonstrate simple GUI to user•Interfacing the USB driver which installed on PC•Ability to show pictures•Ability to send commands to the FPGA•Ability to send streams to FPGA

4

System Block Diagramמהירות ספרתיות למערכות High speed digital systems laboratoryהמעבדה

Scop

5

USB2PCB card

FPGA 100 MHz

Function generator

Analog signal

USB2

wires

wires

VHDL

Scop

D/A

FPGA Block Diagramמהירות ספרתיות למערכות High speed digital systems laboratoryהמעבדה

6

Generic USB Block

USB interface

I/O to Cypress

Registers

General register

0_7Channel1 Read

0_7Channel1 Write

0_7Channel2 Read

0_7Channel2 Write

IN_FIFO

OUT_FIFO

Bur

st D

AT

A P

orts

INCh1

OUTCh2

Channel1 Full

Write Channel1

Channel1 Data

Read Channel2

Channel2 empty

Channel2 Data

RegCh1

RegCh2

Ch 1_ enCh 2_ en

Ch1 Reg Write

Ch1 Reg Data OutCh1 Reg Data In

Ch2 Reg Read

Ch1 Reg Addr

Ch2 Reg Data OutCh2 Reg Data In

Ch2 Reg Write

Ch2 Reg Addr

Reg

iste

rs P

orts

TX Data

TX Control

RX data

RX Control

CYPRESS

full

empty

SLOESLRD

FD[15:0]

SLWR

PKTEND

SW Block Diagramמהירות ספרתיות למערכות High speed digital systems laboratoryהמעבדה

GUI

Control EngineMATLAB IF

Received array

Transfer array

FILE*

MATLAB

USB DRIVER

USB IF

]512[

]512[

JPEG Format