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Partitioned Real-Time NAND Flash Storage
Katherine Missimer and Rich West
Introduction
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© CircuitsToday
© Eric Risberg AP
Introduction
3© Chesky_W © Mapping Ignorance
© Analytics Vidhya© CircuitsToday
© Eric Risberg AP
Introduction
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© The Robotics Institute
© Chesky_W © Mapping Ignorance
© Analytics Vidhya© CircuitsToday
© Eric Risberg AP
NAND Flash Memory
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Non-volatility
Shock resistance
Low power consumption
Fast access time
NAND Flash Memory
Non-volatility
Shock resistance
Low power consumption
Fast access time
No in-place updates
Reads & writes operate at different granularity than erasures
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SSD Internals
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SSD Internals
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SSD Internals
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SSD Internals
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SSD Internals
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Observations
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PaRT-FTL
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PaRT-FTL
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PaRT-FTL
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PaRT-FTL
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Buffered pages
Page writes for different ways/chips are buffered.
PaRT-FTL
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Buffered pages
When a block of buffered data is written to each flash chip in Way 1, the write set rotates to Way 2.
PaRT-FTL
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Buffered pages
PaRT-FTL
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Buffered pages
When updating a partially flushed stripe of data, the old pages that are in the buffer are marked as invalid.
PaRT-FTL
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Buffered pages
PaRT-FTL
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Buffered pages
PaRT-FTL
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Buffered pages
Real-Time Task Model
Parameters for a task:
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# pages in read request
# pages in write request
read period
write period
Real-Time Task Model
Parameters for a task:
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# pages in read request
# pages in write request
read period
write period
A task does not account for the CPU computation time.These tasks exist on the flash translation layer and utilize the NAND bus.
Real-Time Task Model
Parameters for a task:
Read capacity: Write capacity:
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# pages in read request
time toread a page
time todecode a page
Real-Time Task Model
Parameters for a task:
Read capacity: Write capacity:
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# pages in write request
time to write a page
# writechips
Real-Time Task Model
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Real-Time Task Model
Encoding task when w > 0:
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time to write a page
# pages per block
# writechips
time toencode a page
Real-Time Task Model
Encoding task when w > 0:
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# pages per block
# pages in write request
write period
Real-Time Task Model
Garbage collection task when w > 0:
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NAND Flash Memory Garbage Collection
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1. Write 3 flash pages of Logical Page Numbers (LPN): 0, 1, 2
NAND Flash Memory Garbage Collection
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1. Write 3 flash pages of Logical Page Numbers (LPN): 0, 1, 2
2. Update LPN=0
NAND Flash Memory Garbage Collection
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1. Write 3 flash pages of Logical Page Numbers (LPN): 0, 1, 2
2. Update LPN=0
3. GC triggered to reclaim Block 1000
NAND Flash Memory Garbage Collection
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1. Write 3 flash pages of Logical Page Numbers (LPN): 0, 1, 2
2. Update LPN=0
3. GC triggered to reclaim Block 1000
4. Copy valid pages in victim block to a free block
NAND Flash Memory Garbage Collection
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1. Write 3 flash pages of Logical Page Numbers (LPN): 0, 1, 2
2. Update LPN=0
3. GC triggered to reclaim Block 1000
4. Copy valid pages in victim block to a free block
5. Erase victim block
Real-Time Task Model
Garbage collection task when w > 0:
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Over-provisioning
Real-Time Task Model
Garbage collection task when w > 0:Over-provisioning GC victim block
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Real-Time Task Model
time before the next block needs to be reclaimed
Garbage collection task when w > 0:
time spent copying valid pages and erasing the victim block
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Admission Control
Read set:
Write set:
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Admission Control
Read set:
Write set:
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minimum read period
time toread a page
Admission Control
Read set:
Write set:
41minimum period in all write, encoding and GC tasks
time toerase a block
Admission Control Simulations
# of task sets: 500
# of tasks per task set: 10
Each task makes 1-page read and 3-page write requests per period
Periods are calculated based on generated utilizations
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OpenSSD Cosmos Board
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Experimental Results: PaRT-FTL
8 tasks
4 tasks make write requests: 12-page writes every 60 msec
4 tasks make read requests: 3-page reads every 15 msec
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Write requests Read requests
Experimental Results: WAO-GC
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Write requests Read requests8 tasks
4 tasks make write requests: 12-page writes every 60 msec
4 tasks make read requests: 3-page reads every 15 msec
Experimental Results
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Conclusion
Contributions of PaRT-FTL:● An FTL design that takes advantage of internal
parallelism in SSDs● A real-time task model for read and write requests on
multiple flash chips● Bounded and low-latency read requests that are not
blocked by write requests or garbage collection
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Thank you!
