75
EEE Dept, BVRIT. Electrical Engineering Lab Padmasri Dr B V Raju Institute of Technology Narsapur, Medak (Dt)-502313. Electrical Engineering Laboratory Manual II B.Tech II-Sem (ECE) 2011-2012 www.jntuworld.com www.jntuworld.com www.jwjobs.net

Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

  • Upload
    others

  • View
    3

  • Download
    0

Embed Size (px)

Citation preview

Page 1: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Padmasri Dr B V Raju Institute of Technology

Narsapur, Medak (Dt)-502313.

Electrical Engineering Laboratory Manual

II B.Tech II-Sem (ECE)

2011-2012

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 2: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Instructions to the students to conduct an experiment:

1. Students are supposed to come to the lab with preparation, proper dress code and the set of tools required (1. Cutter, 2. Tester (small size), 3. Plier (6-Inches)).

2. Dress code:

Boys: Shoe & Tuck.

Girls: Apron & Cut shoe.

3. Don’t switch on the power supply without getting your circuit connections verified.

4. Disciplinary action can be taken in the event of mishandling the equipment or switching on the power supply without faculty presence.

5. All the apparatus taken should be returned to the Lab Assistant concerned, before leaving the lab.

6. You have to get both your Observation book and your Record for a particular experiment corrected well before coming to the next experiment.

Guidelines to write your Observation book:

1. Experiment title, Aim, Apparatus, Procedure should be right side.

2. Circuit diagrams, Model graphs, Observations table, Calculations table should be left side.

3. Theoretical and model calculations can be any side as per convenience.

4. Result should always be at the end (i.e. there should be nothing written related to an experiment after its result).

5. You have to write the information for all the experiments in your observation book.

6. You are advised to leave sufficient no of pages between successive experiments in your observation book for the purpose of theoretical and model calculations.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 3: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

ELECTRICAL ENGINEERING LAB

II B.Tech II SEM ECE (A&B) 2011-2012

List of Experiments

1. Verification of KCL & KVL.

2. Series & Parallel resonance-Timing, Resonant frequency, Bandwidth and Q-factor

determination for RLC network.

3. Time response of first order RC/RL network for periodic non sinusoidal input-Time constant

and steady state error determination.

4. Two port network parameters-Z, Y, ABCD and h-Parameters.

5. Verification of Superposition and Reciprocity theorems.

6. Verification of Maximum Power Transfer theorem.

7. Experimental verification of Thevenin’s and Norton’s theorems.

8. Magnetization characteristics of D.C. Shunt Generator.

9. Swinburne’s Test on a DC Shunt Motor.

10. Brake test on DC a Shunt Motor.

11 O C & SC Tests on a 1-φ Transformer.

12. Load test on a 1- φTransformer.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 4: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Expt No: 1

Verification of KVL and KCL.

Aim: To verify Kirchhoff’s Voltage Law and and Kirchhoff’s Current Law theoretically and practically.

Apparatus:

S.No Name of the equipment Range Type Quantity

1. Voltmeters

2. Ammeters

3. Multimeter

4. Connecting wires as per need

Theory:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 5: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

_

+

_+

Fig-1

VS +

V1

V_

+ V

_+

V

V

V2 V3

VS

_ +

Fig-2

VS +

A

I

I1 _

+A

_+

A

I2

Circuit Diagram of KVL:

Circuit Diagram of KCL:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 6: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Procedure:

1. To verify KVL, Connections are made as shown in the Fig-1

2. Supply is given to the circuit and the readings of the voltmeters are noted down.

3. Kirchhoff’s Voltage law can be verified by Vs=V1+V2+V3.

4. To verify KCL, Connections are made as shown in the Fig-2.

5. Supply is given to the circuit and the readings of the Ammeters are noted down.

6. Kirchhoff’s Current law can be verified by I=I1+I2.

Theoretical Calculations:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 7: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Observations Table:

Vs V1 V2 V3 V1+V2+V3 I I1 I2 I1 +I2

Theoretical Values

Practical Values

Precautions:

1. Making loose connections are to be avoided.

2. Readings should be taken carefully without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 8: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Expt. No: 2

Series and Parallel resonance Aim: To verify Resonant Frequency, Bandwidth & Quality factor of RLC Series and Parallel Resonant circuits. Apparatus: S.No Name of the equipment Range Type Quantity

1. Multimeter

2. Series and parallel resonance kit

3. Connecting wires as per need Theory: Theoretical Calculations: Formulae Required. Series Resonance:

1. Resonant frequency, LC2π

1fo =

2. Quality factor, R

Lf2R

XQ oL π==

3. Bandwidth, QfBW o=

Parallel Resonance:

1. Resonant frequency, 2

2

o1

21f

LR

LC−=

π

2. Quality factor, Lf2

RXRQ

oL π==

3. Bandwidth, QfBW o=

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 9: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Procedure: Series Resonance:

1. Circuit is connected as shown in the fig (1).

2. A fixed voltage is applied to the circuit through function generator.

3. The frequency is varied in steps and the corresponding ammeter reading is noted down as Is.

4. A graph is drawn between frequency f and current Is. Resonant frequency (fo) and Half power

frequencies (f1, f2) are marked on the graph.

5. Bandwidth = (f2-f1.) & Quality factor are found from the graph.

6. Practical values of Resonant Frequency, Q-factor and Bandwidth are compared with theoretical

values.

Parallel Resonance: 1. Circuit is connected as shown in the fig (2)

2. A fixed voltage is applied to the circuit through function generator.

3. The frequency is varied in steps and the corresponding ammeter reading is noted down as Ip.

4. A graph is drawn between frequency f and current Ip. Resonant Frequency (fo) and Half power

frequencies (f1, f2) are marked on the graph.

5. Bandwidth = (f2-f1.) & Quality factor are found from the graph.

6. Practical values of Resonant Frequency, Q-factor and Bandwidth are compared with theoretical

values.

BWfQ 0=

BWfQ 0=

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 10: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

fof1

maxI

f

2maxI

f2

IS

Circuit Diagram of Series Resonance:

Model Graph:

A Is Function generator

Fig-1

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 11: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

Circuit Diagram of Parallel Resonance:

Model Graph:

fo

IP

f f1

minI

min2I

f2

A Ip

Fig-2

Function generator

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 12: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

12

Observations:

Series Resonance Parallel Resonance

Result Table:

S.No. Frequency (f) Current(Is)

S.No. Frequency (f) Current(Ip)

Series Resonance Parallel Resonance

Theoretical Practical Theoretical Practical

Resonant frequency(f0)

Bandwidth(BW)

Quality factor(Q)

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 13: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

13

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 14: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

14

Precautions:

1. Making loose connections are to be avoided.

2. Readings should be taken carefully without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 15: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

15

Expt. No:3

Time response of Series RL and RC circuits Aim: To draw the time response of first order series RL and RC network for periodic Non- Sinusoidal function and verify the time constant. Apparatus: S.No Name of the equipment Range Type Quantity

1. Function generator 1

2. Decade Resistance box 1

3. Decade Inductance box 1

4. Decade Capacitance box 1

5. CRO 1

6. CRO probes 1

7. Connecting wires As required Theory: Theoretical Calculations: Formulae required:

For RL Series circuit, Time constant,RL

For RC Series circuit, Time constant, RCτ =

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 16: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

16

Vin

VL

VC

t

t

t

Circuit diagrams:

Series RL Circuit

Series RC Circuit

Model Graph:

Function Generator

Fig-1

To CRO

Function Generator

Fig-2

To CRO

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 17: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

17

Procedure:

Series RL Circuit:

1. Connections are made as shown in the fig-1.

2. Input voltage (Square wave) is set to a particular value.

3. The waveform of voltage across inductor is observed on CRO and the waveform is drawn on a graph sheet.

4. The time constant is found from the graph and verified with the theoretical value.

Series RC Circuit:

1. Connections are made as shown in the fig-2.

2. Input voltage (Square wave) is set to a particular value.

3. The waveform of voltage across the capacitor is observed on CRO and the waveform is drawn on a graph sheet.

4. The time constant is found from the graph and verified with the theoretical value.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 18: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

18

Result table:

Series RL Circuit Series RC Circuit

Theoretical Practical Theoretical Practical

Time Constant(τ)

Precautions:

1. Making loose connections are to be avoided.

2. Readings should be taken carefully without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 19: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

19

Expt. No:4

Two port network parameters (Z, Y, ABCD and Hybrid parameters)

Aim: To obtain experimentally Z , Y, ABCD and h-parameters and of a given two port network. Apparatus: S.No Name of the equipment Range Type Quantity

1. Ammeter

2. Voltmeter

3. Rheostats

4. DC Power Supply 5. Digital Multimeter 6. Connecting wires as per need

Theory: Theoretical Calculations:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 20: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

20

Formulae required: Z-Parameters:

Y-Parameters:

ABCD Parameters:

Hybrid or h- Parameters:

02

222

02

112

01

221

01

111

11

22

;

;

==

==

==

==

II

II

IVZ

IVZ

IVZ

IVZ

2221212

2121111

IZIZVIZIZV

+=+=

2221212

2121111

VYVYIVYVYI

+=+=

02

222

02

112

01

221

01

111

11

22

;

;

==

==

==

==

VV

VV

VIY

VIY

VIY

VIY

221

221

DICVIBIAVV

−=−=

02

1

02

1

02

1

02

1

22

22

;

;

==

==

−=−=

==

VV

II

IID

IVB

VIC

VVA

2221212

2121111

VhIhIVhIhV

+=+=

02

222

02

112

01

221

01

111

11

22

;

;

==

==

==

==

II

VV

VIh

VVh

IIh

IVh

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 21: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

21

+V1

+V2

Fig-1

+

V1 ⎯

V2

I1

A

V

+

_

+ _

Fig-2

+

V1 ⎯

I2

I1

A

A

+

_

+ _

V1 V2

I1 I2+ +

_ _

A Linear and Passive Network

CIRCUIT DIAGRAMS: When I2 = 0:

When V2 = 0:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 22: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

22

Fig-3

+

V1 ⎯V2

I2

A

V

+

_

+ _

Fig-4

+

I1 ⎯V2

I2

A

A

+

_

+_

When I1= 0: When V1= 0:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 23: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

23

Procedure: 1. Open Circuiting Output Terminals (I2 = 0):

a) Connections are made shown in fig (1).

b) Supply is given to input port.

c) The readings of ammeter as I1 and Voltmeter as V2 are noted down.

2. Short circuiting output terminals (V2 = 0):

a) Connections are made shown in fig (2).

b) Supply is given to input port.

c) The readings of ammeters as I1& I2 are noted down.

3. Open circuiting input terminals (I1 = 0):

a) Connections are made shown in fig (3).

b) Supply is given to output port.

c) The readings of ammeter as I1 and Voltmeter as V1 are noted down.

4. Short circuiting input terminals (V1=0):

a) Connections are made shown in fig (4).

b) Supply is given to output port.

c) The readings of ammeters as I1& I2 are noted down.

5. The Z, Y, ABCD, Hybrid parameters are calculated using formulae and verified with theoretical

values.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 24: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

24

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 25: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

25

Observations:

When I1=0 When I2=0

S.No. V1

I2

V2

When V1=0 When V2=0

S.No. I2

I1

V2

Result Table:

Z Parameters Y Parameters

Z11 Z12 Z21 Z22 Y11 Y12 Y21 Y22

Theoretical

Practical

S.No. V1

I1

V2

S.No. V1

I1

I2

ABCD Parameters Hybrid Parameters

A B C D h11 h12 h21 h22

Theoretical

Practical

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 26: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

26

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 27: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

27

Precautions:

1. Making loose connections are to be avoided.

2. Readings should be taken carefully without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 28: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

28

Expt No:5

Superposition theorem and Reciprocity theorems

Aim:To verify Superposition and Reciprocity theorems theoretically and practically.

Apparatus :

S.No Name of the equipment Range Type Quantity

1. Ammeter

2. Rheostats

3. DC Power Supply

4. Multimeter Digital

5. Connecting wires as per need

Theory:

Superposition Theorem Statement

In any linear bilateral network containing two or more energy sources the response at any

element is equal to the algebraic sum of the responses caused by the individual sources.

While considering the effect of individual sources, the other ideal voltage sources and ideal

current sources in the network are replaced by short circuit and open circuits respectively, across the

terminals. This theorem is valid only for linear systems.

Reciprocity Theorem Statement

In any linear bilateral network containing the response at any branch (or) transformation ratio is same even after interchanging the sources.i.e. V/ I1 = V/ I2

Theoretical Calculations:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 29: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

29

Procedure:

Superposition Theorem:

1. The circuit is connected as shown in fig (1).

2. Both the voltages V1 and V2 applied and the current through load resistor is noted as IX.

3. Supply voltage V2 is replaced with short circuit and V1 is applied as shown in fig (2) and the current through load resistor is noted down as IY.

4. Supply voltage V1 is replaced with short circuit and V2 applied as shown in fig (3) and the current through load resistor is noted down as IZ.

5. It can be verified that IX = IY + IZ theoretically and practically which proves Superposition theorem.

Reciprocity Theorem:

1. The circuit is connected as shown in fig (1).

2. The ammeter reading is noted down as I1.

3. Now the source and ammeter are interchanged as in fig (2).

4. The ammeter reading is noted down as I2..

5. It can be veried that Vs/ I1 = Vs/ I2 theoretically and practically which proves Reciprocity theorem.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 30: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

30

+

_

Fig-1

VS1 +

− VS2

IX

+

_ A

Fig-2

VS1 +

IY

+

_ A

+

_

Fig-3

VS2

IZ

+

_ A

Fig-1

VS +

I1

+

_ A

Fig-2

VS +

I2

+

_A

Circuit Diagrams of Superposition Theorem:

Circuit Diagrams of Reciprocity Theorem:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 31: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

31

Observations:

Superposition Theorem

When both the sources are acting: fig (1) When V1 source alone is acting: fig (2)

When V2 source alone is acting: fig (3)

Reciprocity Theorem:

Before interchanging the sources: fig (1)

After interchanging the sources: fig (2)

VS1 VS2

Theoretical

IX

Practical

IX

VS1 VS2

Theoretical

IY

Practical

IY

VS1 VS2

Theoretical

IZ

Practical

IZ

Vs

Theoretical values Practical values

I1 Vs/ I1 I1 Vs/ I1

Vs

Theoretical values Practical values

I2 Vs/ I2 I2 Vs/ I2

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 32: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

32

Precautions:

1. Making loose connections are to be avoided.

2. Readings should be taken carefully without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 33: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

33

Expt. No.6

Maximum power transfer theorem

Aim: To verify maximum power transfer theorem on DC with Resistive load theoretically and practically.

Apparatus :

S.No Name of the equipment Range Type Quantity 1. Ammeter

2. Voltmeter

3. Rheostats

4. DC Power Supply 5. Multimeter Digital 6. Double Pole Double Throw Switch 6. Connecting wires as per need

Theory: Theorem Statement It states that the maximum power is transferred from the source to the load, when the load

resistance is equal to the source resistance.

Theoretical Calculations: Formulae required:

TheoreticalthL

thL RR

VI+

=

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 34: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

34

Fig-4

VS +

_

+ _A

IL

DMM RL

Fig-1

+

VS RL ⎯

Fig-2

DMM

Rth

Fig-3

+

VS ⎯

+

_ VthV

Circuit Diagrams:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 35: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

35

Fig-5

VS +

_

+ _A

IL

DMM RL

Model Graph:

RL RL corresponding to Pm

Pm

PL

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 36: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

36

Procedure:

1. Connections are made as shown in fig (1).

2. RL is varied in steps and the reading of ammeter IL is noted down in each step.

3. The circuit is connected as shown in fig (2) and the effective resistance Rth is measured with

the help of digital multimeter.

4. Power delivered to load PL is calculated in each step.

5. A graph is drawn between PL Vs RL and RL corresponding to maximum power is found from

it.

6. It can be verified that RL corresponding to maximum power from the graph is equal to the Rth

(which is nothing but source resistance RS) which proves the maximum power transfer theorem.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 37: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

37

Observations:

Tabular column:

S.No

RL

Theoretical values

Practical values

thL

thL RR

VI+

= PL= IL2RL

IL

PL= IL

2RL

Model Calculations:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 38: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

38

Precautions:

1. Making loose connections are to be avoided.

2. Readings should be taken carefully without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 39: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

39

Expt. No.7

Experimental verification of Thevenin’s & Norton’s theorems Aim: To verify Thevenin’s and Norton’s theorems theoretically and practically. Apparatus:

S.No Name of the equipment Range Type Quantity 1. Ammeter 2. Voltmeter

3. Rheostats

4. DC Power Supply 5. Digital Multimeter 6. Connecting wires as per need

Theory: Statement of Thevenin’s Theorem: Any two terminal linear bilateral network containing of energy sources and impedances can be

replaced with an equivalent circuit consisting of voltage source Vth in series with an impedance, Zth.,

where Vth is the open circuit voltage between the load terminals and Zth is the equivalent impedance

measured between the two terminals with all the energy sources replaced by their internal impedances.

Statement of Norton’s Theorem: Any two terminal linear bilateral network containing of energy sources and impedances can be

replaced with an equivalent circuit consisting of a Current source IN in parallel with an impedance, ZN.,

where IN is the short circuit current across the load terminals and ZN is the equivalent impedance

measured between the two terminals with all the energy sources replaced by their internal impedances.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 40: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

40

RL

Fig-1

+

_

IL

VS +

A

Fig-3

+

_ Vth

VS +

V

Fig-2

+

_

IN VS +

− A

Circuit Diagrams:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 41: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

41

Vth

Fig-5

+

Rth

RL

ILI

+

_ A

VS= 0

Fig-4

Rth DMM

IN

Fig-6

RN

RL

ILI

+

_ A

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 42: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

42

Procedure:

1. Connections are made as per the circuit shown in fig (1). 2. DC voltage is applied to the circuit and the current IL flowing through the load is noted down.

3. Circuit is connected as shown in fig (2). DC voltage is applied the reading of Ammeter is noted

down as IN. 4. Circuit is connected as shown in fig (3). DC voltage is applied the reading of Voltmeter is

noted down as Vth. 5. The circuit is connected as shown in fig (4) and the effective resistance Rth / RN is measured

with the help of a multimeter. 6. Thevenin’s equivalent circuit is connected as shown in fig (5) and the ammeter reading is noted

down as IL1

.

7. Thevenin’s theorem can be verified by checking that the currents IL and IL1 are equal.

8. Norton’s equivalent circuit is connected as shown in fig (6) and the ammeter reading is noted

down as IL1

.

9. Norton’s theorem can be verified by checking that the currents IL and IL1 are equal.

Theoretical Calculations:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 43: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

43

Observations:

Thevenin’s Theorem:

Norton’s Theorem:

Precautions:

1. Making loose connections are to be avoided.

2. Readings should be taken carefully without parallax error.

Result:

Vs

Theoretical values

Practical values

IL

Vth Rth

IL1

IL

Vth Rth

IL1

Vs

Theoretical values

Practical values

IL

IN RN

IL1

IL

IN RN

IL1

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 44: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

44

Expt No: 8

Magnetization Characteristics of DC Shunt Generator Aim: To conduct an experiment on a D.C Shunt Generator and draw the magnetization

characteristics (Open Circuit Characteristics or OCC) and to determine the Critical Field Resistance (RC) and Critical Speed (NC).

Apparatus: Name plate details:

Theory: Open circuit characteristics or magnetization curve is the graph between the generated emf (Eg) and field current (If) of a dc shunt generator. For field current is equal to zero there will be residual voltage of 10 to 12V because of the residual magnetism present in the machine .If this is absent then the machine can not build up voltage. To obtain residual magnetism the machine is separately excited by a dc source. We can get critical field resistance (RC) and critical speed (NC) from OCC.

Critical field resistance: It is the value of field rresistance above which the machine cannot build up emf. Critical speed: It is the speed below which the machine cannot build up emf.

S. No Apparatus Type Range Qty 1 Voltmeter M.C 0-500V 1

2 Ammeter M.C 0-2A 1

3 Rheostats Wire wound

400Ω/1.7A 1

4 Tachometer Digital - 1

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 45: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

45

DPST Switch

(0-300)V MC

(0-2)A MC

− F

FF

V

+400Ω/ 1.7A

AA

F

M

FF

230 V DC

Supply

+ DPST Switch

Fuse

3 point starter

FL A

A

Fuse

AA

G

A−

A

+

DC Exciter

+

Circuit diagram:

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 46: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

46

Procedure:

1. Connections are made as per the circuit diagram.

2. Motor is started with the help of Three Point starter and brought to its rated speed by varying

the field rheostat.

3. The Eg for If =0 is noted and the DPST switch on the DC Exciter side is closed.

4. The DC Exciter is varied in steps and the values of Field current (If) and corresponding

generated voltage (Eg) are noted down in each step, in both ascending and descending orders.

5. Average Eg is calculated from ascending and descending orders.

6. A graph is drawn between Eg & If. From the graph (OCC), Critical field resistance (RC) and

Critical (NC) speed are calculated.

Model Graph:

Q

A

C O

Eg (V)

If (A)

Rf

P

R

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 47: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

47

Tabular column:

S.No

Field current

If (A)

Generated Voltage (Eg)

Average Eg (V)

Ascending order

Descending order

Calculations:

From the graph:

Critical field Resistance, OCOAR C =

Critical Speed, ratedC NPRPQN ×=

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 48: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

48

Precautions:

1. Loose connections should be avoided.

2. Readings are taken without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 49: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

49

Expt No : 9

Swinburne’s test

Aim: To perform no load test on a DC shunt motor and to predetermine the efficiencies of the machine acting both as a motor and as a generator.

Equipment:

S.No Apparatus Type Range Qty 1 Voltmeter MC 0-250V 1 2 Ammeter MC 0-5A 1 3 Ammeter MC 0-2A 1 4 Rheostats Wire wound 400Ω/1.7A 1

Wire wound 100Ω/5A 1 Name plate details: Theory:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 50: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

50

(0-2)A MC

400Ω/ 1.7A

AA

M

230 V DC

Supply

+DPST Switch

Fuse

A

A

(0-250)V MC

V

+

+

Circuit diagram:

Circuit diagram to find out Ra:

(0-250)V MC

(0-5)A MC

(0-2)A MC

L

−−

+ 400Ω/ 1.7A

AA

F M

FF

230 V DC

Supply

+ DPST Switch

Fuse

3 point starter

FA

A

A

+

A

V

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 51: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

51

Procedure:

1. Connections as made as per the circuit diagram.

2. Field rheostat is kept in minimum position and the motor is started with the help of 3-Point starter,

and is brought to rated speed by adjusting field rheostat.

3. The readings of both ammeters and voltmeter are noted down.

4. The efficiencies of the machine both as a motor and as a generator are calculated.

5. Graphs are drawn between output Vs efficiency for the Machine acting as a generator and as a

motor.

Model Graph:

η (%)

Motor

Generator

O Output

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 52: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

52

No-Load Test Observation table:

IL0 If V N

Calculations:

From No-Load Test:

== L0VIinput Load-No

=−= fL0 IIcurrent Armature Load-No

== aR2a0IlossCu Armature Load-No

=−=−= a2

a0L0C RIVIlossCuArmatureload-No inputload-No Wloss,Constant

=∴ C W

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 53: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

53

Machine acting as Generator: V=230V, WC = , Ra= ,If = .

S.No

Voltage, V (Volts)

Load current, IL (A)

Output,

Lout VIP =

Current,Armature

fLa III +=

LossCuArmature

aR2aI

Loss,Total

a2

aCT RIWW +=

Input,

Toutin WPP +=

Efficiency (%),

100PPη

in

out ×=

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 54: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

54

Machine acting as Motor: : V=230V, WC = , Ra= ,If = .

S.No

Voltage, V (Volts)

Load current, IL (A)

Input,

Lin VIP =

Current,Armature

fLa III −=

LossCuArmature

aR2aI

Loss,Total

a2

aCT RIWW +=

Output,

Tinout WPP −=

Efficiency (%),

100PPη

in

out ×=

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 55: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

55

Model calculation:

To Predetermine the Efficiency as a Motor:

Let IL=

== LVIinputMotor

=+=+= a2

fLCa2

aC R)I-(IWRIWlossTotal

== loss Total-inputMotor OutputMotor

=×=∴ 100Input

Outputη,Efficiency

To Predetermine the Efficiency as a Generator:

Let IL=

== LVIOutput Generator

=++=+= a2

fLCa2

aC R)I(IWRIWlossTotal

=+= loss Totaloutput Generator Input Generator

=×=∴ 100Input

Outputη,Efficiency

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 56: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

56

Precautions:

1. Loose connections should be avoided.

2. Readings are taken without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 57: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

57

Expt No: 10

Brake test on a DC Shunt motor Aim: To conduct Brake test on a DC Shunt motor. And to draw its performance curves. Apparatus:

S. No Equipment Range Type Qty 1. Voltmeter 0-250V M.C. 1 2. Ammeter 0-20A M.C 1 3 Ammeter 0-1/2A M.C 1 4 Rheostat 400Ω/1.7A Wire wound 1 5. Tachometer Digital type 1 6. Connecting wires

Name plate details: Theory:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 58: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

58

Procedure:

1. Connections are made as shown in the circuit diagram.

2. Field rheostat is kept in minimum position and the motor is started with the help of 3-Point starter,

and is brought to rated speed by adjusting field rheostat.

3. By varying the load in steps, readings of ammeters, voltmeter, tachometer, spring balances, are

noted down.

4. Performance curves are to be drawn after completing the calculations.

Model graph:

N VS Torque

O

Ia VS N

Output VS η

Ia VS

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 59: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

59

(0-2)A MC

L

(0-250)V MC

V

+ 400Ω/ 1.7A

AA

F M

FF

230 V DC

Supply

+ DPST Switch

Fuse

3 Point Starter

FA

A

A

(0-20)A MC

S1 S2

A

+

Circuit diagram:

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 60: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

60

Calculations Table: r = .

S.No Voltage, V (Volts)

Line current, IL (A)

Speed, N (rpm)

Spring balance readings (Kgs)

S1 S2

Torque, T=9.81×( S1~ S2)×r

(N-m)

Output,

60NT2Pout

Π=

Input,

Lin VIP =

Efficiency (%),

100PPη

in

out ×=

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 61: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

61

Model calculation:

Precautions:

1. Loose connections should be avoided.

2. Readings are taken without parallax error.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 62: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

62

Expt No: 11

OC & SC tests on 1-φ transformer

Aim: To conduct OC & SC tests on the given 1-Φ Transformer and to calculate its equivalent circuit

parameters and predetermine its Efficiency & Regulation.

Name plate details:

1-φ TRANSFORMER

Capacity 3KVA

I/P voltage 115V

I/P current 26A

O/P voltage 230V

O/P current 13A

Frequency 50Hz

Apparatus required:

S.No Apparatus Range Type Qty

1 Voltmeters 0-150V, 0-75V M.I 1, 1 No

2 Ammeters 0-2A, 0-15A M.I 1, No

3 Wattmeter 2A, 150V, 60W, LPF

15A, 50V, 600W, UPF

Dynamo meter

1, 1 No

4 Auto T/F 230V/0-270V 1-φ wire wound 1 No

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 63: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

63

Output power

%Efficiency

Procedure:

OC Test:

1. Connections are done as per the circuit diagram.

2. Supply is switched on and rated voltage is applied to the LV side by varying the Auto

transformer.

3. The readings of Ammeter, Voltmeter & Wattmeter are noted down.

SC Test:

1. Connections are done as per the circuit diagram.

2. Supply is Switched on and rated current is set through the HV winding by varying

the Auto transformer.

3. The readings of Ammeter, Voltmeter & Wattmeter are noted down.

Model graphs:

Power factor

%Regulation

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 64: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

64

(0-2)A MI

230V115V

(0-150)V MI

1- Φ 230V 50 Hz AC

Supply

Ph

N 1 Φ -Transformer 3KVA, 230V/ 115V

Open Circuit

DPST

Variac 3KVA, 230V/ (0-270)V

2A, 150V, 60W, LPF

L M

C V

Fig -1

V

A

OC test circuit diagram

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 65: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

65

230V 115V (0-15)A MI

(0-50)V MI

1- Φ 230V 50 Hz AC

Supply

Ph

N1 Φ -Transformer 3KVA, 230V/ 115V

Short Circuit

DPST

Variac 3KVA, 230V/ (0-270)V

15A, 50V, 600W, UPF

L M

C

V

Fig -2

V

A

SC test circuit diagram

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 66: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

66

Observations:

O.C test: S.C test:

Calculations:

==00

00 IV

WCosφ

== 00 φCosIIW

== 00 φSinIIm

==WI

VR 00

==m

m IVX 0

Note: The Transformer is taken as

step up Transformer.

== 202sc

sc

IWR

==sc

sc

IVZ02

V0 I0 W0

VSC ISC WSC

=−= 202

20202 RZX

===1

2

1

2

EE

NNK

== 202

01 KXX ; == 2

0201 K

RR

scscoi

sci

WxCu loss, WWIron losssWd currentf Full loaFraction oWhere, x

WWCosθIxVCosθIxVEfficency

2

222

222 100

====

=

×++

=

pfLoadCosWherepfLeadforpfLagfor

VSinθXICosθRIgulation%

=−+

×+

=

2

2

20222022

,),(

100Re

θ

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 67: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

67

Calculations Table:

Predetermination of Efficiency:

I2= 13A ; V2= 230V ; R02= ; Wi= ; Let Cosθ2=0.8

Predetermination of Regulation:

I2= 13A ; V2= 230V ; R02= ; X02=

Load Cu losses

scCu WxW 2=

Total Losses

SCiT WWW +=

O/P power

222 θCosIxV=

I/P power

TWOutput +=

η (%)

100×=Input

Output

PP

x=0.1

¼Full load(x=0.25)

½ Full Load(x=0.5)

¾ Full Load(x=0.75)

Full Load(x=1)

Load pf % Regulation

lag lead

0.6

0.7

0.8

0.9

1

pfLoadCosθWherepfLeadforpfLagfor

VSinθXICosθRIgulation%

=−+

×+

=

,),(

100Re2

022022

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 68: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

68

Equivalent Circuit:

Considering the Step up transformer and Referred to LV side.

Model Calculations:

Ro Xo

Ro1Xo1

Ph

N

Ph

N

V1

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 69: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

69

Precautions:

1) The Dimmer stat should be kept at minimum O/P position initially.

2) In OC test, rated voltage should be applied to the Primary of the Transformer.

3) In SC test, the Dimmer stat should be varied up to the rated load current only.

4) The Dimmer stat should be varied slowly & uniformly.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 70: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

70

Expt No: 12

Load test on a 1-φ transformer

Aim: To conduct Load test on the given 1-Φ Transformer and to calculate its, Efficiency & Regulation.

Name plate details:

1-φ TRANSFORMER

Capacity 3KVA

I/P voltage 115V

I/P current 26A

O/P voltage 230V

O/P current 13A

Frequency 50Hz

Apparatus required:

S.No Apparatus Range Type Qty

1 Voltmeters 0-150V, 0-75V M.I 1, 1 No

2 Ammeters 0-2A, 0-15A M.I 1, No

3 Wattmeter 2A, 150V, 60W, LPF

15A, 50V, 600W, UPF

Dynamo meter

1, 1 No

4 Auto T/F 230V/0-270V 1-φ wire wound 1 No

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 71: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

71

Procedure:

1. Connections are made as per the circuit diagram.

2. By varying the Auto transformer, rated voltage is applied to the input side of the

transformer and should be maintained constant throughout the experiment.

3. By varying the load in steps, readings of ammeter, voltmeter, and wattmeter are noted down in

each step.

4. Efficiency and Regulations are calculated in each step and tabulated.

5. Graphs are drawn Output Vs Efficiency and

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 72: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

72

230V115V

(0-150)V MI

1- Φ 230V 50 Hz AC

Supply

Ph

N 1 Φ -Transformer 3KVA, 230V/ 115V

DPST

Variac 3KVA, 230V/ (0-270) V

20A, 150V, 60W, LPF

L M

C V

Fig -1

V

(0-15)A MI

A

(0-300)V MI

V

Circuit Diagram

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 73: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

73

Calculations table: Rated Secondary Voltage, V2=230V

S.No Secondary Voltage Ι

2V (V)

Secondary Current, I2(A)

Input Power (Watts)(wattmeter reading)

Output Power =V2хI2 (Watts)

100

,

×=Input

Output

PP

Efficiency

η 100

Re%

2

22 ×−

=V

VV

gulationI

ww

w.jntuw

orld.com

ww

w.jntuw

orld.com

ww

w.jw

jobs.net

Page 74: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

74

Model calculation: Precautions:

1. The Dimmer stat should be kept at minimum O/P position initially.

2. Rated voltage should be maintained on the Primary of the Transformer.

3. The Dimmer stat should be varied slowly & uniformly.

Result:

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net

Page 75: Padmasri Dr B V Raju Institute of Technologyfiles.harishpola.webnode.com/200000003-9f408a03ae/ElectricalEngineerig... · EEE Dept, BVRIT. Electrical Engineering Lab Expt No: 1 Verification

EEE Dept, BVRIT. Electrical Engineering Lab

75

Important Viva-voce questions:

1. What is the principle of operation of a DC Generator?

2. What are the main parts of a DC Generator and their functions?

3. What is the function of a DC Generator?

4. What are the different types of a DC Generator?

5. What is the principle of operation of a DC Motor?

6. What is the function of a DC Motor?

7. What are the different types of a DC Motor?

8. What is the purpose of a Three point starter?

9. What is the purpose of a fuse?

10. Why the field rheostat should be kept in minimum position?

11. What is the purpose of changing the voltage level in AC Transmission?

12. What is the principle of operation of a Transformer?

13. What is the function of a Transformer?

14. What are the different types of a Transformer?

15. What are the different parts of a Transformer?

16. What are the different types of measuring instruments?

17. What is meant by “Pre determination” with respect to electrical machines?

18. What is meant by efficiency and regulation?

19. Can we start the motor without using three point starter? If so, how?

20. What is the purpose of Auto transformer(or Dimmerstat)?

Note: In addition to the above, students are supposed to know the basic theory and things related for

the conduct of a particular experiment.

www.jntuworld.com

www.jntuworld.com

www.jwjobs.net