CAbstract

Click to edit Master title styleThe utilization of electroless Nickel/Gold as a low cost underbump metallization for flip-chip and wafer-level CSPapplication is meanwhile well established in the industry.

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pp yHowever, new technical requirements and challenges areproducing strong interest in the electroless metallizationprocess also in other, more performance driven technologyfieldsSecond level

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fields.

Especially electroless Palladium deposited in between the Niand Au layer provides new superior properties with regard to

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wire bond capabilities or, in the case of solder application,intermetallic growth behavior.

This paper is providing a technology roadmap by discussingThis paper is providing a technology roadmap by discussingan electroless Ni and electroless Pd process flow for both, Auwire bond and lead-free solder application.

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COutline

Click to edit Master title style• Overview on the use of Electroless Ni/Au for • Click to edit Master text styles• Second level

FC, WLCSP and wire bond applications• Electroless Ni/Au and Ni/Pd/Au interface for

A i b diSecond level• Third level

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Au wire bonding• Ni/Pd/Au as surface finish for Power

MOSFET li ti• Fourth level• Fifth level

MOSFET application• Ni/Pd/Au as Under Bump Metal for Flip-Chip

and WLCSPand WLCSP• Summary

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CAdvantages of electroless Ni/Au UBM

1) Low Capital Investment Cost

Click to edit Master title styleSputtering / ElectroPlating: > 10 Mio US$Electroless UBM: 1-2 Mio US$

2) High Throughput300.000 wafers per year minimal guaranteed throughput with PACLINE 300

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3) Maskless ProcessNo tooling required

4) Low UBM Process Cost compared to ElectroplatingLowest Cost Process (below 10 US$ in in high volume)Second level

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Lowest Cost Process (below 10 US$ in in high volume)

5) 300 mm compatibility no additional invest (PACLINE 300)

6) Proven Reliability

• Fourth level• Fifth level7) Compatibility with all FC-Assembly processes

SolderingACAConductive Adhesive

8) Suitable for Al and Cu pad metallization

9) Compatibility with Wire BondingRevolution: one pad metallization for wire bonding and Flip Chip

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CProcess Flow - Electroless Ni/Au Bumping

Click to edit Master title styleAl Pad Cu Pad

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Zinkating Pd Seed

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Ni Plating

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Flash Au Flash Au

Thick AuFlash Au

Pd Barrier

Thick AuFlash Au

FC & WLCSP Wire Bonding,FC & WLCSP Wire Bonding

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CB k id C ti

Electroless Ni/Pd/Au Bumping on Al Electroless Ni/Pd/Au Bumping on Al

Click to edit Master title styleBackside Coating

Aluminum Cleaning /

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Cu Cleaning

Zincate / Palladium Second level• Third level

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Pretreatment

Electroless Nickel• Fourth level• Fifth levelElectroless Palladium

Immersion Gold

Coating Removal

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g

CWire Bonding on Cu Pad MetallizationClick to edit Master title style

Challenges: Wire Bondability of Copper

g

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Other Solutions: Cu Wire Bonding => feasibility, reliability not proven

Al tt i C P d• Fourth level• Fifth level

Al sputtering on Cu Pad=> not very Cost effective

Best Solution: Wire Bondable Low Cost Interface=> electroless Ni/Au

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=> electroless Ni/Au

CAu Wire Bonding on Electroless Ni/Au Layer

S f T t tClick to edit Master title style• Surface Treatment– Ni/Au UBM– Needs Ar Plasma Cleaning/Activation– Lowest process cost

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Lowest process cost– Sufficient bond window– Wire bond process needs to be optimized for thin Au layer

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• Thick Au Finish– Ni/Au UBM– High chemistry cost– Longer processing time

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– Broad bond window– Good reliability

• Pd LayerPd Layer– Ni/Pd/Au UBM– Broad bond window– Excellent cost / reliability ratio

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CWire Bonding on Ni/Pd/Au Finish

Click to edit Master title style

• Click to edit Master text styles• Second levelSecond level• Third level

F th l lBond Parameter:• Fourth level• Fifth level

Bond Parameter:Wire Bonder: ASM AB339 Au wire diameter: 1milBall size: 2mil

US-Time:10 msUS-Power: ~ 100 mWBond Force: 15 - 20 cN

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CShear Test Results

• As Bonded • After Bake (30 min @ 175°C)

Click to edit Master title styleAs Bonded

– Mean = 29.6 g– Stdev = 5.29 g– Cpk (Spec 12.6 g) = 1.07

After Bake (30 min @ 175 C)– Mean =31.69 g– Stdev = 3.83 g– Cpk (Spec 12.6 g) = 1.66

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Shearmode• As Bonded

27 Ball Shear 2 Partial Ball Shear 1 Interface ShearSecond level• Third level

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– 27 Ball Shear, 2 Partial Ball Shear, 1 Interface Shear

shear height: 2 µm

• Fourth level• Fifth level• After Bake (30 min @175°C)

– 30 Ball Shear30 Ball Shear

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CWire Bond Optimization

Click to edit Master title style• Curing after wire bonding increases Au bond adhesion

due to Au-Au bond interface stress reduction,

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,e.g. 30min @ 170 degC

• Plasma treatment prior to wire bonding improves wire bond adhesion=> Removal of surface oxide and contaminationSecond level

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adhesion=> Removal of surface oxide and contamination,e.g. 5 min Argon

• Non-heat or low heat drying after UBM bumping improves • Fourth level• Fifth level

y g p g pAu-Au bond: => no surface Oxide migratione.g. Spin rinse dryer, IPA dryer, etc.

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CWire Bonding on Ni/Au for Power

MOSFET / Power Switch ApplicationClick to edit Master title styleChallenges: Wire bondability of Ni/Au on gate pad

after high temperature solder reflow

MOSFET / Power Switch Application

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after high temperature solder reflow

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F th l lOther Solutions: Bonding on Ni/Au

=> i d• Fourth level• Fifth level

=> narrow process windowAr plasma cleaning of Ni/Au

=> process flow/ timing, p g,availability of Ar plasma process

Best Solution: Wire bondable, T-resistend Interface=> electroless Ni/Pd/Au

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=> electroless Ni/Pd/Au

C Ni/Pd/Au MetallizationClick to edit Master title styleNi/Pd/Au Metallization

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PdAu

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Ni

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CEffect of Oxygen plasma clean on wire bondability of the top metal

Click to edit Master title styleNiPdAu NiPdAu NiAu NiAu

Ball shear readings

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Control Plasma cleaned Control Plasma cleaned

Samples 30 30 30 30

Sum of Tests 1835.9 2341.9 1112.5 1956.9Second level• Third level

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Min 37.8 72.4 30.8 51.2

Max 72.6 87.2 44.7 78.4

Range 34.8 14.8 13.8 27.2

Mean 61.19 78.06 37.08 65.23

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Std Dev 7.25 3.57 3.33 5.4

Mean-3 Std Dev 39.44 67.35 27.09 49.03

Pd thickness: 0.2µmAdditional surface preparation: anneal of 2.5 hours at 250 C and high Lead reflow.

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CClick to edit Master title styleNi/Pd/A l l

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Ni/Pd/Au+ plasma clean

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F th l lNi/Au

Ni/Pd/Au

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From Jedec specs EIA/JESD22-B116

CIntermetallic Generation of lead-free

solder bumps on electroless NiClick to edit Master title stylesolder bumps on electroless Ni

• Click to edit Master text styles• Second levelChallenges: Ni diffusion into solder bump and

formation of Ni-Sn intermetallicsSecond level

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• Fifth levelSolution: Pd as diffusion barrier=> electroless Ni/Pd/Au UBM=> electroless Ni/Pd/Au UBM

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CComparison of Ni/Au and Ni/Pd/Au UBM after 1x and

3x solder reflowClick to edit Master title style3x solder reflowReflow Ni/Au Ni/Pd/Au

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1 xSecond level

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• Fifth level3 x

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CConclusions

Click to edit Master title style• Ni/Pd/Au provides better Au wire bond window than

Ni/Au• Click to edit Master text styles• Second level

Ni/Au• Ar plasma treatment prior to wire bonding improves wire

bond adhesion of Ni/Au and Ni/Pd/Au Second level• Third level

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• Increase of Pd layer thickness may result in additional bond force improvement

• Pd layer after Ni reduces slightly the IMC growth of Sn• Fourth level• Fifth level

• Pd layer after Ni reduces slightly the IMC growth of Sn-Ni intermetallics. However, no significant difference after 3 reflows!

• Pd layer thickness optimization for IMC growth reduction necessary

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CAnnouncement and Call for Abstracts

Click to edit Master title styleInternational Conference and Exhibition on

Device Packagingwww imaps org/devicepackaging

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www.imaps.org/devicepackagingRadisson Fort McDowell Resort & Casino

Scottsdale, Arizona - USAMarch 17 - 20, 2008Second level

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Workshops on:Flip Chip Technologies &

Wafer Level Packaging / Embedded Packaging• Fourth level• Fifth level www.imaps.org/abstracts.htm

Abstract Deadline: November 30, 2007

Or email to Jackki Morris-Joyner at jmorris@imaps.org

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CClick to edit Master title style

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