P2 Components of ES - pelincec.isep.pw.edu.pl

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Gerhard P HanckeDepartment of Electrical, Electronic and Computer EngineeringUniversity of Pretoria

South Africa

Embedded System Design2

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1. An Overview of Embedded Systems

2. Components of Embedded Systems

3. Systems Engineering Overview


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� In its simplest form the embedded system consists of a microprocessor or central processing unit (CPU), memory, peripherals (I/O) to interface with its environment, and software and algorithms.

� Embedded systems are usually available in several forms.


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� A processor is a programmable digital system intended to solve computation problems in a large variety of applications.

� Copies of the same processor may solve computational problems in applications as diverse as communication, automotive, and industrial embedded systems.


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The CPU consists of� a datapath and a� control unit, tightly

linked with a� memory,

as illustrated in the figure.

Processor

Control unit

Datapath

ALU

Registers

IRPC

Controller

Memory

I/O

Control/Status


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� Load� Read memory

location into register

� ALU operation� Input certain

registers through ALU, store back in register

� Store� Write register to

memory location

Processor

Control unit

Datapath

ALU

Registers

IRPC

Controller

Memory

I/O

Control/Status

+1

10 11

10

11


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�� Control unit: configures

the datapath operations� Sequence of desired

operations (instructions) stored in memory (program)

� Instruction cycle –broken into several sub-operations, each one clock cycle, e.g.

Processor

Control unit

Datapath

ALU

Registers

IRPC

Controller

Memory

I/O

Control/Status

10 11

10

11

R0 R1

500

501

load R0, M[500]

inc R1, R0

store M[501], R1

100

101

102


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� Fetch: Get next instruction into IR

� Decode: Determine what the instruction means

� Fetch operands: Move data from memory to datapath register

� Execute: Move data through the ALU

� Store results: Write data from register to memory

Processor

Control unit

Datapath

ALU

Registers

IRPC

Controller

Memory

I/O

Control/Status

10 11

10

11

R0 R1

500

501

load R0, M[500]

inc R1, R0

store M[501], R1

100

101

102


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1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

Fetch-instr.

Decode

Fetch ops.

Execute

Store res.

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

Wash

Dry

Time

Non-pipelined Pipelined

Time

Time

Pipelined

pipelined instruction execution

non-pipelined dish cleaning pipelined dish cleaning

Instruction 1


� �� While registers serve a processor's short-term

storage requirements, memory serves the processor's medium- and long-term requirements.

� We can classify stored information as either program or data. � Program information consists of the sequence of

instructions that cause the processor to carry out the desired system functionality.

� Data information represents the values being input, output and transformed by the program.

� We can store program and data together or separately:


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Processor

Program memory

Data memory

Processor

Memory(program and data)

Harvard Princeton


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� Memory may be read-only memory (ROM) or readable and writable memory (RAM). ROM is usually much more compact than RAM. Anembedded system often uses ROM for program memory, since, unlike in desktop systems, an embedded system's program does not change. Constant data may be stored in ROM, but other data of course requires RAM.


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� To reduce the time needed to access (read or write) memory, a local copy of a portion of memory may be kept in a small but especially fast memory called cache. Cache memory often resides on-chip and often uses fast but expensive static RAM technology.


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Processor

Memory

Cache

Fast/expensive technology, usually on the same chip

Slower/cheaper technology, usually on a different chip

Principle: If at a particular time a processor accesses a particular memory location, then the processor will likely access that location and immediate neighbors of the location in the near future.


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� An EPROM consists of an array of transistors that can be programmed. The EPROM can be erased using ultraviolet light and then reprogrammed (quartz window in the top)

� One special case of EPROMs is OTP (one-time programmable) PROMs (no window)


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� Another type of memory is flash memory. Flash memory is similar to the EPROM in that a transistor array is programmed. However, flash memory can be erased electrically, which means it can be reprogrammed without taking it out of the microprocessor circuit.


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� The last type of memory is ROM. This is memory programmed by the IC manufacturer using a mask.


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� The first and most common is static RAM (SRAM). The memory cells do not change unless they are rewritten or the power is removed. Special case is nonvolatile RAM (NVRAM).

� The other type of RAM is dynamic RAM (DRAM). It stores information as charge on a tiny capacitor, one per data bit. Because the capacitor charge bleeds off, the data must be refreshed periodically.


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� The entire point of an embedded microprocessor is to monitor or control some real-world event. To do this, the microprocessor must have I/0 capability.

� The I/0 from an embedded control system falls into two broad categories: digital and analog. However, at the microprocessor level, all I/0 is digital.


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� A microprocessor is specified to drive a particular DC loading (sourcing or sinking current) and a particular capacitance loading. Bus loading problems can cause setup and hold-time problems because they change processor timing.


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� It is important to check if an I/0 port or pin expects an external pull-up resistor. Some devices incorporate it internally and therefore do not need it. If it is needed and not supplied, it can cause incorrect data on reading the port and prevent the port from turning off an external device.


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� A microprocessor must read and process data from a peripheral whenever it has new data; such processing is called servicing.� Repeated checking by the microprocessor for

data is called polling. � Most microprocessors come with a feature

called external interrupt (ISR)


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� DMA controller’s sole purpose is to transfer data between memories and peripherals. Briefly, the peripheral requests servicing from the DMA controller, which then requests control of the system bus from the microprocessor. The microprocessor relinquishes control of the bus to the DMA controller. The microprocessor does not need to jump to an ISR, and thus the overhead of storing and restoring the microprocessor state is eliminated.


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peripherals might request service from a single resource.� Multiple peripherals might share a single

microprocessor that services their interrupt requests.

� Multiple peripherals might share a single DMA controller that services their DMA requests.

� We therefore must have some method to arbitrate among these contending requests.


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� One arbitration method uses a single-purpose processor, called a priority arbiter. � Fixed priority� Rotating priority (round-robin)

� The daisy-chain arbitration method builds arbitration right into the peripherals.


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� A microprocessor-based embedded system will have numerous types of communications that must take place, varying in their frequencies and speed requirements. The most frequent and high-speed communications will likely be between the microprocessor and its memories.

� Less frequent communications, requiring less speed, will be between the microprocessor and its peripherals, like a UART.


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� Solution: two levels of buses: � The processor local bus typically connects the

microprocessor, cache, memory controllers, and certain high-speed coprocessors, and is processor specific.

� The peripheral bus connects those processors that do not have fast processor local bus access as a top priority, but rather emphasize portability, low power, or low gate count. The peripheral bus is typically an industry standard bus, such as ISA or PCI, thus supporting portability of the peripherals.


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increments at some clock rate. The processor can read the count, and the timer may generate an interrupt or pulse an output pin when the count rolls over to zero.

� Typical uses are to generate a delay, usually for scheduling some real-time event, controlling motors (DC PWM or stepper), and generating a regular timekeeping interrupt.


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"��)��'�� There is a special category of timer known as

a real-time clock whose function is to provide the current time and date as opposed to a counter value.

� These devices are normally driven of a crystal and are battery backed-up to maintain the data and time.

� These devices can also provide a system tick signal for use by the operating system.


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� One common use of a watchdog timer is to enable an embedded system to restart itself in case of a failure.

� Another common use is to support time outs in a program while keeping the program structure simple.


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� These provide standard interfaces, such as SCSI, IEEE-488, asynchronous serial I/O, Ethernet, or "Firewire." Many of these parts handle more than one interface. Some UARTs (universal asynchronous receiver/transmitters), for example, can handle multiple serial protocols, relieving the processor from the burden of handling each received byte.


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� A universal asynchronous receiver/transmitter (UART) receives serial data and stores it as parallel data, usually one byte. It also takes parallel data and transmits it as serial data. Such serial communication is beneficial when we need to communicate bytes of data between devices that are separated by long distances, or when those devices simply have few available I/O pins.


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� Pulse Width Modulators (PWM)


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� Stepper Motor Controllers


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� LCD Controllers

� Keypad Controllers� A/D & D/A Converters


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� Serial� Parallel� Wireless


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� I2C� Inter-IC developed by Philips

� CAN� Controller Area Network

� Firewire� High-performance developed by Apple.

� USB� Universal Serial Bus


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� PCI Bus� Peripheral Component Interconnect originated at

Intel� Replaced ISA/EISA

� ARM Bus� Designed to interface with ARM processors


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� IrDA� Infrared Data Association

� Bluetooth� Low-cost low range (10/100 m)

� Initially for PANs

� IEEE 802.11� IEEE standard for wireless LANs


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� They are functionally the same except that the single-chip design has everything inside the chip and the multichip design has everything except the processor itself outside.

� Compared to a single-chip design, a multichipdesign costs more, takes more PC board real estate, and is more complicated. The benefits are more flexibility, more expandability, and (usually) more processing power.


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� The design of multiprocessor systems allows computing power to be distributed among different processors for redundancy, speed, modularity, or to simplify coding.

� e.g. a system may have to simultaneously handle high-speed events that require little processing but need extremely fast response and message-level interrupts that occur less often but require extensive processing.


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Decision usually based on three considerations:

� Interdependence or modularity of the software.

� Processor throughput.

� Physical location.


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� Most embedded systems end up in products that require certification to EMC standards.

� In the United States, the Federal Communications Commission (FCC) has limits on how much RF energy a product can emit.

� The European Community also has standards for EMC compatibility, and they include susceptibility to external RF fields and to electrostatic discharge (ESD).


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� Controlling RF emissions� Guidelines are available

� ESD protection� Shielding, filters, grounding, interfaces, watchdog

timer, optical isolation.

� Other EMI considerations� Ground loops

� Differential interfaces� Radiated susceptibility


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� A real-time operating system (RTOS) is a program that schedules execution in a timely manner, manages system resources, and provides a consistent foundation for developing application code.

� Application code designed on an RTOS can be quite diverse, ranging from a simple application for a digital stopwatch to a much more complex application for aircraft navigation.

� Good RTOSes, therefore, are scalable in order to meet different sets of requirements for different applications.


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� A real-time operating system (RTOS) is a program that schedules execution in a timely manner, manages system resources, and provides a consistent foundation for developing application code.

� Application code designed on an RTOS can be quite diverse, ranging from a simple application for a digital stopwatch to a much more complex application for aircraft navigation.

� Good RTOSes, therefore, are scalable in order to meet different sets of requirements for different applications.


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� some level of multitasking,� software and hardware resource

management,� provision of underlying as services to

applications, and

� abstracting the hardware from the software application.


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� better reliability in embedded application contexts,

� the ability to scale up or down to meet application needs,

� faster performance,� reduced memory requirements,� scheduling policies tailored for real-time embedded

systems,� support for diskless embedded systems by allowing

executables to boot and run from ROM or RAM, and� better portability to different hardware platforms.


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An indication of the kind of things an RTOS supports:

� Define Task. This defines a task to be executed. The typical parameters passed to the RTOS might include the task number, priority, and the task entry address.

� Activate Task. Requests activation of a task. The parameters passed to RTOS would include the task number.

� Deactivate Task. Deactivates a task. The parameters would include the task number.

� Yield. Tells the RTOS that the task is finished for now and that the next task on the list may be executed.


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� Define Time-Slice. Defines the number of time-slice intervals that the task will be allowed to execute.

� Allocate Memory. Requests a specified number of memory blocks.

� Mailbox In. Receives a mailbox message. The parameters would include the task number and the mailbox number.

� Send Mail. Sends mail to a mailbox. The parameters could include the mailbox number, destination task number, and priority of the message.

� Wait On. Waits for the queue to fill, the semaphore to be active, or the mailbox to receive mail.


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� Programmer doesn’t need detailed understanding of architecture� Instead, needs to know what instructions can be

executed

� Two levels of instructions:� Assembly level

� Structured languages (C, C++, Java, etc.)


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� Most development today done using structured languages� But, some assembly level programming may still

be necessary� Drivers: portion of program that communicates

with and/or controls (drives) another device� Often have detailed timing considerations, extensive bit

manipulation� Assembly level may be best for these


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� Safety � make it safe

� limits

� Hardware damage� Mechanical delays� Recovery time of peripheral IC’s� Computational delays

� Interrupt protection


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� Repeatability, Reproducability, and StabilityThe analog components in a control system are affected by aging, temperature and manufacturing tolerance effects. Alternatively, digital systems are inherently repeatable. If two processors are loaded with the same program and data they will compute identical results. They are also more stable than analog implementations in the presence of aging.


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� Programmability allows advanced features to be easily included in computer implementations that would be very complex in analog implementations. Examples of such advanced features include: control mode and gain switching, on-line performance evaluation, data storage, performance parameter estimation, and adaptive behavior. In addition to being programmable, computer-based control systems are easily reprogrammable. Therefore, it is straightforward to periodically upgrade and enhance the system characteristics.

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P2 Components of ES - pelincec.isep.pw.edu.pl