Operating Systems - Memory management · operating system). Variable partition method: Operating system keeps table of available and occupied segments. New processes are put into

Operating SystemsMemory management

Stephan Sigg

Distributed and Ubiquitous SystemsTechnische Universitat Braunschweig

February 4, 2011

Stephan Sigg Operating Systems 1/69

Overview and Structure

Introduction to operating systemsHistoryArchitectures

ProcessesProcesses, Threads, IPC, SchedulingSynchronisationDeadlocks

Memory managementPagingSegmentation

Filesystems

Security and Protection

Distributed systems

Cryptography


OutlineMemory management

1 Memory managementBackgroundSwappingContiguous memory allocationPagingStructure of the page treeSegmentationSummary


Memory managementIntroduction

We have seen that the CPU can be shared by processes

To enable this, several processes have to be kept in memory

We have to share memory

Memory management strategies are required





Memory managementBackground

Memory is central to the operation ofa modern computer system

Memory consists of a large array ofwords or bytes

Each with its own address CPU scheduler

Job

sche

dule

r



CPU fetches instructions from memoryaccording to value of program counter

Memory unit sees only a stream ofmemory addresses

It does not know how they aregenerated or what they are for

CPU scheduler



Datapath of a simple ’DLX’-datapath1

1Hennessey and Patterson, Computer Architecture, a quantitativeapproach, Morgan Kaufmann, 2002



Pipelining of the DLX datapath2

2Hennessey and Patterson, Computer Architecture, a quantitativeapproach, Morgan Kaufmann, 2002



Basic hardware

ABCDEF

Main memory and CPU registers are accessed directly by theCPU

Machine instructions, however, do not contain disk addresses

Data must be moved into registers or memory before theCPU can operate on it



Basic hardware

ABCDEF

CPU registers are generally accessible within one CPU clockcycle

Main memory is accessed via a transaction on the memory bus

Memory access may take many CPU cycles



Basic hardware

ABCDEF

At memory access, the CPU would then usually be forced tostall

This situation is unacceptable

One solution can be to introduce fast memory between CPUand main memory (e.g. a cache)



Basic hardware

User processes and OS-processes haveto be protected against each other

Else, user process might overwritememory, cache or register contents ofanother process

This protection must be provided byhardware

Each process is allocated a separatememory space

Base register holds the smallest legalphysical memory address

Limit register specifies the range

Operating system

Process A

Process B

Process C

Memory0

256000

300040

1024000

420940

880000

limit

base



Basic hardware

Base register and limit register foreach process is stored in registers

Memory access of processes iscontrolled by CPU hardware

An attempt to to access otherprocesses memory results in a fatalerror

Access to the values of base and limitregisters is possible only in kernelmode

Therefore, only the operating systemcan modify the registers

Operating system

Process A

Process B

Process C

Memory0

256000

300040

1024000

420940

880000

limit

base



Address binding

Programs usually reside on disk as binary executable files

For execution, programs are brought into memory and placedwithin a process

The process might be moved between memory and diskduring execution

Processes on disk that wait for execution are placed into theinput queue

When a process is finished, its allocated memory space isdeclared available



Address binding

Processes can reside at arbitrary places in the physicalmemory

The addresses used by such a process might be symbolic orabsolute

Symbolic: E.g.: 14 bytes from the beginning of this module

Linkage editor will bind these addresses to absolute addresses(e.g. 74006)



Logical versus physical address space

Addresses generated by the CPU aretypically logical addresses

A hardware device (thememory-management unit) maps virtual tophysical addresses

One possible approach is a relocation registerthat adds a value to the logical address

User programs operate on logical addresses

relocation register

logicaladdress

MMU

physicaladdress

34

6

14000

14346

+



Dynamic loading

With increasing program size, it may become infeasible toload the whole program into memory

With dynamic loading, a routine is not loaded until it is called

All routines are kept on disk in a relocatable load format

The operating system may help the programmer to supportdynamic loading by providing library routines





Memory managementSwapping

Processes must resign in memory to beexecuted

A CPU-scheduling algorithm maytemporarily remove processes from memoryand store them to the ready queue on disk

Normally, processes are swapped back intothe same memory space they occupiedpreviously

This restriction is dictated by addressbinding

Operating system

User space

Memory

P1 2P

swapin

swapout



The context switch time is considerably high:

Example

Assume a user process of 100 MB

Assume a transfer rate of 50 MB from diskto memory

The actual transfer time is then

100MB

50 MBsecond

= 2seconds

With an average latency of 8 ms the swaptime is 2008 ms

The total swap time (in/out) is then 4016ms

Operating system

User space

Memory

P1 2P

swapin

swapout



Other factors that impact swapping:Pending I/O

A process waiting for I/O operationcannot be swappedOtherwise, the I/O operation might thenattempt to use the memory that nowbelongs to a different process

Swapping time of standard swapping isconsiderably high

Therefore, many actual operating systemsutilise modified versionsIn many UNIX versions, swapping is onlyutilised when a considerable number ofprocesses is active and else disabled

Operating system

User space

Memory

P1 2P

swapin

swapout





Memory managementContiguous memory allocation

The main memory is typically divided intoregions for the operating system and for userprocesses

User processes are dynamically allocated

relocation register

logicaladdress

MMU

physicaladdress

346

14000

14346

+

<Yes

no

346



Memory allocation

Memory allocation strategies:

Multiple partition method :

Divide memory into fixed-size partitions thatare allocated to processes (e.g. in OS/360operating system).

Variable partition method :

Operating system keeps table of available andoccupied segments.New processes are put into an input queue. OStakes expected memory requirements intoaccount (e.g. in batch systems)Scheduling algorithm can order the input queueMemory allocated to processes until the firstprocess requires more memory than available.



Memory allocation

The variable partition method is an instance of the dynamicstorage allocation problem

A request of size n is to be satisfied from a list of free holes

Example solutions to solve this problem

First fit :

Allocate first hole big enoughMinimises search time

Best fit :

Allocate smallest hole that is big enoughProduces the smallest possible ’leftover-hole’

Worst fit :

Allocate largest holeProduces the largest possible ’leftover-hole’



Memory allocation

Performance measures

In simulations, first fit and best fit outperform worst fit instorage utilisationFirst fit and best fit utilise storage equally goodFirst fit is generally fasterWorst fit is less seriously affected by fragmentation

0-7 8-15 16-23 24-31 32-39 40-47 48-55 56-63

1 A A A2 A A A B B3 B B4 C B B5 C D D B B6 C D D B B A A A



Fragmentation

First fit and best fit strategies suffer from externalfragmentation

External fragmentation: The data item is smaller than theallocated memory region

Free memory space is broken into small pieces

50-percent rule:Statistical analysis of first fit revealed, thatfrom N allocated blocks another 0.5N blocks are lost tofragmentation.



Fragmentation

When memory holes are arbitrary, the cost to keep track ofmany arbitrary sized holes might be undesirable

Therefore, standard block sizes are used

Processes are allocated memory segments that are slightlylarger than the required memory

This difference is called internal fragmentation



Fragmentation

A solution to external fragmentation is compaction

Place all memory contents next to each other to avoidmemory holes

Compaction is only possible, if relocation of processes isdynamic (and not static)

Another solution is to permit the allocated memory space tobe noncontiguous





Memory managementPaging

Paging is a memory-management scheme that allows fornoncontiguous physical address spaces

Paging avoids external fragmentation

Paging is used in most operating systems

Traditionally, paging was supported by hardware

In recent designs, paging is implemented by integrating thehardware and operating system

page table

logicaladdress

physicaladdress

f

p

dp df

f0000 . . . 0000

f1111 . . . 1111

f



Basic method

Physical memory is separated intofixed-sized blocks (frames)

Logical memory is separated intoblocks of the same size (pages)

When a process is executed, its pagesare loaded into any available memoryframes

Every address generated by the CPU isdivided into

page number (p)page offset (d)

page 0

page 1

page 2

page 3

Logical memory

1

4

3

7

page table

0

1

2

3

page 0

page 2

Physical memory

page 1

page 3

Fram

e nu

mbe

r

0

1

2

3

4

5

6

7



Basic method

Logical address separated into page number and page offset

Logical address space: 2m

Page size: 2n

Page number: 2m−n

Page number Page offset

dp

m-n n



Basic method

With paging, no external fragmentation occurs

Any free frame can be allocated to a process

Internal fragmentation may occur

With smaller page sizes, the wasted space is potentiallyminimised

However, the overhead to maintain each page-table entry alsoincreases with smaller page sizes


dp

m-n n



Basic method

Over time, page sizes have grown with memory sizes

Today, 4KB or 8KB page size are typical


dp

m-n n



Basic method

When a process arrives at the system, its size in pages isestimated

If sufficient frames are available in memory, they are allocated

Processes are separated:

A process has no way of accessing memory outside of its ownpage tableA page table includes only those pages the process owns


dp

m-n n



Basic method

The operating system is always awareof the allocation of physical memory

A frame table indicates for eachphysical page frame whether it isallocated and to which page of whichprocess.

15

free-frame list:

14

13

18

20

process page table

0

1

2

3

page 1

page 0

Physical memory

page 3

13

14

15

16

17

18

19

20

page 2



Hardware support

Most operating systems allocate a page table for each process

A pointer to the table is stored in the PCB

Hardware implementation in several ways possible

Dedicated registersStored in main memoryTransaction look-aside buffer (TLB)



Hardware support – Dedicated registers

A page table can be implemented as aset of dedicated registers

High-speed logic to make thepaging-address translation efficient

Every memory access must gothrough the paging map

Example: DEC PDP-11

16 bit addressespage size 8KB



Hardware support – Main memory

use of registers for the page table feasible only for small pagetables (e.g. 256 entries )

Modern computers allow larger page tables (e.g. 1 millionentries)

Page table is then kept in main memory

page-table base register (PTBR)points to page table

Short context switch time

Changing page table by changing this register only

Long delay to access memory

Two memory accesses for each informationspeed reduction by factor 2



Hardware support – TLB

Standard solution to speedup access to page table:

Translation look-aside buffer (TLB)High-speed memoryEach entry consists of key and valueComparison of keys is possible simultaneouslyFast access

Expensive hardware



Hardware support – TLB

Translation look-aside buffer stores some entries of the pagetable

Entry is first searched in the TLB

If successful, the frame number is available immediately

Hit ratio : percentage of times that a particular page numberis found



Example

20 ns to search TLB

100 ns for memory access

hit ratio: 80 %

effective access time = 0.8 · 120ns + 0.2 · 220ns = 140ns

hit ratio: 98 %

effective access time = 0.98 · 120ns + 0.02 · 220ns = 122ns



Paging with TLB

f

page table

p

Physical memorylogical address

dpphysical address

dp

page number frame numberTLB

TLB hit

TLB miss



Protection

Memory protection might benecessary when not the wholelogical address space is used bya process

Valid-invalid bits are utilised toindicate invalid frame numbersin the page table

page 0

page 1

page 2

page 3

Logical memory

2

3

4

7

page table0

1

2

3

page 0

page 1

Physical memory

page 2

page 3Fram

e nu

mbe

r

0

1

2

3

4

5

6

7v

v

v

v8

9

4

5

v

v

0

0

6

6

I

I

8

9

page n

. . .

page 5

page 4

page 4

page 5



Shared pages

Due to paging, common code can be shared

Reentrant code : non-self-modifying codeTwo or more processes can access the same codesimultaneously

Sharing of processes reduces the memory required in a systemwith multiple processes and users



Shared pages

editor 1.1

editor 1.2

editor 1.3

data P1

Logical memory

3

4

6

1

page table

0

1

2

3

data P1

data P3

Physical memory

editor 1.1

editor 1.2

Frame

numb

er

0

1

2

3

4

5

6

7

Process P1

Process P1

editor 1.1

editor 1.2

editor 1.3

data P2

Logical memory

3

4

6

7

page table

0

1

2

3

Process P2

Process P2

editor 1.1

editor 1.2

editor 1.3

data P3

Logical memory

3

4

6

2

page table

0

1

2

3

Process P3

Process P3

8

9

10

11

editor 1.3

data P2





Memory managementStructure of the page tree

The page table can be structured in various ways:

Hierarchical PagingHashed page tablesInverted page tables



Hierarchical paging

Modern computer systems have large logical address spaces(e.g. 232, 264)

The page table then becomes excessively large

With a 4KB (212) page size, the page table may contain232

212 = 220 entriesWhen each entry consists of 4 bytes, a single entry mayrequire 4MB of physical space

A solution is to split the page table into several sub-pagetables

These have smaller addresses and are loaded only whenrequired



Hierarchical paging

Logical address dividedinto

Page number outerpage tablePage number pagetablePage offset

page table

Physical memory

Outer

page tables

. . .

. . .. . .

. . .. . .

. . .. . .

. . .



Hierarchical paging

With greater address space,more hierarchy stages possible

Example: the 64-bitUltraSPARC requires 7 levels ofpaging

With additional stages thenumber of memory accessesincreases

Therefore, hierarchical pagetables are then generallyconsidered inappropriate

page table

Physical memory

Outer

page tables

. . .

. . .. . .

. . .. . .

. . .. . .

. . .



Hashed page tables

A common approach to handle large address spaces:

Use hashed page tableHash values are the virtual page numbersEach entry contains linked list of elements that hash to thesame location

to handle collisions


dpphysical address

dr

Hash table

Hash function

q s rp . . .



Hashed page tables

Three entries in the linked lists of elements of the hashedpage table:

1 Virtual page number2 Value of the mapped page frame3 Pointer to the next element in the list


dpphysical address

dr

Hash table

Hash function

q s rp . . .



Hashed page tables


dpphysical address

dr

Hash table

Hash function

q s rp . . .



Hashed page tables

Algorithm:1 Virtual page number in the virtual address is hashed into the

hash table2 Virtual page number is compared with field 1 in the first

element of the linked list3 If match: corrresponding page frame is used to form desired

physical address4 Else: Continue with subsequent entries in the list

Variation: Cluster fixed number of pages (e.g. 16) together inthe same manner

Method useful for sparse address spaces



Inverted page tables

Normally, each process owns its own page table

Since these page tables may become very large, large amountsof physical memory may be allocated only to page tables

A possible solution is an inverted page table

One entry for each real page (frame) of memoryEach entry consists of virtual address of the page andinformation about the process that owns the pageOnly one page table then exists in the system





dpphysical address

di

page table

pids

ea

rch

pid p

i




Issues with inverted page tables

Shared memory is more complicated to implementSince there is only one virtual page entry, one physical pagecannot have several virtual addressesTo allow shared memory, more advanced paging strategies arerequired


dpphysical address

di

page table

pid

sear

ch

pid p

i





Memory managementSegmentation

Due to paging, the user’s view of memory might differ fromthe actual physical memory

Logical memory and physical memory differ

Segmentation is a memory-management scheme thatsupports this user view of memory



Basic method

A logical address space is a collection of segments

Each segment has a name and a length

The addresses specify the segment name and offset within thesegment

Segments are numbered and referred to by a segment number

Logical address:

< segment − number , offset >



Basic method

Normally, a compiler automatically constructs segmentsreflecting the input program, e.g.

CodeGlobal variablesHeap for memory allocationStacks used by each threadStandard C library

The loader takes these segments and assigns them segmentnumbers



Hardware

Two dimensional logical addresses have to be mapped toone-dimensional physical addresses

This is done by a segment table

base : Start of the entrylimit : segment length


dssegment table

limit base

s

< +yes

no

trap:addressing error



Hardware

Physical memory

limit base

subroutine

stacksymboltable

mainprogram

sqrt

segment 1

segment 2

segment 3segment 4

segment 0

segment 1

segment 2

segment 3

segment 0

segment 4

1400

2400

3200

4300

4700

5700

6300

6700

1000

400

1100

1000

1400

6300

4300

3200

4700

0

1

2

3

4

400

segment table


Memory managementSummary

Swapping

Contiguous memory allocation

Paging

Structure of the page tree

Segmentation


Memory managementQuestions, discussion, remarks

Questions?


LiteratureRecommended literature

A. Tanenbaum, Moderne Betriebssysteme, 2nd edition,Prentice Hall, 2009.

A. Tanenbaum, Modern operating systems, 3rd edition,Prentice Hall, 2008.

A. Silberschatz et al. Operating system concepts, Wiley, 2004.

W. Stallings, Operating systems, 6th edition, Prentice Hall,2008.


Documents

Operating Systems - Memory management · operating system). Variable partition method: Operating system keeps table of available and occupied segments. New processes are put into