Operating Systems: Memory management · Operating Systems, Fall 2008 8.9.2008 Lecture 3 2 Memory management Programs use logical addresses of their own address space (0..MAX) OS kernel

Operating Systems, Fall 2008 8.9.2008

Lecture 3 1

Operating Systems:Operating Systems:Memory managementMemory management

Fall 2008Fall 2008

Tiina NiklanderTiina Niklander

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Memory ManagementMemory ManagementProgrammer wants memory to beProgrammer wants memory to be

Indefinitely largeIndefinitely largeIndefinitely fastIndefinitely fastNon volatileNon volatile

Memory hierarchyMemory hierarchysmall amount of fast, expensive memorysmall amount of fast, expensive memory –– cachecachesome mediumsome medium--speed, medium price main memoryspeed, medium price main memorygigabytes of slow, cheap disk storagegigabytes of slow, cheap disk storage

Memory manager handles the memory hierarchyMemory manager handles the memory hierarchyRequirements for memory managementRequirements for memory management

Logical and physical organizationLogical and physical organizationProtection and sharingProtection and sharing

Magnetic tape

Magnetic disk

Main memory

Cache

Registers


Lecture 3 2

Memory managementMemory management

Programs use logical addresses of their own addressPrograms use logical addresses of their own addressspace (0..MAX)space (0..MAX)OS kernel usually in a fixed location using physicalOS kernel usually in a fixed location using physicalmemory addresses directlymemory addresses directlyRest of the physical memory for user processes andRest of the physical memory for user processes andother OS partsother OS partsOS task: memory allocation and process relocationOS task: memory allocation and process relocationHardware task: address translation (to protect memory)Hardware task: address translation (to protect memory)

MMUMMU –– memory management unitmemory management unit

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Basic Memory Management: One programBasic Memory Management: One programMonoprogrammingMonoprogramming without Swapping or Pagingwithout Swapping or Paging

NoNo memory abstraction, no address space,memory abstraction, no address space,just anjust an operating system with one user processoperating system with one user process


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Multiprogramming with Fixed PartitionsMultiprogramming with Fixed Partitions

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OS places one process in one partitionOS places one process in one partitionInternal fragmentation (whole partition allocated to aInternal fragmentation (whole partition allocated to asmaller process)smaller process)

Fixed partitionsFixed partitions

Process queue for partition on diskProcess queue for partition on diskIn shared queue for all partitions orIn shared queue for all partitions orIn multiple queues for different sizes,In multiple queues for different sizes,

No free partition, OS can swapNo free partition, OS can swapMove one process to diskMove one process to diskPCB always in memoryPCB always in memory

Program too large for any partition; programmer has toProgram too large for any partition; programmer has todesign solutiondesign solution

Overlaying: keep just part of the program in memoryOverlaying: keep just part of the program in memoryWrite the program to control the part swapping betweenWrite the program to control the part swapping betweenmemory and diskmemory and disk

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Relocation and ProtectionRelocation and Protection

Cannot be sure whereCannot be sure whereprogram will be loaded inprogram will be loaded inmemorymemory

address locations of variables,address locations of variables,code routines cannot becode routines cannot beabsoluteabsolutemust keep a program out ofmust keep a program out ofother processes’other processes’ partitionspartitions

UseUse base and limitbase and limit valuesvaluesaddress locations added to baseaddress locations added to basevalue to map to physicalvalue to map to physical addraddraddress locations larger thanaddress locations larger thanlimit value is anlimit value is an errorerror

Address translation by MMUAddress translation by MMU7

SharingSharing

Access to shared code / dataAccess to shared code / dataNo violation of the protections!No violation of the protections!

Shared codeShared codemust be reentrant, not to change during executionmust be reentrant, not to change during executionJust one copy of the shared code (e.g. library)Just one copy of the shared code (e.g. library)

Shared dataShared dataProcesses coProcesses co--operate and share data structuresoperate and share data structuresE.g. shared buffer of producer and consumerE.g. shared buffer of producer and consumer

Solution:Solution: system calls between processes, threadssystem calls between processes, threadswithin a process (in virtual memory alt. solution)within a process (in virtual memory alt. solution) 8


Lecture 3 5

Swapping (1)Swapping (1)

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Memory allocation changes asMemory allocation changes asprocesses come into memoryprocesses come into memoryleave memoryleave memory

Shaded regions are unused memoryShaded regions are unused memory

Swapping (2)Swapping (2)

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(a) Allocating space for growing data segment(a) Allocating space for growing data segment(b) Allocating space for growing stack & data segment(b) Allocating space for growing stack & data segment


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Dynamic partitionsDynamic partitions

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No fixed predetermined partition sizesNo fixed predetermined partition sizesExternal fragmentsExternal fragments: 6M + 6M + 4M = 14M: 6M + 6M + 4M = 14MOS must occasionally reorganize the memoryOS must occasionally reorganize the memory (compaction)(compaction)

Memory Management: bookkeepingMemory Management: bookkeepingallocations and free areasallocations and free areas

Part of memory with 5 processes, 3 holesPart of memory with 5 processes, 3 holestick marks show allocation unitstick marks show allocation unitsshaded regions are freeshaded regions are free

(b) Corresponding bit map(b) Corresponding bit map(c) Same information as a list(c) Same information as a list

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Lecture 3 7

Combining freed areasCombining freed areas

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Four neighbor combinations for the terminating process XFour neighbor combinations for the terminating process X

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AllocationAllocation

Where to place the newWhere to place the newprocess?process?Goal: avoid externalGoal: avoid externalfragmentation andfragmentation andcompactioncompactionSome alternatives:Some alternatives:BestBest--fitfitFirstFirst--fitfitNextNext--fitfitWorstWorst--fitfitQuickQuick--fitfit

Sta Fig 7.5


Lecture 3 8

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Virtual memoryVirtual memory(using paging)(using paging)

PagingPagingOS: the programOS: the programsplit to pagessplit to pages

Page location storedPage location storedin page tablein page table

Process locationProcess locationLogical addressLogical addressalways the samealways the sameMMU translatesMMU translateslogical address tological address tophysical addressphysical addressusing page tableusing page tableEach page relocatedEach page relocatedseparatelyseparately

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00000011111111110000010000000000

Sta Fig 7.11


Lecture 3 9

PagingPaging

Each process has ownEach process has ownpage tablepage table

Contains the locationsContains the locations(frame numbers) of(frame numbers) ofallocated framesallocated framesPage table location storedPage table location storedin PCB, copied to PTRin PCB, copied to PTRfor executionfor execution

OS maintains a table (orOS maintains a table (orlist) of page frames, tolist) of page frames, toknow which areknow which areunallocatedunallocated

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Paging: Address TranslationPaging: Address Translation

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MMU has one special register, Page Table RegisterMMU has one special register, Page Table Register(PTR), for address translation(PTR), for address translation


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Paging: Address TranslationPaging: Address Translation

19Sta 8.3

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Page tablePage table


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Page tablePage table

Each process has its own page tableEach process has its own page tableEach entry has a present bit, since not all pages need to be in theEach entry has a present bit, since not all pages need to be in thememory all the timememory all the time --> page faults> page faultsRemember the locality principleRemember the locality principleLogical address space can be much larger than the physicalLogical address space can be much larger than the physical

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Typical Page Table Entry, Fig. 3.11

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Page TablesPage Tables

InternalInternaloperation ofoperation ofMMU with 16MMU with 164 KB pages4 KB pages


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TranslationTranslation LookasideLookasideBufferBuffer ––

TLBTLB

TLBTLB –– TranslationTranslation LookasideLookaside BufferBuffer

Goal is to speed up pagingGoal is to speed up pagingTLB is a cache in MMU for page table entriesTLB is a cache in MMU for page table entries

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Lecture 3 13

TLBTLB –– translation lookasidetranslation lookasidebufferbuffer

Part of memory management unit (MMU)Part of memory management unit (MMU)Cache for used page table entries to avoid extra memoryCache for used page table entries to avoid extra memoryaccess during address translationaccess during address translation

Associative searchAssociative searchCompare with all elements at the same time (fast)Compare with all elements at the same time (fast)

Each TLB element contains: page number, page tableEach TLB element contains: page number, page tableentry, validity bitentry, validity bitEach process uses the same page numbers 0, 1, 2, …,Each process uses the same page numbers 0, 1, 2, …,stored on different page framesstored on different page frames

TLB must be cleared during process switchTLB must be cleared during process switchAt least clear the validity bits (this is fast)At least clear the validity bits (this is fast)

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Sta FigSta Fig8.8.8.8.

OperationOperationof Pagingof Pagingand TLBand TLB


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Fig. 5.47 fromHennessy-Patterson,Computer Architecture

DEC Alpha AXP 21064memory hierarchy

Fully assoc,32 entrydata TLB

8 KB,directmapped,256 line(each 32B)data cache

Fully assoc, 12 entryinstruction TLB

8 KB, direct mapped,256 line (each 32B)instruction cache

2 MB, 64K line (each 32B)direct mapped, unified,write-back L2 cache

main memory

paging disk (dma)

More? -> course Computer Organisation II

TLB and cacheTLB and cache

28Sta Fig. 8.10


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Multilevel andMultilevel andInvertedInverted

Page TablesPage Tables

Multilevel page tableMultilevel page table

Large virtual address spaceLarge virtual address spaceLogical address could be 32Logical address could be 32-- or 64or 64--bitsbits

Each process has a large page tableEach process has a large page tableUsing 32Using 32--bit address and frame size 4KB (12 bit offset),bit address and frame size 4KB (12 bit offset),means 2means 22020 = 1M of page tables entries for a single process= 1M of page tables entries for a single processEach entry requires several bytes (lets say 4 bytes), so theEach entry requires several bytes (lets say 4 bytes), so thefinal size of page table could be for example 4 MBfinal size of page table could be for example 4 MB

Thus the page table is divided to several pages also andThus the page table is divided to several pages also andpart of it can be on the diskpart of it can be on the disk

Only the part of the page table that covers the pages usedOnly the part of the page table that covers the pages usedcurrently in the execution of the process is in memorycurrently in the execution of the process is in memory

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TwoTwo--level hierarchical page tablelevel hierarchical page tableTop most level in one page and always in the memoryTop most level in one page and always in the memory

1 K entries (= 1024 = 210)

1K * 1K = 1M entries

AddressAddresstranslationtranslationwith twowith two

levelslevels

32(Fig 4-12 [Tane01])

FA

VirtualAddress:

PCB


Lecture 3 17

Address translation with two levelsAddress translation with two levels

33Sta Fig 8.5

Inverted Page TablesInverted Page Tables

Comparison of a traditional page table with an inverted page tableComparison of a traditional page table with an inverted page table

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Lecture 3 18

Inverted page tableInverted page table

Physical memory often smaller than the virtual addressPhysical memory often smaller than the virtual addressspace of processesspace of processesInvert booking: Store for each page frame what pageInvert booking: Store for each page frame what page(of which process) is stored there(of which process) is stored there

Only one global table (inverted page table), one entry forOnly one global table (inverted page table), one entry foreach page frame.each page frame.

SearchSearch for the page based on the content of the tablefor the page based on the content of the tableInefficientInefficient, if done sequentially,, if done sequentially,Use hash to calculate the location, start search from thereUse hash to calculate the location, start search from there

If page not found, page faultIf page not found, page faultUseful, only if TLB is largeUseful, only if TLB is large 35

Inverted page tableInverted page table

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j

Frame numberFrame numberIndex of the tableIndex of the tableNot stored in theNot stored in theentryentry

Sta Fig 8.6

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Operating Systems: Memory management · Operating Systems, Fall 2008 8.9.2008 Lecture 3 2 Memory management Programs use logical addresses of their own address space (0..MAX) OS kernel