Open Process Spec Adoption: a Case Study - Si2 · Open Process Spec Adoption: a Case Study Gilles NAMUR June 3rd, 2014. Gilles NAMUR AGENDA 2 SI2 openPDK – OPS Adoption 10-Jun-14

Open Process Spec Adoption: a Case Study

Gilles NAMUR

June 3rd, 2014

Gilles NAMUR

AGENDA2

10-Jun-14SI2 openPDK – OPS Adoption

OpenPDK & OPS Introduction

What does OPS looks like ?

Let’s do an openPDK with OPS

Gilles NAMUR

a set of open standards to allow anOpenPDK to be created once and then translated into specific EDA vendor tools and specific foundry formats.

Target of OpenPDK Coalition3

10-Jun-14

Let’s Start with PDK Inputs format Open Process Specification

SI2 openPDK – OPS Adoption

Gilles NAMUR

SI2 OPDK Coalition 4

OpenPDK Coalition BoardChair: Jim Culp, IBM

OpenPDK Coalition BoardChair: Jim Culp, IBM

OpenPDK Technical Steering Group (TSG)Chair : Gilles Namur, ST

OpenPDK Technical Steering Group (TSG)Chair : Gilles Namur, ST

OpenPDK Working Groups

ESDESDOpen

ProcessSpecification

(OPS)

Open Process

Specification(OPS)

OPS toOA TechDB

OPS toOA TechDB

OPS toopenDFM

OPS toopenDFM

4


SymbolsSymbols ToolsInterface

ToolsInterface

Callbacks &

Parameters

Callbacks &

Parameters

PcellXML

Packaging

PcellXML

Packaging

PcellCommonLanguageGrammar

PcellCommonLanguageGrammar

UnifiedLayer Model (DFMC)

UnifiedLayer Model (DFMC)

Gilles NAMUR

WHAT IS OPS ? 5

10-Jun-14

LVS

…

PEX

CustomerSupplier Exchange(standardized)

Library

DRC

OPS.xsd

OPS.xml<Process><Libraries><Devices><Layers><Rules>

<…>

XSL

parser

parser

PDK

……

parser

parser

parser

parser

Device Specifications

LayerList

script

DRM DB

This is the SI2 OPS standard

Open Process Specification (OPS) is a standardized format for exchanging all data needed to generate a

complete PDK.


Gilles NAMUR

6


ST is looking for a smarter & more complete electronic PDK input format because lots of data are missing or are not easy to be extracted in traditional eDRM.

Open Process Specification New Format :

Allow Automation for PDK generation.

Eases EDA Vendor sync. with foundries Inputs.

Foundries

Inputs DB


<…>

PDK

EDA Tools

Why OPS ?

Gilles NAMUR

7


LVS

d i t a

FM

Supplier

PDK…

ST wants to have this format defined as a standard and used across the industry because what ever is the format of the Database used by the supplier to manage the PDK inputs :

The PDK generation flow remains the same.

Other DB

r t f

DRC PEX

Library …

Only one Flow


<…>

Why OPS ?

Gilles NAMUR

ST is looking for an efficient way to generate several PDKs in parallel without a huge over cost.

OPS is an answer to this target.OPDK Working Groups motto: “ Write once, use many, (test forever)! ”

You can produce any kind of PDK.

8


LVS

PDK for Tool ADRC PEX

Library …OPS.xml<Process><Libraries><Devices><Layers><Rules>

<…>

LVS

PDK forTool BDRC PEX

Library …

EDA Tools A

EDA Tools B

Even better, with the help of EDA Vendors : OPS could become a techfile

Why OPS ?

Gilles NAMUR


<…>

OPS.xmlWhat does it looks like ?


Gilles NAMUR

Human Readable Layer List

<ops:RootLayer name="OD“ abbreviation="OD“ destination="core"><ops:ToolMappingNumber number="17" tool="OA"/>

</ops:RootLayer><ops:Purpose opsName="drawing“ name="drawing“ abbreviation="drg“ destination="core">

<ops:ToolMappingNumber number="-1" tool="OA"/></ops:Purpose><ops:CADLayer name = "OD;drawing" alias="OD" opsRole="DIFFUSION" role="DIFFUSION" description = "DefinesACTIVE Area" destination = "core" expoNumber = "1">

<ops:RefRootLayerName value="OD"/><ops:RefPurposeName value="drawing"/><ops:StreamIO format="GDSII" number="1" dataType="0"/><ops:StreamIO format="OASIS" number="501" dataType="500"/><ops:ToolMappingNumber number="1001" tool="Calibre"/><ops:Display transparencyOrder="1" visible="True" selectable="True" con2ChgLy="True" drgEnbl="True" valid="True"

stipple="stipple3" lineStyle="lineStyle0" fill="lime" outline="lime" fillStyle=""/></ops:CADLayer>

Machine Readable Layer Declaration in OPS.xml

1010

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10-Jun-14

<ops:Rule name="PO.S.4"><opc:Documentation sectionTitle="PO Design Rules (POLY)">

<opc:Description>PO space if at least one PO width is > 0.120 µm (W) and if the parallel run length is > 0.140 µm (L)</opc:Description>

</opc:Documentation><ops:Template name="">

<opc:Parameter name="V1" value="0.120" type="FLOAT"/><opc:Parameter name="V2" value="0.140" type="FLOAT"/><opc:Parameter name="MAIN" value="0.160" type="FLOAT">

<opc:SIUnit prefix="µ" siName="m"/></opc:Parameter><ops:RefCADLayerAlias value="PO"/><ops:RefCADLayerAlias value="PO"/>

</ops:Template></ops:Rule>

Human Readable DRM

Machine Readable OPS.xml



Gilles NAMUR

12

10-Jun-14

XML Representation



Gilles NAMUR

<edsDevice name="nfet" libName="demo45" description="Regular-Vt FET" symbolName="nmos3" symbolPinOrderMappingList="D=d;G=g;S=s;B=b" layoutName="nfet" layoutType="PCELL" >

<edsDeviceParameter name="w" description="Total Gate Width" defaultValue="240n" type="string" units="lengthMetric" >

<edsDDFDeviceParameter callback="Check_Width_Fet('w)" parseAsNumber="1" parseAsCEL="1" editable='cdfgData->dimensionMode->value==\"TotalWidth\"' display="1" storeDefault="1" />

</edsDeviceParameter><edsDeviceParameter name="l" description="Gate Length" defaultValue=“80n" type="string"

units="lengthMetric" ><edsDDFDeviceParameter editable="1" callback="Check_Length_Fet()"

parseAsNumber="1" parseAsCEL="1" display="1" storeDefault="1" /></edsDeviceParameter>

<edsDeviceNetlistingInfos><edsDeviceNetlistingInfo toolName="auCdl" modelName="nfet"

netlistProcedure="_ansCdlCompParamPrim" instParameters="(w l)" componentName="mos" termOrder="(d g s b)" namePrefix="M" />

</edsDeviceNetlistingInfos>

</edsDevice>

Library device description Parameter Pin Order Netlister

demo45 nfet Regular-Vt FET w & l D;G;S;B CDL


13What does OPS looks like ?

Gilles NAMUR

A concrete OPS example14


OPS.xsd


<…><…>

All along the process of definition of OPS, ST has contributed with several DRM examples : demo DRM 45nm.

The example contains a complete DRM.pdf and its associated OPS.xml file aligned with the OPS.xsd defined by SI2 OPDKC OPS WG.

Gilles NAMUR

OpenPDKLet’s do an openPDK with OPS


Gilles NAMUR

OPS History16

10-Jun-14OpenPDK at STMicroelectronics

2012

2010

March & October 2011 ST Contribution : 1st & 2nd OPS.xsd + « demo DRM 45nm 1.0 » June 2011 DAC 1st ST Results with OPS : « Dev. Lib generation from OPS » 20nm

June 2012 SI2 DAC Demo : DRM-> XML-> OpenDFM (DRC) -> CDN/SNPS/MGC DRC > Layout Viewer 40nm

August 2012 ST Contribution : « Updated demo DRM 45nm » (extended to address Multi Patterning / Local Interconnect Layers & specific rules / 3D Space)

Since August 2012 used by ST to generate 20nm/14FDSOI/SI-Photonics PDK Device Library & Techfile November 2012 OPS.XSD 1.0 (semantic of the XML file)

2011

2006 First eDRM & PDK automation (DRC, pcell, QAcell) 40/45nm October 2009 XML eDRM program start March 2010 1rst phase spec frozen June 2010 1rst IBM & ST discussion about eDRM solution 32/28nm

2009

2006

Since Q1 2013 used by ST to generate 3D IC PDK Addons June 2013 DAC Demo : Rule subset from ST “Demo DRM 45nm” translation into OpenDFM deck November 2013 OPS.XSD 1.1 with ST Contribution : « demo DRM 45nm 1.6 »

2013

2014 Q1 & Q2 2014 OPS Proof of concept Scripts :

Automatic Translation OPS openDFM & OPS OpenAccess Techfile June 2014 DAC Demo & Presentation :

Full ST « Demo DRM 45nm » translation into OpenDFM deck OPS translation into OpenAccess Techfile

Q3 2014 OPS.XSD 1.2 with ST Contribution : « Updated demo DRM 45nm »

August 2010 SI2 OPS Working Group Creation October 2010 ST Contribution : first OPS UML description

ST only

Gilles NAMUR

First Step : Generate your OPS 17


PDK Inputs

OPS.xsd

XSL & parserLayerList

DRM DB


<…>

10-Jun-14

ST is ready to produce their own eDRM in OPS format.

Deployed at Production level in ST PDKs 20nm (2011) / 14nm FD-SOI (2013) Silicon Photonics (SP) (2012) 3D IC Flow (SP + CMOS Sensor) (2013)

Device Specifications

Gilles NAMUR

ops2oaTechDBtranslator



PDK Inputs


<…>

10-Jun-14

SI2 can Help you :

Get the ops2oaTechDB translator Available on the Si2 website.

Extract your Data from your OpenAccess Technology Database

Today limited to Layers description

OpenAccessTechnologyDatabase

Bidirectional Translation

Gilles NAMUR



PDK Inputs

OPS.xsd

Updated Script

LayerList

DRM DB


<…>

10-Jun-14

Update your existing flows and scripts

ScripteDRMProcessLibrariesDevicesLayersRules

…

This should not takes too long… may be some weeks !!!

Gilles NAMUR

20


Then : Create your PDK

At ST and/or SI2, Flows already exist to produce PDK Device Library, Techfile, DRC, Documentation

Flows about to be released to produce Pcells

OPS.xsd


<…>

LVS

…

PEX

Customer

Library

DRC

parser

PDK

…parser

parser

parser

parser

Pcellsparser

Gilles NAMUR

21

10-Jun-14

NewTemplate

In-HouseTemplate DB

Generator

DRM DB

DRC Coder

openDFMTemplate DB

Enriched OPS

Reference to

OPSNew Template

GroundRuler

Techfile Coder

NewTemplate

In-HouseTemplate DB

New Template

Reference to

DRCCode

TechfileCode

OPS : Automation for DRC & Techfile ConstraintsOPS.xml

<Process> <Libraries><Devices> <Layers>

<Rules><…><…>

EnrichedOPS.xml


<Rules> < Templates ><…> <…>


Gilles NAMUR

OPS to DRC Generation 22


OPS XML

Calibre, PVS or ICV Runsets

OpenDFM File

The Target

Gilles NAMUR

OPS to DRC Generation 23


The Result : SI2 propose a script that automatically generate an openDFM Deck from an OPS.XML file

The full set of rules of the demo DRM 45nm provided by ST has been converted in openDFM through this script

Translation Validation

ComparisonManualGeneration

ComparisonTranslation Validation

ComparisonManualGeneration

Comparison

DRC deck For Tool A

Validation Report on

Tool C

eDRM

DRC deck For Tool B

DRC deck For Tool C


Tool CDRC deck For Tool A


Tool A


Tool C

eDRM

OPS openDFM

DRC deck For Tool B

DRC deck For Tool C


Tool C

SI2 OPS2openDFMAutomatic Script

Validation

Validation Report

Current Generation & Validation Flow

Roadmap: openDFM Support in ST PDKs at Production Level 28nm (Q3 2014) / 14nm FD-SOI (Q4 2014) Silicon Photonics (SP) (Q3 2014)

Gilles NAMUR

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10-Jun-14

TechfileAll Layers

Design Layers

Derived Layers

Via Definitions

Physical Constraints

Tool Directives

OPS XML file<Process><Libraries><Devices><Layers><Rules>

<…><…>

OPS : Automation for Techfile Generation

The Target


Gilles NAMUR

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10-Jun-14

OPS To Techfile Generation

Coverage Layers Display GDS (Layer map side file)

The Result : SI2 propose a script that automatically generate an OA techDB

(openAccess techfile) with all the info relative to the layers ST current usage of OPS

ST already has its own flow using OPS as input file to generate part of the techfile in some technos.

Next Steps : Extend the automatic techfile

generation with the process constraints through templates as decribed in previous slides.

Extend the coverage of technos using this kind of automation.

The Bi-Directional Translation allows to create an OPS file from an existing OA DB. Very Helpful for OPS Adoption


Gilles NAMUR

OPS to Techfile Optimisation 26

10-Jun-14

EnrichedOPS.xml


<Rules> < Templates ><…> <…>

TechfileTemplate

Generator PrimaryTechfile with

« flat » constraints

code

TechfileOptimisator

Final Techfilewith optimized

constraintscode

One Rule One Template & One code /

No table


Gilles NAMUR

OPS : Automation for PDK device Library

PcellsLibraryRef Symbols

Library

Callbacks Directory

SpilttedTechfileDirectory>

ParameterSetup File ….………….

27

10-Jun-14

PDK Device Library generation push button flow from an OPS.xml as input.

OPS.xsd


OPS XML file<Process><Libraries><Devices><Layers><Rules><…><…>

OpenLibGen is an ST Internal API & Tools.


Next Steps : Remove as much as possible the

additional set of input. Everything should be in OPS.

Gilles NAMUR

28OPS : Automation for PDK documentation


Device Library Documentation for End-User.

Device Lib Documentation

Template(Word)

Device Lib Documentation

(Word)

OPS.xsd

OPS XML file<Process><Libraries><Devices><Layers><Rules><…><…>

OpenLibGen is an ST InternalAPI & Tools.


Next Steps : Extend the doc template to enhance

the full device Library documentation

Gilles NAMUR

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10-Jun-14

Problems OpenPCell Addresses More productive programming effort Write once Pcell and Callback code Multi flow support Ease of integration into a PDK Assure high quality

No flow supporting multiple language

Fully supports SI2 OpenPcell Initiative

Strong Link with OPS seen as added value

Looking for Build-In Validation Concept

Expected Results are : Pcell generation productivity ++ Pcell quality enhancement One Spec Several Pcells code

OpenPDK at STMicroelectronics

OPDK/OPS Next Step : Open Pcells

Gilles NAMUR

30


OPDK/OPS Next Step : Open Pcells

PDKTesting

Tool

PDKSpec

CaptureTool

PDKGeneration

ToolPyCellPlugin

TCLPlugin

SKILLPlugin

Code Repository

CLGPythonSKILL

ProcessInputs

ProcessConstraints

Devices

Vias

Models

LayerDefinitions

OPS XML file

<Process><Libraries><Devices><Layers><Rules>

<…>

CustomDesigner

PDK

PyxisPDK

VirtuosoPDK

OPS with its PCells XML Repository solution is language agnostic and with the use of translators, the data can be adopted to any companies proprietary solution.

Gilles NAMUR

Conclusion 31


ST strongly supports PDK Standardization : Best Time-to-market PDK for IP-design flow Best PDK Development efficiency, quality Universal data store for design information (OA)

EDA Vendors adoption of OPS is now a must-have to deploy across Industry within ST foundry offer.

ST willingness to being more involve in Open3D & Silicon Photonics TABs

ST already uses OPDK in production advanced & legacy technology PDKs.

OpenPcell & openDFM Last Spec Benchmark to be done

Automatic Techfile Constraints generation. Working with EDA Vendors to find a production solution

THANK YOU

Documents

Open Process Spec Adoption: a Case Study - Si2 · Open Process Spec Adoption: a Case Study Gilles NAMUR June 3rd, 2014. Gilles NAMUR AGENDA 2 SI2 openPDK – OPS Adoption 10-Jun-14