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RadWG Meeting (02 /07/2015) Manoel Barros Marin A new rad - hard acquisition system for beam instrumentation (on behalf of the GEFE team) BE - BI - QP

(on behalf of the GEFE team) - Open Hardware … · (on behalf of the GEFE team) BE-BI-QP. Outline: •Introduction •The GEFE board •Application examples •Status •Summary

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RadWG Meeting (02/07/2015)

Manoel Barros Marin

A new rad-hard acquisition system for beam instrumentation

(on behalf of the GEFE team)

BE-BI-QP

Outline:• Introduction• The GEFE board• Application examples• Status• Summary & Outlook

A new rad-hard acquisition system for beam instrumentation

BE-BI-QP

• Introduction

BE-BI-QP

A new rad-hard acquisition system for beam instrumentation

4

Introduction (1 of 5)

BE-BI-QPThe GEFE team• Andrea Boccardi• Christophe Donat Godichal

• Thibaut Lefevre• Tom Levens • Manoel Barros Marin

Acknowledgments• Pedro Leitao & other colleagues from my old group PH-ESE

• Slawosz Uznanski, Andrea Vilar Villanueva & other colleagues from TE-EPC• Felix Andreas Arnold, Stephane Burger & other colleagues from BE-BI-PM• Frank Locci, Stefano Magnoni, Erik Van Der Bij & other colleagues from BE-CO• Bartosz Przemyslaw Bielawski & other colleagues from BE-RF

• Juan Boix Gargallo, Thierry Bogey and the rest of my section (BE-BI-QP)

• Special thanks to Fernando Carrio Argos (PH-UAT) for his simulations of GEFE’s Power Distribution Network• Markus Brugger, Salvatore Danzeca & other colleagues from EN-STI and RadWG

• Jose Luis Gonzalez

• Tullio Grassi (PH-UCM)

5

Introduction (2 of 5)

What is the GBT-based Expandable Front-End (GEFE)BE-BI-QP

6

Introduction (2 of 5)

What is the GBT-based Expandable Front-End (GEFE)BE-BI-QP

• General purpose FPGA-based radiation tolerant board

• Features different components of the GBT-Versatile Link ecosystem from CERN PH-ESE

• FPGA Mezzanine Card (FMC) High-Pin Count (HPC) connector

• Clocks

• Upgradable:

• 2x GPIO low-pin count connectors (24 & 13 pins)

• Flexible schemes for:

• Resets

• FPGA programming

• Power• Slow Control (SC) E-link

Target Total Ionizing Dose (TID): up to 75 krad

• Optical & Electrical interfaces

• Rad-Hard FPGA ProAsic3 (ACLA3PE3000-FGG896) from Microsemi

7

Our motivation

(3 of 5)IntroductionBE-BI-QP

8

Our motivation

(3 of 5)IntroductionBE-BI-QP

9

Our motivation

This is a big

[3 of 5)IntroductionBE-BI-QP

Why a common Digital Front-End?

10

Introduction (4 of 5)

BE-BI-QP

Front-EndCards

Back-EndSystem

Timing/Trigger/Ctrl (TTC/BST)

&Data Acquisition

(DAQ)

Rad Hard

Why a common Digital Front-End?• Similar architecture in different beam instrumentation projects

11

Introduction (4 of 5)

BE-BI-QP

Front-EndCards

Back-EndSystem

Timing/Trigger/Ctrl (TTC/BST)

&Data Acquisition

(DAQ)

Rad Hard

• New Back-End systems in beam instrumentation already unified

Why a common Digital Front-End?• Similar architecture in different beam instrumentation projects

12

IntroductionBE-BI-QP

VFC-HD Front-EndCards

Timing/Trigger/Ctrl (TTC/BST)

&Data Acquisition

(DAQ)

Rad Hard

(4 of 5)

Front-EndCards

Back-EndSystem

Timing/Trigger/Ctrl (TTC/BST)

&Data Acquisition

(DAQ)

Rad Hard

Why a common Digital Front-End?

13

IntroductionBE-BI-QP

VFC-HD Front-EndCards

Timing/Trigger/Ctrl (TTC/BST)

&Data Acquisition

(DAQ)

Rad Hard

GEFE

(4 of 5)

• New Back-End systems in beam instrumentation already unified

• Similar architecture in different beam instrumentation projects

Front-EndCards

Back-EndSystem

Timing/Trigger/Ctrl (TTC/BST)

&Data Acquisition

(DAQ)

Rad Hard

Why a common Digital Front-End?

14

IntroductionBE-BI-QP

VFC-HD Front-EndCards

Timing/Trigger/Ctrl (TTC/BST)

&Data Acquisition

(DAQ)

Rad Hard

GEFE

(4 of 5)

• New Back-End systems in beam instrumentation already unified

• Similar architecture in different beam instrumentation projects

15

IntroductionOur approach

BE-BI-QP

(5 of 5)

16

IntroductionOur approach

BE-BI-QP

(5 of 5)

17

IntroductionOur approach

BE-BI-QP

(5 of 5)

• Use of active components already qualified in terms of radiation hardness:

- GBT-Versatile Link ecosystem (VTRx, GBTx, etc.)

- Microsemi ProAsic3 FPGA

- Other active components (BJT, Schmitt-Trigger, etc.)

• Use advise about radiation hardness from other groups (e.g. TE-EPC, BE-CO, RadWG, etc.)

• Follow typical procedures for rad-hard electronic devices (e.g. simple design, rad-hard components)

• The GEFE board

18

IntroductionOur approach

BE-BI-QP

• User Community

• Meetings with the different teams

• Open HardWare Repository (OHWR) Wiki

• Regular updates through mail list ([email protected])

• Specifications (User Guide)

(5 of 5)

• Use of active components already qualified in terms of radiation hardness:

- GBT-Versatile Link ecosystem (VTRx, GBTx, etc.)

- Microsemi ProAsic3 FPGA

- Other active components (BJT, Schmitt-Trigger, etc.)

• Use advise about radiation hardness from other groups (e.g. TE-EPC, BE-CO, RadWG, etc.)

• Follow typical procedures for rad-hard electronic devices (e.g. simple design, rad-hard components)

• The GEFE board

• The GEFE board

BE-BI-QP

A new rad-hard acquisition system for beam instrumentation

20

GEFE boardBE-BI-QP

The GEFE at a glance

(1 of 9)

21

GEFE boardBE-BI-QP

GEFE

100mm

205mm

25mm

FMC

HPC

Conn

ecto

r

60mm

The GEFE at a glance

(2 of 9)

22

BE-BI-QP

FMC HPC

ProAsic3FPGA

GBTxVTRx

Rad-HardPowering

GEFE board

VTRx

The GEFE at a glance

(3 of 9)

Main Components

GEFE

FMC HPCGBTx FMC HPC (xN)

E-links (xN)VTRx

SCA E-link (x1)

E-links clocks (xN) FPGA (ProAsic3)

E-link Clock (x1)

FMC clocks (xN)

FEASTMP (DC/DC) 2.5V

Main PowerConnector

(5-12V) FEASTMP (DC/DC) 1.5V LHC4913 (LDO) 3.3V

Rad-Hard Powering

23

GEFE boardBE-BI-QP

The GEFE at a glance

(4 of 9)

Main Components

24

BE-BI-QP

FMC HPC

ProAsic3FPGA

Low-SpeedElectrical Link

TX

RX

GBTxVTRx

Rad-HardPowering

GEFE boardThe GEFE at a glance

Low-pin CountConnectors

(5 of 9)

Main ComponentsSecondary Components

GEFE

FMC HPCGBTx FMC HPC (xN)

E-links (xN)VTRx

SCA E-link (x1)

E-links clocks (xN) FPGA (ProAsic3)

E-link Clock (x1)

FMC clocks (xN)

SMASMA

Low-Speed Electrical Link

GPIO Connector A (13 user pins)

GPIO Connector B (24 user pins)

FEASTMP (DC/DC) 2.5V

Main PowerConnector

(5-12V) FEASTMP (DC/DC) 1.5V LHC4913 (LDO) 3.3V

Rad-Hard Powering

25

GEFE boardBE-BI-QP

The GEFE at a glance

(6 of 9)

Main Components Secondary Components

26

BE-BI-QP

FMC HPC

ProAsic3FPGA

LEDs(x6)

GPIO/CLKMMCX

Board IDConnector

GPIO Switch& Push Button

JTAG

GBTx

GPIOLemo

Rad-HardPowering

GEFE boardThe GEFE at a glance

VTRx

Low-SpeedElectrical Link

TX

RX

Low-pin CountConnectors

Main ComponentsSecondary ComponentsAuxiliary Components

(7 of 9)

GEFE

FEASTMP (DC/DC) 2.5V

FMC HPCGBTx

GPIO Connector A (13 user pins)

LEDs

FMC HPC (xN)E-links (xN)VTRx

Main PowerConnector

(5-12V)

SCA E-link (x1)

PushButton

MMXC (LVDS)GPIO/Clk IO

JTAG

MMCX (LVDS)SecRefClk

E-links clocks (xN)

GPIO Connector B (24 user pins)Osc. (25MHz)

FPGA (ProAsic3)

MMCX GPIO (x4)

E-link Clock (x1)

FMC clocks (xN)

Board IDConnector

(8-bit)

GPIO SW(8-bit)

SMASMA

Low-Speed Electrical Link

FEASTMP (DC/DC) 1.5V LHC4913 (LDO) 3.3V

Rad-Hard Powering

27

GEFE boardBE-BI-QP

Main Components Secondary Components Auxiliary Components

The GEFE at a glance

(8 of 9)

Tested Max. Radiation Levels

YESup to 50 Mrad 2x10^15 n/cm²

YESup to 100 Mrad

1.40x10^7 p/cm²

YES up to 75 krad

YESup to 200 Mrad(Si) 5.0x10^14 n/cm²

YESup to 500 krad

2.0*10^7 p/cm²

YES up to 300 krad

YESx > 50 krad(Si)

x > 9.31*10^11 p/cm²

YESx > 50 krad(Si)

9.31*10^11 p/cm²

YESx > 30.6 krad(Si)

3.73x10^11 p/cm²

YESx > 27.1 krad(Si) 6.0x10^11 p/cm²

NO

NO

NO

DescriptionActive Component

SPXO018077

BAV99

VTRx

GBTx

FPGA (ProAsic3)

FEASTMP

LHC4913

PMST2222A

SN74LVC2T45DCTT

NPN Transistor

SN74LVC14APW

BSR18A

BST82

SN65LVDS2DBVR

Optical Transceiver

Multi Gigabit Transceiver

A3PE3000-FGG896

DC/DC Regulator

LDO Regulator

High Speed Switching Diode

Dual-Bit Dual-Supply Bus Transceiver

Hex Schmitt-Trigger Inverter

PNP Transistor

N-CHANNEL MOSFET with Diode

High-Speed Differential Line Receiver

Crystal Oscillator (25MHz)

28

GEFE boardBE-BI-QP

Radiation Hardness

(9 of 9)

Qualified up to 75 kradQualified bellow 75 krad

Not Qualified

• Application examples

BE-BI-QP

A new rad-hard acquisition system for beam instrumentation

30

Application Examples (1 of 2)

BE-BI-QP

Multi-Orbit POsition System SPS (MOPOS SPS) (BE-BI-QP)

Motor Controller with Optical Interface (MCOI) (BE-BI-PM)

STANDARD BACK-END (VFC-HD)FPGA

GBT-FPGAUSER LOGIC

GEFE

VTRx GBTx FPGA BPM ANALOG FE BPM

FMC

BPM DIGITAL FE

FMC

STANDARD BACK-END (VFC-HD)

FPGAGBT-FPGA

GEFE

VERSA EUROPE 3UBACKPLANE

MOTORUSER LOGIC

GEFE

VTRx GBTx FPGAFMC

PM DIGITAL FE

FMC

31

Application Examples (1 of 2)

BE-BI-QP

Multi-Orbit POsition System SPS (MOPOS SPS) (BE-BI-QP)

Motor Controller with Optical Interface (MCOI) (BE-BI-PM)

STANDARD BACK-END (VFC-HD)FPGA

GBT-FPGAUSER LOGIC

GEFE

VTRx GBTx FPGA BPM ANALOG FE BPM

FMC

BPM DIGITAL FE

FMC

STANDARD BACK-END (VFC-HD)

FPGAGBT-FPGA

GEFE

VERSA EUROPE 3UBACKPLANE

MOTORUSER LOGIC

GEFE

VTRx GBTx FPGAFMC

PM DIGITAL FE

FMC

BPM Digital Front-End FMC(BDF)

32

Application Examples (1 of 2)

BE-BI-QP

Multi-Orbit POsition System SPS (MOPOS SPS) (BE-BI-QP)

Motor Controller with Optical Interface (MCOI) (BE-BI-PM)

STANDARD BACK-END (VFC-HD)FPGA

GBT-FPGAUSER LOGIC

GEFE

VTRx GBTx FPGA BPM ANALOG FE BPM

FMC

BPM DIGITAL FE

FMC

STANDARD BACK-END (VFC-HD)

FPGAGBT-FPGA

GEFE

VERSA EUROPE 3UBACKPLANE

MOTORUSER LOGIC

GEFE

VTRx GBTx FPGAFMC

PM DIGITAL FE

FMC

BPM Digital Front-End FMC(BDF)

Motor Driver Interface(MDI) board

33

Application ExamplesBE-BI-QP

Advanced Wakefield Experiment BPM (AWAKE BPM) (BE-BI-QP)

New WorldFIP (BE-CO)

STANDARD BACK-END (VFC-HD)FPGA

GBT-FPGAUSER LOGIC

GEFE

VTRx GBTx FPGAFMC

WorldFIPDIGITAL FE

FMC

WorldFIP FE

... ...

WorldFIP FE

WorldFIP FE

WorldFIP FE

(2 of 2)

STANDARD BACK-END (VFC-HD)

FPGA

GEFE

FMC

DIGITAL FE FMC

USER LOGIC

SMA

GBTx FPGA

SMA

VTRx

Low-Speed Electrical Link

BPM ANALOG FE BPM

• Status

BE-BI-QP

A new rad-hard acquisition system for beam instrumentation

35

StatusBE-BI-QP

• Specification in version 0.8.5 (may be used as User Guide)

- New Multi-Orbit POsition System SPS (MOPOS SPS) (BE-BI-QP): Requested 300 pieces

• User Projects:

- Motor Controller Optical Interface (MCOI) (BE-BI-PM): Requested 25 pieces

- CLIC Acquisition and Control Module (CLIC-ACM) (BE-CO): Interested

- New WorldFIP (BE-CO): Interested

• Schematics finished• PCB layout finished at CERN design office by Pascal Vulliez

- Beam Wire Scanners (BE-BI-BL): Interested

• Waiting for slot at CERN design office for producing 4 PCB (2 mounted)

• The GEFE board

• Waiting for final comments from users for GEFE v1 (deadline 03/07/15)

• User community

- Advanced Wakefield Experiment BPM (AWAKE BPM) (BE-BI-QP): Requested 30 pieces

• Open HardWare Repository (OHWR) Wiki and Mail List

• Increasing the number of users

• Radiation hardness qualification required for some active components

- Function Generator Controller Lite (FGClite) (TE-EPC): Interested

• Summary & Outlook

BE-BI-QP

A new rad-hard acquisition system for beam instrumentation

37

Summary & Outlook (1 of 2)

BE-BI-QP

Summary

• General purpose FPGA-based radiation tolerant board

Target Total Ionizing Dose (TID): up to 75 krad

• Specifications in version 0.8.5 (may be used as User Guide)

• Several projects interested (More than 350 pieces requested)`

• Open HardWare Repository (OHWR) Wiki and Mail List

• User community

• First 2 prototypes of GEFE v1 expected very soon

• The GEFE board

- Rad-Hard FPGA ProAsic3 (ACLA3PE3000-FGG896) from Microsemi

- Features different components of the GBT-Versatile Link ecosystem from CERN PH-ESE

- Optical & Electrical interfaces (FMC HPC, etc.)

• Increasing the number of users

38

BE-BI-QP

Outlook

Summary & Outlook (2 of 2)

38

BE-BI-QP

• Update specifications after assembly of first GEFE v1 prototypes

• Organise production of GEFE for the different projects

• Test functionality of the first 2 prototypes of GEFE v1 (Second half of 2015)• Test the GEFE v1 in terms of radiation tolerance (First half of 2016…)

• Design and implementation of a fully automated test bench for production testing

• The GEFE board

• User community

• Update Open HardWare Repository (OHWR) Wiki

• Increase the number of users

• Production stage (First half of 2017)

- Ph.D. Student (Christophe Donat Godichal) in charge of the radiation tests

• Organise periodical meetings

Thank you

Contact: [email protected]

http://www.ohwr.org/projects/gefe

40

BE-BI-QP

References

• The GBT project web page: https://espace.cern.ch/GBT-Project/default.aspx

• The VTRx application note: Application Note V2.4.pdf

• FEASTMP project web page: http://project-dcdc.web.cern.ch/project-dcdc/

• Microsemi web page: http://www.microsemi.com/

• Microsemi ProAsic3E FPGA Fabric user’s guide: PA3E_UG.pdf

• The GBTx ASIC manual: gbtxManual.pdf

• ST LHC4913 data sheet: http://atlas.web.cern.ch/Atlas/GROUPS/FRONTEND/documents/LHC4913.pdf

• ANSI/VITA specifications web page: http://www.vita.com/Specifications

• Microsemi ProAsic3E Flash Family FPGAs datasheet: PA3E_DS_v14.pdf

• Microsemi application note AC380: LPF_AC380_AN.pdf

• The GEFE project web page: http://www.ohwr.org/projects/gefe

• The VFC-HD project web page: http://www.ohwr.org/projects/vfc-hd

GEFE boardBE-BI-QP

GEFE

FEASTMP 1.5V FEASTMP 2.5V

FMC HPCGBTx

GPIO Connector A (13 user pins)

SMASMA

LEDs

FMC HPC (160 pins)E-links

(40 Bidirectional)VTRx

Main PowerConnector

SCA E-link

GPIO SW(8-bit)

PushButton

MMXC (LVDS)GPIO/Clk IO

JTAG

M2C clocks (x2)BIDIR clocks (x2)

SFP+Power

VTRxPower

Vadj

ESLT

MMCX (LVDS)SecRefClk

E-links clocks (x3)

LDORegulator

3.3V

Board IDConnector

(8-bit) GPIO Connector B (24 user pins)

Reset

RSSIGBT M2C clocks (x2)

Prog. clocks (x4)

Osc. (25MHz)

VioBM2c

FMC DP (40 pins)Std. IOs

Std. IOs

FPGA (ProAsic3)

MMCX GPIO (x4)

IOs (Hb)

IOs (La/Ha)Core

Prog. clocks (x1)

Detailed Block Diagram

GEFE boardBE-BI-QP

Test Bench

FPGA-basedFMC carrier

GEFESFP+

FMC Connector FMC Connector

VTRx

FPGA

FPGA

GBTx

Ethernet

FMC Cable

Optical LInk

GEFE boardBE-BI-QP

GBTx ASIC

17 mm

17 mm

VTRx

VTRx & GBTx• Main components of the new “Rad-Hard Optical Link for Experiments”

• Developed at CERN by PH-ESE

• VTRx

• Rad-Hard Optical Transceiver• Bidirectional Link at 4.8 Gbps (Versatile Link)

• GBTx

• Rad-Hard ASIC• Single Electrical Link with VTRx at 4.8 Gbps

• Multiple Electrical Links with Front-End Electronics (E-Links) - 40 Links @ 80 Mbps- 20 Links @ 160 Mbps- 10 Links @ 320 Mbps

• Widely used at CERN (Experiments & Accelerators) and External institutions (Desy, etc.)

GEFE boardBE-BI-QP

Particularities of the FMC connector in GEFE• High-pin count (HPC) socket

• The different control signals of the FMC standard are supported

• The targeted user-specific I/O data rate is up to 700 Mbps

• The high-speed lanes (DP) connected to user-specific I/Os

• Special functions of DP lanes:• Direct SC e-link between GBTx and the FMC HPC connector

• FPGA programming by JTAG master (e.g. SCA) placed on FMC

• Accessible from the rear of the board

• Up to 160 Single-Ended (or 80 Bidirectional) user-specific I/Os

• 6 differential clock lines (4 inputs and 2 bidirectional)

• Direct signals from GPIO connector A to FMC HPC connector

BDF

Single width conduction cooled FMC Module

45

GEFE boardBE-BI-QP

FPGA (ProAsic3)

46

GEFE boardBE-BI-QP

PoweringFEASTMP

47

GEFE boardBE-BI-QP

Slow Control (SC) E-Link• Single E-link @ 80 Mbps

GEFE

FMC HPC

GBTxVTRxGbtxElinkScXx_p/n

FPGA (ProAsic3)

ResistorsNetwork

FmcDpM2c_p/n[5:7]

GbtxElinkScXx_p/n_Fpga

FmcDpM2c_p/n_Fpga[5:7]

48

GEFE boardBE-BI-QP

Low-Speed Electrical Link• Tested up to 10 Mbps over 2 Km of coper cable

GEFE

FMC HPCFMC HPC (xN)

FPGA (ProAsic3)

FMC clocks (xN)

SMASMA

Low-Speed Electrical Link

FEASTMP (DC/DC) 2.5V

Main PowerConnector

(5-12V) FEASTMP (DC/DC) 1.5V LHC4913 (LDO) 3.3V

Rad-Hard Powering

MMXC (LVDS)GPIO/Clk IO

Osc. (25MHz)

MMCX GPIO (x4)

49

GEFE board(1 of 2)

BE-BI-QP

Clocking Scheme

GEFE

FMC HPC

VTRx

MMXC (LVDS)GPIO/Clk IO

CLK_M2C[0:1]

CLK_BIDIR[2:3]

Osc. 25MHz

MMCX (LVDS)

DCLK[0:2]GBTCLK_M2C[0:1]

CLOCKDES[0:3]

FPGA (ProAsic3)

MMCX GPIO (x4)

Hb_cc[00,06,17]

Ha_cc[00,01,17,18]

La_cc[00,01,17,18]

GBTxCDR

Osc.40MHz

SCCLKREFCLK

FmcDpM2c[5]

CLOCKDES[4]

FmcDpC2m[8]

50

GEFE board(2 of 2)

BE-BI-QP

Clocking SchemeDCLK[0]

MmcxGpio[0]

CLOCKDES[0]MmcxGpio[5]

MmcxGpio[6]

MmcxGpio[7]

CLK_M2C[1]

La_cc[0]

La_cc[18]CLK_BIDIR[3]

La_cc[17]

Ha_cc[17]

GBTCLK_M2C[0]

La_cc[1]

Osc25MHz

CLK_BIDIR[2]

ClkFeedbackClkM2c[0]

GBTCLK_M2C[1]

Ha_cc[0]

Ha_cc[1]MmcxGpio[3]

MmcxGpio[2]

MmcxGpio[1]

Hb_cc[0]

Hb_cc[6]

Hb_cc[17]MmcxGpio[4]

CLOCKDES[3]

DCLK[2]

DCLK[1]

CLOCKDES[2]MmcxClkIo

CLOCKDES[1]

SCCLK

Clock Source A

Clock Source B

Clock Source C

Ha_cc[18]

51

GEFE boardBE-BI-QP

Resets Scheme

GEFE

FMC HPC

GBTx

GPIO Connector A (13 user pins)

GPIO Connector B (24 user pins)

Reset

FPGA (ProAsic3)

ResetButton

VTRx RSSIPOR/PPR

ResetLogic

52

GEFE boardBE-BI-QP

FPGA Programming Scheme

GEFEJTAG

ConnectorFMC HPC

FPGA (ProAsic3)

FpgaXxxFmcDpM2c_p[0:4]_Xxx

ConnXxx

VoltageTranslator

(Vadj from/to V3p3) FmcDpM2c_p_r[0:4]

FmcDpM2c_p_r_Fpga[0:4]

Jumpers

Jumpers

Std. IOs

JTAG Prog.