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Novel Wafer-Scale Uniform Layer-by-Layer Etching Technology for Line Edge Roughness Reduction and
Surface Flattening of 3D Ge Channels
Y. Morita, T. Maeda, H. Ota, W. Mizubayashi, S. O’uchi, M. Masahara, T. Matsukawa, K. Endo
Nanoelectronics Research Institute (NeRI) AIST Japan
What's oxygen etching?
2
Oxide Growth Si + O2 SiO2
Etching 2Si + O2 2SiO
What's oxygen etching?
3
Si
O O
Si
O O O
Si
O
O Si
or Low O2 Pressure�
O O O
Si Si SiO2�
High O2 Pressure�
Etching�
Island Formation�
J. R. Engstrom and T. Engel, Phys. Rev. B 41 (1990) 1038.�
What's oxygen etching?
4
Si�
J. J. Lander and J. Morrison, J. Appl. Phys. 33 (1962) 2089.�
What's oxygen etching?
5
Oxygen Etching of Si 2Si + O2 2SiO
Oxygen Etching of Ge 2Ge + O2 2GeO
Outline • What's oxygen etching? • Background – Why 3D Ge FET?
• Objective • Measurement of O2 Etching • Electrical Characterization • Discussion • Summary
6
Background
7
Why 3D Ge FET?�
8
S D
Buried oxide Si
G
3-Dimensional transistor (Fin or nanowire-FET)�
3D channel�
Thin Channel Off-Current Reduction�
3D Si FET to 3D Ge FET
Issues in 3D Channel�
9
BOX
Ge
HM�
Resist / Hard Mask �RIE
BOX
PR�
BOX
Ge�
Damage Removal Flattening Slimming�
� Plasma Damage Free � Roughness Reduction � Channel Slimming
Objective • Can O2 etching be applicable for
nano-device fabrication?
10
Measurement of O2 Etching
11
Surface Morphology • Ge(001) AFM 2 × 2 μm
12
PO2 = 10−6 torr 640oC �
RMS 0.28 nm� RMS 0.12 nm�
O2 Etching �HF Treatment (Initial)�
Rough Step Edge Shape Etching of Step Edge
Etch Depth Measurement • Mask Rebate Technique�
13
Mask Patterning & Clean Surface Formation
O2 etching Mask light etch & AFM
Wet-cleaned Ge or Si surface SiO2 SiO2 SiO2 AFM
Ge or Si Ge or Si
Etch depth�
Ge or Si
Y. Morita, et al., Surface Science 604 (2010) 1432.�
Visualization of Etch Depth
14
Etch depth� SiO2 mask�
Ge surface�
AFM after Mask Light Etch�Air View
0.5 × 0.5 μm�
Visualization of Etch Depth�
15
AFM after Mask Light Etch�
Ge(001)
SiO2�Etch Depth�
AFM Error Image 5 × 5 μm�
Visualization of Etch Depth • Surface Cross-Sectional Profile�
16
0� 100� 200� 300�
Distance (nm)�
Depth
(nm)�
0�
1�
2�Etch depth�
Mask rebate length�
Ge(001)�
Etch Depth ~1 nm�
Summary of Etch Rate
17
Ge�Si�
10−5�
10−6�
10−7�
10−5�
10−6�
PO2 (Torr)�
500�(°C)�640�720�800�840�900�950�
~1 nm/min�
Summary of Etch Rate • Weak Temperature Dependence • Etch Rate O2 Pressure
– Supply of O2 Bottle-Neck Step
18
Ge
O O
Ge
O O O
Ge
O
O Ge
or Low O2 Pressure�
Etching�
∞�
Comparison of Etch Rate Variation�
19
Ge� Variation of Temp. ±5%� Ge�640oC ±5%�EA ~ 0.3 eV�
O2 etch�
HCl etch�Variation of Etch Rate (HCl)�
Variation of Etch Rate (O2)�
EA ~ 0 eV�
+12.2%�
-11.6%�
± ~ 0%�
O2 etch�HCl etch�
HCl Etch: Y. Bogumilowicz, et al., Semicond. Sci. Tech. 20 (2005) 127.
Uniform SOI Thinning�
20
3.6 nm
SOI
BOX 500 nm
1000 nm
SOI
Buried oxide
Si sub.
Glue
• Uniform Etching for Large Area
21
O2 Etching of 3D Channel�
Nanowire-FET by O2 slimming�
22
SOI and hard mask formation -- (a) EB lithography & RIE -- (b) Cleaning O2 Slimming -- (c) ALD HfO2 & poly-Si gate NiSi2 source/drain Dopant implantation & activation
BOX BOX BOX SOI SiNW
SiO2 Hard Mask HM HM
(a) (b) (c)
SiNW
SiNW direction: [110]
23
(b)
3.9 nm BOX
SiNW
HfO2 HM
(a)
50 nm BOX
SOI
HfO2 HM
Without O2 Slimming O2 Slimming
50 nm-width SOI is etched from both sides.
PO2 = 1 × 10−5 torr 900oC 3.9 × 9.0 nm�
Nanowire-FET by O2 slimming�Channel Cross-Section�
LER Reduction
24
w/o O2 etch O2 etch Ge O2 etch Si�
Ra (nm)� 3σ (nm)�2.26� 7.84 w/o O2 etch�1.1� 3.31�O2 etch Ge�
0.52 1.94�O2 etch Si�
I-V of O2-Slimmed Si NW FET
25
S D
Gate
NiSi2 Source NiSi2
Drain
360 nm
Lc ~360 nm WNW ~8 nm
Discussion
26
Roughness Reduction • Higher Temperature Smaller Roughness�
27
N2 Anneal�
O2 Etch�
RT�
w/o Anneal�Ge(001)�
Etch Depth ~1 nm�
Roughness Reduction • O2 etch can selectively reduce roughness. – AFM 2 × 2 μm�
28
Ge(001) w/o anneal� PO2 = 10−6 torr, 500oC ~ 1 nm Etching �
RMS 0.14 nm
O2 Etching �
N2 Anneal�
PN2 = 0.1 torr, 500oC �
RMS 0.18 nm�RMS 0.28 nm�
Summary • Novel O2 Etching Technology for 3D Ge
Channel – Uniform Etch Rate for Large Size Wafer – Atomically Flattened Surface – No Plasma Damage – Slimming and Smoothing for 3D Channels
• Enhancement of Device Performance
• Applicable for Future Channels – Vertical Nanowire – V-Groove etc..
29