MX29GL128E DATASHEET - MXIC

1P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

MX29GL128E DATASHEET

2P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

FEATURES

GENERAL FEATURES• PowerSupplyOperation -2.7to3.6voltforread,erase,andprogramoperations -MX29GL128EH/L:VI/O=VCC=2.7V~3.6V,VI/OvoltagemusttightwithVCC -MX29GL128EU/D:VI/O=1.65V~3.6VforInput/Output• Byte/Wordmodeswitchable -16,777,216x8/8,388,608x16• 64KW/128KBuniformsectorarchitecture -128equalsectors• 16-byte/8-wordpagereadbuffer• 64-byte/32-wordwritebuffer• Extra128-wordsectorforsecurity -Featuresfactorylockedandidentifiable,andcustomerlockable• Advancedsectorprotectionfunction(SolidandPasswordProtect)• Latch-upprotectedto100mAfrom-1Vto1.5xVcc• LowVccwriteinhibit:Vcc≤VLKO• CompatiblewithJEDECstandard -PinoutandsoftwarecompatibletosinglepowersupplyFlash• Deeppowerdownmode

PERFORMANCE• HighPerformance -Fastaccesstime: -MX29GL128EH/L:90ns(VCC=2.7~3.6V) -MX29GL128EU/D:110ns(VCC=2.7~3.6V,VI/O=1.65VtoVcc) -Pageaccesstime: -MX29GL128EH/L:25ns -MX29GL128EU/D:30ns -Fastprogramtime:10us/word -Fasterasetime:0.5s/sector• LowPowerConsumption -Lowactivereadcurrent:10mA(typical)at5MHz -Lowstandbycurrent:20uA(typical)• Typical100,000erase/programcycle• 20yearsdataretention

SOFTWARE FEATURES• Program/EraseSuspend&Program/EraseResume -Suspendssector eraseoperation to readdata fromorprogramdata toanother sectorwhich is not beingerased

-Suspendssectorprogramoperationtoreaddatafromanothersectorwhichisnotbeingprogram• StatusReply -Data#Polling&Togglebitsprovidedetectionofprogramanderaseoperationcompletion• SupportCommonFlashInterface(CFI)

HARDWARE FEATURES• Ready/Busy#(RY/BY#)Output -Providesahardwaremethodofdetectingprogramanderaseoperationcompletion• HardwareReset(RESET#)Input -Providesahardwaremethodtoresettheinternalstatemachinetoreadmode• WP#/ACCinputpin -Hardwarewriteprotectpin/Providesacceleratedprogramcapability

PACKAGE• 56-PinTSOP• 64-BallFBGA(10mmx13mm)• 64-BallLFBGA(11mmx13mm)• 70-PinSSOP• All devices are RoHS Compliant and Halogen-free

SINGLE VOLTAGE 3V ONLY FLASH MEMORY

3P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

PIN CONFIGURATION

56 TSOP

64 FBGA/64 LFBGA

A B C D E F G H

NC8

7

6

5

4

3

2

1

A22 NC VIO NCNC NC

A13 A12 A14 A15 A16 BYTE# Q15/A-1

A9 A8 A10 A11 Q7 Q14 Q13 Q6

WE# A21 A19RES-ET#

Q5 Q12 VCC Q4

WP#/ACC

A18 A20 Q2 Q10 Q11RY/BY#

A7 A17 A6 A5 Q0 Q8 Q9 Q1

Q3

A3 A4 A2 A1 A0 CE# OE# GND

GND

GND

NC NC NC NC NC VIO NC NC

NCA22A15A14A13A12A11A10

A9A8

A19A20

WE#RESET#

A21WP#/ACC

RY/BY#A18A17

A7A6A5A4A3A2A1NCNC

12345678910111213141516171819202122232425262728

NCNCA16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCQ11Q3Q10Q2Q9Q1Q8Q0OE#GNDCE#A0NCVI/O

56555453525150494847464544434241403938373635343332313029

4P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

70 SSOP

PIN DESCRIPTIONSYMBOL PIN NAMEA0~A22 AddressInputQ0~Q14 DataInputs/OutputsQ15/A-1 Q15(WordMode)/LSBaddr(ByteMode)CE# ChipEnableInputWE# WriteEnableInputOE# OutputEnableInput

RESET# HardwareResetPin,ActiveLow

WP#/ACC* HardwareWriteProtect/ProgrammingAccelerationinput

RY/BY# Ready/BusyOutputBYTE# Selects8bitsor16bitsmodeVCC +3.0VsinglepowersupplyGND DeviceGroundNC PinNotConnectedInternallyVI/O PowerSupplyforInput/Output

LOGIC SYMBOL

16 or 8Q0-Q15

(A-1)

RY/BY#

A0-A22

CE#

OE#

WE#

RESET#

WP#/ACC

BYTE#

VI/O

23

234567891011121314151617181920212223242526272829303132333435

7069686766656463626160595857565554535251504948474645444342414039383736

A20A21A18A17OE#

A6A5A4A3A2A1A0

BYTE#GND

NCNCNCNCNCNC

GNDNC

CE#GND

NCA7Q0Q8Q1Q9Q2

Q10Q3

Q11NC

A19A8A15A10A11A12A13A14A9A16WE#NCA22NCGNDNCNCWP#/ACCNCNCNCGNDRESET#GNDGNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCVCC

Notes:1.WP#/ACChasinternalpullup.2.ForMX29GL128EH/LVI/OvoltagemusttightwithVCC.VI/O=VCC=2.7V~3.6V.

5P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

BLOCK DIAGRAM

CONTROLINPUTLOGIC

PROGRAM/ERASE

HIGH VOLTAGE

WRITE

STATE

MACHINE

(WSM)

STATE

REGISTERFLASHARRAY

X-D

EC

OD

ER

ADDRESS

LATCH

AND

BUFFER Y-PASS GATE

Y-DE

CO

DE

R

ARRAYSOURCE

HVCOMMANDDATA

DECODER

COMMAND

DATA LATCH

I/O BUFFER

PGMDATA

HV

PROGRAMDATA LATCH

SENSEAMPLIFIER

Q0-Q15/A-1

A0-AM

AM: MSB address

CE#OE#WE#

RESET#BYTE#

WP#/ACC

6P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

BLOCK DIAGRAM DESCRIPTIONTheblock diagramillustratesasimplifiedarchitectureofthisdevice.Eachblockintheblockdiagramrepresentsoneormorecircuitmodulesintherealchipusedtoaccess,erase,program,andreadthememoryarray.

The"CONTROLINPUTLOGIC"blockreceives inputpinsCE#,OE#,WE#,RESET#,BYTE#,andWP#/ACC.Itcreatesinternaltimingcontrolsignalsaccordingtotheinputpinsandoutputstothe"ADDRESSLATCHANDBUFFER"to latchtheexternaladdresspinsA0-AM(A22).Theinternaladdressesareoutput fromthisblocktothemainarrayanddecoderscomposedof"X-DECODER","Y-DECODER","Y-PASSGATE",AND"FLASHAR-RAY".TheX-DECODERdecodestheword-linesoftheflasharray,whiletheY-DECODERdecodesthebit-linesoftheflasharray.Thebitlinesareelectricallyconnectedtothe"SENSEAMPLIFIER"and"PGMDATAHV"se-lectivelythroughtheY-PASSGATES.SENSEAMPLIFIERSareusedtoreadoutthecontentsoftheflashmemo-ry,whilethe"PGMDATAHV"blockisusedtoselectivelydeliverhighpowertobit-linesduringprogramming.The"I/OBUFFER"controlstheinputandoutputontheQ0-Q15/A-1pads.Duringreadoperation,theI/OBUFFERreceivesdata fromSENSEAMPLIFIERSanddrives theoutputpadsaccordingly. In the lastcycleofprogramcommand,theI/OBUFFERtransmitsthedataonQ0-Q15/A-1to"PROGRAMDATALATCH",whichcontrolsthehighpowerdriversin"PGMDATAHV"toselectivelyprogramthebitsinawordorbyteaccordingtotheuserin-putpattern.

The"PROGRAM/ERASEHIGHVOLTAGE"blockcomprisesthecircuitstogenerateanddeliverthenecessaryhighvoltagetotheX-DECODER,FLASHARRAY,and"PGMDATAHV"blocks.Thelogiccontrolmodulecom-prisesof the "WRITESTATEMACHINE,WSM", "STATEREGISTER", "COMMANDDATADECODER", and"COMMANDDATALATCH".WhentheuserissuesacommandbytogglingWE#,thecommandonQ0-Q15/A-1is latched in theCOMMANDDATALATCHand isdecodedby theCOMMANDDATADECODER.TheSTATEREGISTER receives thecommandand records thecurrentstateof thedevice.TheWSM implements the in-ternalalgorithmsforprogramoreraseaccordingtothecurrentcommandstatebycontrollingeachblockintheblockdiagram.

ARRAY ARCHITECTUREThemainflashmemoryarraycanbeorganizedasBytemode(x8)orWordmode(x16).Thedetailsofthead-dressrangesandthecorrespondingsectoraddressesareshowninTable 1.

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MX29GL128E

Table 1: MX29GL128E SECTOR GROUP ARCHITECTURE Sector Size

Sector Sector AddressA22-A16

(x16)Address RangeKbytes Kwords

128 64 SA0 0000000 000000h-00FFFFh128 64 SA1 0000001 010000h-01FFFFh128 64 SA2 0000010 020000h-02FFFFh128 64 SA3 0000011 030000h-03FFFFh128 64 SA4 0000100 040000h-04FFFFh128 64 SA5 0000101 050000h-05FFFFh128 64 SA6 0000110 060000h-06FFFFh128 64 SA7 0000111 070000h-07FFFFh128 64 SA8 0001000 080000h-08FFFFh128 64 SA9 0001001 090000h-09FFFFh128 64 SA10 0001010 0A0000h-0AFFFFh128 64 SA11 0001011 0B0000h-0BFFFFh128 64 SA12 0001100 0C0000h-0CFFFFh128 64 SA13 0001101 0D0000h-0DFFFFh128 64 SA14 0001110 0E0000h-0EFFFFh128 64 SA15 0001111 0F0000h-0FFFFFh128 64 SA16 0010000 100000h-10FFFFh128 64 SA17 0010001 110000h-11FFFFh128 64 SA18 0010010 120000h-12FFFFh128 64 SA19 0010011 130000h-13FFFFh128 64 SA20 0010100 140000h-14FFFFh128 64 SA21 0010101 150000h-15FFFFh128 64 SA22 0010110 160000h-16FFFFh128 64 SA23 0010111 170000h-17FFFFh128 64 SA24 0011000 180000h-18FFFFh128 64 SA25 0011001 190000h-19FFFFh128 64 SA26 0011010 1A0000h-1AFFFFh128 64 SA27 0011011 1B0000h-1BFFFFh128 64 SA28 0011100 1C0000h-1CFFFFh128 64 SA29 0011101 1D0000h-1DFFFFh128 64 SA30 0011110 1E0000h-1EFFFFh128 64 SA31 0011111 1F0000h-1FFFFFh128 64 SA32 0100000 200000h-20FFFFh128 64 SA33 0100001 210000h-21FFFFh128 64 SA34 0100010 220000h-22FFFFh128 64 SA35 0100011 230000h-23FFFFh128 64 SA36 0100100 240000h-24FFFFh128 64 SA37 0100101 250000h-25FFFFh128 64 SA38 0100110 260000h-26FFFFh128 64 SA39 0100111 270000h-27FFFFh128 64 SA40 0101000 280000h-28FFFFh128 64 SA41 0101001 290000h-29FFFFh

BLOCK STRUCTURE

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MX29GL128E

Sector SizeSector Sector Address

A22-A16(x16)

Address RangeKbytes Kwords128 64 SA42 0101010 2A0000h-2AFFFFh128 64 SA43 0101011 2B0000h-2BFFFFh128 64 SA44 0101100 2C0000h-2CFFFFh128 64 SA45 0101101 2D0000h-2DFFFFh128 64 SA46 0101110 2E0000h-2EFFFFh128 64 SA47 0101111 2F0000h-2FFFFFh128 64 SA48 0110000 300000h-30FFFFh128 64 SA49 0110001 310000h-31FFFFh128 64 SA50 0110010 320000h-32FFFFh128 64 SA51 0110011 330000h-33FFFFh128 64 SA52 0110100 340000h-34FFFFh128 64 SA53 0110101 350000h-35FFFFh128 64 SA54 0110110 360000h-36FFFFh128 64 SA55 0110111 370000h-37FFFFh128 64 SA56 0111000 380000h-38FFFFh128 64 SA57 0111001 390000h-39FFFFh128 64 SA58 0111010 3A0000h-3AFFFFh128 64 SA59 0111011 3B0000h-3BFFFFh128 64 SA60 0111100 3C0000h-3CFFFFh128 64 SA61 0111101 3D0000h-3DFFFFh128 64 SA62 0111110 3E0000h-3EFFFFh128 64 SA63 0111111 3F0000h-3FFFFFh128 64 SA64 1000000 400000h-40FFFFh128 64 SA65 1000001 410000h-41FFFFh128 64 SA66 1000010 420000h-42FFFFh128 64 SA67 1000011 430000h-43FFFFh128 64 SA68 1000100 440000h-44FFFFh128 64 SA69 1000101 450000h-45FFFFh128 64 SA70 1000110 460000h-46FFFFh128 64 SA71 1000111 470000h-47FFFFh128 64 SA72 1001000 480000h-48FFFFh128 64 SA73 1001001 490000h-49FFFFh128 64 SA74 1001010 4A0000h-4AFFFFh128 64 SA75 1001011 4B0000h-4BFFFFh128 64 SA76 1001100 4C0000h-4CFFFFh128 64 SA77 1001101 4D0000h-4DFFFFh128 64 SA78 1001110 4E0000h-4EFFFFh128 64 SA79 1001111 4F0000h-4FFFFFh128 64 SA80 1010000 500000h-50FFFFh128 64 SA81 1010001 510000h-51FFFFh128 64 SA82 1010010 520000h-52FFFFh128 64 SA83 1010011 530000h-53FFFFh128 64 SA84 1010100 540000h-54FFFFh

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MX29GL128E

Sector SizeSector Sector Address

A22-A16(x16)

Address RangeKbytes Kwords128 64 SA85 1010101 550000h-55FFFFh128 64 SA86 1010110 560000h-56FFFFh128 64 SA87 1010111 570000h-57FFFFh128 64 SA88 1011000 580000h-58FFFFh128 64 SA89 1011001 590000h-59FFFFh128 64 SA90 1011010 5A0000h-5AFFFFh128 64 SA91 1011011 5B0000h-5BFFFFh128 64 SA92 1011100 5C0000h-5CFFFFh128 64 SA93 1011101 5D0000h-5DFFFFh128 64 SA94 1011110 5E0000h-5EFFFFh128 64 SA95 1011111 5F0000h-5FFFFFh128 64 SA96 1100000 600000h-60FFFFh128 64 SA97 1100001 610000h-61FFFFh128 64 SA98 1100010 620000h-62FFFFh128 64 SA99 1100011 630000h-63FFFFh128 64 SA100 1100100 640000h-64FFFFh128 64 SA101 1100101 650000h-65FFFFh128 64 SA102 1100110 660000h-66FFFFh128 64 SA103 1100111 670000h-67FFFFh128 64 SA104 1101000 680000h-68FFFFh128 64 SA105 1101001 690000h-69FFFFh128 64 SA106 1101010 6A0000h-6AFFFFh128 64 SA107 1101011 6B0000h-6BFFFFh128 64 SA108 1101100 6C0000h-6CFFFFh128 64 SA109 1101101 6D0000h-6DFFFFh128 64 SA110 1101110 6E0000h-6EFFFFh128 64 SA111 1101111 6F0000h-6FFFFFh128 64 SA112 1110000 700000h-70FFFFh128 64 SA113 1110001 710000h-71FFFFh128 64 SA114 1110010 720000h-72FFFFh128 64 SA115 1110011 730000h-73FFFFh128 64 SA116 1110100 740000h-74FFFFh128 64 SA117 1110101 750000h-75FFFFh128 64 SA118 1110110 760000h-76FFFFh128 64 SA119 1110111 770000h-77FFFFh128 64 SA120 1111000 780000h-78FFFFh128 64 SA121 1111001 790000h-79FFFFh128 64 SA122 1111010 7A0000h-7AFFFFh128 64 SA123 1111011 7B0000h-7BFFFFh128 64 SA124 1111100 7C0000h-7CFFFFh128 64 SA125 1111101 7D0000h-7DFFFFh128 64 SA126 1111110 7E0000h-7EFFFFh128 64 SA127 1111111 7F0000h-7FFFFFh

10P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Table 2-1. BUS OPERATION

Notes:1.ThefirstorlastsectorwasprotectedifWP#/ACC=Vil.2. WhenWP#/ACC=Vih,theprotectionconditionsoftheoutmostsectordependsonpreviousprotectioncondi-

tions.Refertotheadvancedprotectfeature.3. Q0~Q15areinput(DIN)oroutput(DOUT)pinsaccordingtotherequestsofcommandsequence,sectorpro-

tection,ordatapollingalgorithm.4. InWordMode(Byte#=Vih),theaddressesareAMtoA0,AM:MSBofaddress. InByteMode(Byte#=Vil),theaddressesareAMtoA-1(Q15),AM:MSBofaddress.

Mode Select RE- SET# CE# WE# OE# Address

(Note4)

Data I/O

Q7~Q0

Byte#WP#/ ACC

Vil VihData (I/O) Q15~Q8

DeviceReset L X X X X HighZ HighZ HighZ L/H

StandbyMode Vcc±0.3V

Vcc±0.3V X X X HighZ HighZ HighZ H

OutputDisable H L H H X HighZ HighZ HighZ L/H

ReadMode H L H L AIN DOUT Q8-Q14=HighZ,Q15=A-1

DOUT L/H

Write H L L H AIN DIN DIN Note1,2

AccelerateProgram H L L H AIN DIN DIN Vhv

BUS OPERATION

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MX29GL128E

Notes:1.Sectorunprotectedcode:00h.Sectorprotectedcode:01h.2.Factorylockedcode: WP#protectshighaddresssector:99h. WP#protectslowaddresssector:89hFactoryunlockedcode: WP#protectshighaddresssector:19h. WP#protectslowaddresssector:09h3.AM:MSBofaddress.

Table 2-2. BUS OPERATION

ItemControl Input AM

to A12

A11 to

A10A9

A8 to A7

A6A5 to A4

A3 to A2

A1 A0 Q7 ~ Q0 Q15 ~ Q8CE# WE# OE#

SectorLockStatusVerification L H L SA X Vhv X L X L H L

01hor00h

(Note1)X

ReadSiliconIDManufacturerCode

L H L X X Vhv X L X L L L C2H X

ReadSiliconID--MX29GL128E

Cycle1 L H L X X Vhv X L X L L H 7EH 22H(Word),XXH(Byte)

Cycle2 L H L X X Vhv X L X H H L 21H 22H(Word),XXH(Byte)

Cycle3 L H L X X Vhv X L X H H H 01H 22H(Word),XXH(Byte)

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MX29GL128E

FUNCTIONAL OPERATION DESCRIPTION

READ OPERATIONToperformareadoperation,thesystemaddressesthedesiredmemoryarrayorstatusregisterlocationbypro-viding itsaddressontheaddresspinsandsimultaneouslyenablingthechipbydrivingCE#&OE#LOW,andWE#HIGH.AftertheTceandToetimingrequirementshavebeenmet,thesystemcanreadthecontentsoftheaddressedlocationbyreadingtheData(I/O)pins.IfeithertheCE#orOE#isheldHIGH,theoutputswillremaintri-statedandnodatawillappearontheoutputpins.

PAGE READ

ThisdeviceisabletoconductMXICMaskROMcompatiblehighperformancepageread.Pagesizeis16bytesor8words.ThehigheraddressAmax~A3select the certainpage,whileA2~A0 forwordmode,A2~A-1 forbytemodeselecttheparticularwordorbyteinapage.ThepageaccesstimeisTaaorTce,followingbyTpafortherestofthepagereadtime.WhenCE#toggles,accesstimeisTaaorTce.Pagemodecanbeturnedonbykeeping"page-readaddress"constantandchangingthe"intra-readpage"addresses.

WRITE OPERATION

Toperformawriteoperation,thesystemprovidesthedesiredaddressontheaddresspins,enablesthechipbyassertingCE#LOW,anddisablestheData(I/O)pinsbyholdingOE#HIGH.ThesystemthenplacesdatatobewrittenontheData(I/O)pinsandpulsesWE#LOW.ThedevicecapturestheaddressinformationonthefallingedgeofWE#andthedataontherisingedgeofWE#.Toseeanexample,pleaserefertothetimingdiagraminFigure 4.Thesystemisnotallowedtowriteinvalidcommands(commandsnotdefinedinthisdatasheet)tothedevice.Writinganinvalidcommandmayputthedeviceinanundefinedstate.

DEVICE RESET

DrivingtheRESET#pinLOWforaperiodofTrpormorewillreturnthedevicetoReadmode.Ifthedeviceisinthemiddleofaprogramoreraseoperation,theresetoperationwilltakeatmostaperiodofTready1beforethedevicereturnstoReadmode.UntilthedevicedoesreturnstoReadmode,theRY/BY#pinwillremainLow(BusyStatus).

WhentheRESET#pinisheldatGND±0.3V,thedeviceonlyconsumesstandby(Isbr)current.However,thede-vicedrawslargercurrentiftheRESET#pinisheldatavoltagegreaterthanGND+0.3VandlessthanorequaltoVil.

ItisrecommendedtotiethesystemresetsignaltotheRESET#pinoftheflashmemory.Thisallowsthedevicetoberesetwith thesystemandputs it inastatewhere thesystemcan immediatelybeginreadingbootcodefromit.

STANDBY MODE

ThedeviceentersStandbymodewhenevertheRESET#andCE#pinsarebothheldHighexceptintheembed-dedmode.Whileinthismode,WE#andOE#willbeignored,allDataOutputpinswillbeinahighimpedancestate,andthedevicewilldrawminimal(Isb)current.

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MX29GL128E

FUNCTIONAL OPERATION DESCRIPTION (cont'd)

OUTPUT DISABLE

Whileinactivemode(RESET#HIGHandCE#LOW),theOE#pincontrolsthestateoftheoutputpins.IfOE#isheldHIGH,allData(I/O)pinswillremaintri-stated.IfheldLOW,theByteorWordData(I/O)pinswilldrivedata.

BYTE/WORD SELECTION

TheBYTE#inputpinisusedtoselecttheorganizationofthearraydataandhowthedataisinput/outputontheData(I/O)pins.IftheBYTE#pinisheldHIGH,Wordmodewillbeselectedandall16datalines(Q0toQ15)willbeactive.

IfBYTE#isforcedLOW,BytemodewillbeactiveandonlydatalinesQ0toQ7willbeactive.DatalinesQ8toQ14willremaininahighimpedancestateandQ15becomestheA-1addressinputpin.

HARDWARE WRITE PROTECT

BydrivingtheWP#/ACCpinLOW.Thehighestor lowestwasprotectedfromallerase/programoperations. IfWP#/ACCisheldHIGH(VihtoVCC),thesesectorsreverttotheirpreviouslyprotected/unprotectedstatus.

ACCELERATED PROGRAMMING OPERATION

Byapplyinghighvoltage(Vhv)totheWP#/ACCpin,thedevicewillentertheAcceleratedProgrammingmode.Thismodepermitsthesystemtoskipthenormalcommandunlocksequencesandprogrambyte/wordlocationsdirectly.Duringacceleratedprogramming,thecurrentdrawnfromtheWP#/ACCpinisnomorethanICP1.

WRITE BUFFER PROGRAMMING OPERATION

Programs64bytes/32words inaprogrammingoperation.To trigger theWriteBufferProgramming,startby thefirsttwounlockcycles,thenthirdcyclewritestheWriteBufferLoadcommandatthedestinedprogrammingSec-torAddress.Theforthcyclewritesthe"wordlocationssubtractone"number.

Followingaboveoperations,systemstartstowritetheminglingofaddressanddata.Aftertheprogrammingofthefirstaddressordata,the"write-buffer-page"isselected.Thefollowingdatashouldbewithintheabovemen-tionedpage.

The"write-buffer-page"isselectedbychoosingaddressAmax-A5.

"Write-Buffer-Page"addresshastobethesameforalladdress/datawriteintothewritebuffer.Ifnot,operationwillABORT.

ToprogramthecontentofthewritebufferpagethiscommandmustbefollowedbyawritetobufferProgramcon-firmcommand.

Theoperationofwrite-buffercanbesuspendedorresumedbythestandardcommands,oncethewritebufferprogrammingoperationisfinished,it’llreturntonormalREADmode.

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MX29GL128E


WRITE BUFFER PROGRAMMING OPERATION (cont'd)

ABORTwillbeexecutedfortheWriteBufferProgrammingSequenceiffollowingconditionoccurs:• Thevalueloadedisbiggerthanthepagebuffersizeduring"NumberofLocationstoProgram"• AddresswritteninasectorisnotthesameastheoneassignedduringtheWrite-Buffer-Loadcommand.• Address/Datapairwritten toadifferentwrite-buffer-page than theoneassignedby the "StartingAddress"

duringthe"writebufferdataloading"operation.• Writingnot"ConfirmCommand"aftertheassignednumberof"dataload"cycles.

AtWriteBufferAbortmode,thestatusregisterwillbeQ1=1,Q7=DATA#(lastaddresswritten),Q6=toggle.AWrite-to-Buffer-AbortResetcommandsequencehastobewrittentoresetthedeviceforthenextoperation.

Writebufferprogrammingcanbeconductedinanysequence.HowevertheCFIfunctions,autoselect,SecuredSiliconsectorarenotfunctionalwhenprogramoperationisinprogress.Multiplewritebufferprogrammingopera-tionsonthesamewritebufferaddressrangewithoutinterveningerasesisavailable.Anybitinawritebufferad-dressrangecan’tbeprogrammedfrom0backto1.

SECTOR PROTECT OPERATION

Thedeviceprovidesuserprogrammableprotectionoperationsforselectedsectors.PleaserefertoTable 1whichshowallSectorassignments.

Duringtheprotectionoperation,thesectoraddressofanysectormaybeusedtospecifytheSectorbeingpro-tected.

AUTOMATIC SELECT BUS OPERATIONS

ThefollowingfivebusoperationsrequireA9toberaisedtoVhv.PleaseseeAUTOMATICSELECTCOMMANDSEQUENCEintheCOMMANDOPERATIONSsectionfordetailsofequivalentcommandoperationsthatdonotrequiretheuseofVhv.

SECTOR LOCK STATUS VERIFICATION

Todeterminetheprotectedstateofanysectorusingbusoperations,thesystemperformsaREADOPERATIONwithA9raisedtoVhv,thesectoraddressappliedtoaddresspinsA22toA12,addresspinsA6,A3,A2&A0heldLOW,andaddresspinA1heldHIGH.IfdatabitQ0isLOW,thesectorisnotprotected,andifQ0isHIGH,thesectorisprotected.

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MX29GL128E


READ SILICON ID MANUFACTURER CODE

Todetermine theSilicon IDManufacturerCode, thesystemperformsaREADOPERATIONwithA9 raised toVhvandaddresspinsA6,A3,A2,A1,&A0heldLOW.TheMacronixIDcodeofC2hshouldbepresentondatabitsQ7toQ0.

READ INDICATOR BIT (Q7) FOR SECURITY SECTOR

TodetermineiftheSecuritySectorhasbeenlockedatthefactory,thesystemperformsaREADOPERATIONwithA9raisedtoVhv,addresspinA6,A3&A2heldLOW,andaddresspinsA1&A0heldHIGH.IftheSecuritySectorhasbeenlockedatthefactory,thecode99h(H)/89h(L)willbepresentondatabitsQ7toQ0.Otherwise,thefactoryunlockedcodeof19h(H)/09h(L)willbepresent.

INHERENT DATA PROTECTION

Toavoidaccidentalerasureorprogrammingofthedevice,thedeviceisautomaticallyresettoReadmodeduringpowerup.Additionally,thefollowingdesignfeaturesprotectthedevicefromunintendeddatacorruption.

COMMAND COMPLETION

Onlyafter thesuccessfulcompletionof thespecifiedcommandsetswill thedevicebegin itseraseorprogramoperation.Thefailureinobservingvalidcommandsetswillresultinthememoryreturningtoreadmode.

LOW VCC WRITE INHIBIT

Thedevice refuses to accept anywrite commandwhenVcc is less thanVLKO.This prevents data fromspuriously beingalteredduringpower-up, power-down, or temporary power interruptions.Thedeviceautomaticallyresets itselfwhenVcc is lower thanVLKOandwritecyclesare ignoreduntilVcc isgreater thanVLKO.ThesystemmustprovidepropersignalsoncontrolpinsafterVccrisesaboveVLKOtoavoidunintentionalprogramoreraseoperations.

WRITE PULSE "GLITCH" PROTECTION

CE#,WE#,OE#pulsesshorter than5nsaretreatedasglitchesandwillnotberegardedasaneffectivewritecycle.

LOGICAL INHIBIT

AvalidwritecyclerequiresbothCE#andWE#atVilwithOE#atVih.WritecycleisignoredwheneitherCE#atVih,WE#atVih,orOE#atVil.

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MX29GL128E


POWER-UP SEQUENCE

Uponpowerup, thedevice isplaced inReadmode.Furthermore,programoreraseoperationwillbeginonlyaftersuccessfulcompletionofspecifiedcommandsequences.

POWER-UP WRITE INHIBIT

WhenWE#,CE#isheldatVilandOE#isheldatVihduringpowerup,thedeviceignoresthefirstcommandontherisingedgeofWE#.

POWER SUPPLY DECOUPLING

A0.1uFcapacitorshouldbeconnectedbetweentheVccandGNDtoreducethenoiseeffect.

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COMMAND OPERATIONS

READING THE MEMORY ARRAYReadmodeisthedefaultstateafterpoweruporafteraresetoperation.Toperformareadoperation,pleasere-fertoREADOPERATIONintheBUSOPERATIONSsectionabove.

If thedevice receivesanEraseSuspend commandwhile in theSectorErase state, theeraseoperationwillpause(afteratimedelaynotexceeding20us)andthedevicewillenterErase-SuspendedReadmode.WhileintheErase-SuspendedReadmode,datacanbeprogrammedorreadfromanysectornotbeingerased.Readingfromaddresseswithinsector(s)beingerasedwillonlyreturnthecontentsofthestatusregister,whichisinfacthowthecurrentstatusofthedevicecanbedetermined.

If a programcommand is issued to any inactive (not currently beingerased) sector duringErase-SuspendedReadmode,thedevicewillperformtheprogramoperationandautomaticallyreturntoErase-SuspendedReadmodeaftertheprogramoperationcompletessuccessfully.

WhileinErase-SuspendedReadmode,anEraseResumecommandmustbeissuedbythesystemtoreactivatetheeraseoperation. Theeraseoperationwill resume fromwhere iswassuspendedandwill continueuntil itcompletessuccessfullyoranotherEraseSuspendcommandisreceived.

Afterthememorydevicecompletesanembeddedoperation(automaticChipErase,SectorErase,orProgram)successfully,itwillautomaticallyreturntoReadmodeanddatacanbereadfromanyaddressinthearray.Iftheembeddedoperationfailstocomplete,asindicatedbystatusregisterbitQ5(exceedstimelimitflag)goingHIGHduringtheoperations,thesystemmustperformaresetoperationtoreturnthedevicetoReadmode.

ThereareseveralstatesthatrequirearesetoperationtoreturntoReadmode:

1.Aprogramorerasefailure--indicatedbystatusregisterbitQ5goingHIGHduringtheoperation.Failuresdur-ingeitherofthesestateswillpreventthedevicefromautomaticallyreturningtoReadmode.

2.ThedeviceisinAutoSelectmodeorCFImode.Thesetwostatesremainactiveuntiltheyareterminatedbyaresetoperation.

Inthetwosituationsabove, ifaresetoperation(eitherhardwareresetorsoftwareresetcommand) isnotper-formed,thedevicewillnotreturntoReadmodeandthesystemwillnotbeabletoreadarraydata.

AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY

Thedeviceprovides theuser theability to program thememoryarray inBytemodeorWordmode.As longas theusersenters thecorrectcycle defined in theTable 3 (including2unlock cyclesand theA0Hprogramcommand),anybyteorworddataprovidedonthedata linesby thesystemwillautomaticallybeprogrammedintothearrayatthespecifiedlocation.

Aftertheprogramcommandsequencehasbeenexecuted,theinternalwritestatemachine(WSM)automaticallyexecutesthealgorithmsandtimingsnecessaryforprogrammingandverification,whichincludesgeneratingsuit-ableprogrampulses,checkingcell thresholdvoltagemargins,andrepeatingtheprogrampulse ifanycellsdonotpassverificationorhavelowmargins.Theinternalcontrollerprotectscellsthatdopassverificationandmar-gintestsfrombeingover-programmedbyinhibitingfurtherprogrampulsestothesepassingcellsasweakercellscontinuetobeprogrammed.

WiththeinternalWSMautomaticallycontrollingtheprogrammingprocess,theuseronlyneedstoenterthepro-gramcommandanddataonce.

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COMMAND OPERATIONS (cont'd)

AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY (cont'd)

Programmingwillonlychangethebitstatusfrom"1"to"0".Itisnotpossibletochangethebitstatusfrom"0"to"1"byprogramming.Thiscanonlybedonebyaneraseoperation.Furthermore,theinternalwriteverificationonlychecksanddetectserrorsincaseswherea"1"isnotsuccessfullyprogrammedto"0".

Anycommandswrittentothedeviceduringprogrammingwillbeignoredexcepthardwareresetorprogramsus-pend.Hardwareresetwillterminatetheprogramoperationafteraperiodoftimenomorethan10us.Whentheembeddedprogramalgorithmiscompleteortheprogramoperationisterminatedbyahardwarereset,thede-vicewillreturntoReadmode.Programsuspendready,thedevicewillenterprogramsuspendreadmode.

Aftertheembeddedprogramoperationhasbegun,theusercancheckforcompletionbyreadingthefollowingbitsinthestatusregister:

Note: RY/BY#isanopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.

ERASING THE MEMORY ARRAY

Thereare two typesoferaseoperationsperformedon thememoryarray--SectorEraseandChipErase. IntheSectorEraseoperation,oneormoreselectedsectorsmaybeerasedsimultaneously. In theChipEraseoperation,thecompletememoryarrayiserasedexceptforanyprotectedsectors.MoredetailsoftheprotectedsectorsareexplainedinsectionAdvanced Sector Protection/Un-protection.

SECTOR ERASE

Thesectoreraseoperation isusedtocleardatawithinasectorbyreturningallof itsmemory locationstothe"1"state.Itrequiressixcommandcyclestoinitiatetheeraseoperation.Thefirsttwocyclesare"unlockcycles",thethird isaconfigurationcycle, thefourthandfiftharealso"unlockcycles",andthesixthcycle istheSectorErasecommand.Afterthesectorerasecommandsequencehasbeenissued,aninternal50ustime-outcounterisstarted.Untilthiscounterreacheszero,additionalsectoraddressesandSectorErasecommandsmaybeis-suedthusallowingmultiplesectorstobeselectedanderasedsimultaneously.Afterthe50ustime-outcounterhasexpired,nonewcommandswillbeacceptedandtheembeddedsectoreraseoperationwillbegin.Note that the 50us timer-out counter is restarted after every erase command sequence. IftheuserentersanycommandotherthanSectorEraseorEraseSuspendduringthetime-outperiod,theeraseoperationwillabortandthede-vicewillreturntoReadmode.

Aftertheembeddedsectoreraseoperationbegins,allcommandsexceptEraseSuspendwillbeignored.TheonlywaytointerrupttheoperationiswithanEraseSuspendcommandorwithahardwarereset.ThehardwareresetwillcompletelyaborttheoperationandreturnthedevicetoReadmode.

Status Q7*1 Q6*1 Q5 Q1 RY/BY# (Note)Inprogress Q7# Toggling 0 0 0

Exceedtimelimit Q7# Toggling 1 N/A 0

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SECTOR ERASE (cont'd)

Thesystemcandeterminethestatusoftheembeddedsectoreraseoperationbythefollowingmethods:

CHIP ERASE

TheChipEraseoperationisusederaseallthedatawithinthememoryarray.Allmemorycellscontaininga"0"willbereturnedtotheerasedstateof"1".Thisoperationrequires6writecyclestoinitiatetheaction.Thefirsttwocyclesare"unlock"cycles,thethirdisaconfigurationcycle,thefourthandfiftharealso"unlock"cycles,andthesixthcycleinitiatesthechiperaseoperation.

During thechiperaseoperation,noothersoftwarecommandswillbeaccepted,but ifahardware reset is re-ceivedortheworkingvoltageistoolow,thatchiperasewillbeterminated.AfterChipErase,thechipwillauto-maticallyreturntoReadmode.

Thesystemcandeterminethestatusoftheembeddedchiperaseoperationbythefollowingmethods:

*1:RY/BY#isopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.

Notes:1.TheQ3statusbitisthe50ustime-outindicator.WhenQ3=0,the50ustime-outcounterhasnotyetreachedzeroandanewSectorErasecommandmaybeissuedtospecifytheaddressofanothersectortobeerased.WhenQ3=1,the50ustime-outcounterhasexpiredandtheSectorEraseoperationhasalreadybegun.EraseSuspendistheonlyvalidcommandthatmaybeissuedoncetheembeddederaseoperationisunderway.

2.RY/BY#isopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.3.Whenanattemptismadetoeraseonlyprotectedsector(s),theeraseoperationwillabortthuspreventinganydatachangesintheprotectedsector(s).Q7willoutput"0"andQ6willtogglebriefly(100usorless)beforeabortingandreturningthedevicetoReadmode.Ifunprotectedsectorsarealsospecified,however,theywillbeerasednormallyandtheprotectedsector(s)willremainunchanged.

4.Q2isalocalizedindicatorshowingaspecifiedsectorisundergoingeraseoperationornot.Q2toggleswhenuserreadsataddresseswherethesectorsareactivelybeingerased(inerasemode)ortobeerased(inerasesuspendmode).

Status Q7 Q6 Q5 Q3*1 Q2 RY/BY#*2

Time-outperiod 0 Toggling 0 0 Toggling 0Inprogress 0 Toggling 0 1 Toggling 0

Exceededtimelimit 0 Toggling 1 1 Toggling 0

Status Q7 Q6 Q5 Q2 RY/BY#*1

Inprogress 0 Toggling 0 Toggling 0Exceedtimelimit 0 Toggling 1 Toggling 0

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Afterbeginningasectoreraseoperation,EraseSuspendistheonlyvalidcommandthatmaybeissued.Ifsys-temissuesanEraseSuspendcommandduringthe50ustime-outperiodfollowingaSectorErasecommand,thetime-outperiodwillterminateimmediatelyandthedevicewillenterErase-SuspendedReadmode.IfthesystemissuesanEraseSuspendcommandafterthesectoreraseoperationhasalreadybegun,thedevicewillnotenterErase-SuspendedReadmodeuntil20ustimehaselapsed.ThesystemcandetermineifthedevicehasenteredtheErase-SuspendedReadmodethroughQ6,Q7,andRY/BY#.

AfterthedevicehasenteredErase-SuspendedReadmode,thesystemcanreadorprogramanysector(s)ex-ceptthosebeingerasedbythesuspendederaseoperation.Readinganysectorbeingerasedorprogrammedwillreturnthecontentsofthestatusregister.Wheneverasuspendcommandisissued,usermustissueare-sumecommandandcheckQ6togglebitstatus,beforeissueanothererasecommand.Thesystemcanusethestatusregisterbitsshowninthefollowingtabletodeterminethecurrentstateofthedevice:


ERASE SUSPEND/RESUME

When thedevicehassuspendederasing,user canexecute thecommandsetsexcept sectoreraseandchiperase,suchasreadsiliconID,sectorprotectverify,program,CFIqueryanderaseresume.

SECTOR ERASE RESUME

The sectorEraseResumecommand is valid onlywhen thedevice is inErase-SuspendedReadmode.Aftereraseresumes,theusercanissueanotherEaseSuspendcommand,butthereshouldbea400usintervalbe-tweenEaseResumeandthenextEraseSuspendcommand.

Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#Erasesuspendreadinerasesuspendedsector 1 Notoggle 0 N/A toggle N/A 1Erasesuspendreadinnon-erasesuspendedsector Data Data Data Data Data Data 1Erasesuspendprograminnon-erasesuspendedsector Q7# Toggle 0 N/A N/A N/A 0

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PROGRAM SUSPEND/RESUME

WhenthedevicehasProgram/Erasesuspended,usercanexecutereadarray,auto-select,readCFI,readsecu-ritysilicon.

PROGRAM RESUME

TheProgramResumecommandisvalidonlywhenthedevice is inProgram-Suspendedmode.Afterprogramresumes,theusercanissueanotherProgramSuspendcommand,butthereshouldbea5usintervalbetweenProgramResumeandthenextProgramSuspendcommand.

Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#Programsuspendreadinprogramsuspendedsector Invalid 1Programsuspend read in non-programsuspendedsector Data Data Data Data Data Data 1

BUFFER WRITE ABORT

Q1istheindicatorofBufferWriteAbort.WhenQ1=1,thedevicewillabortfrombufferwriteandgobacktoreadstatusregistershownasfollowingtable:

Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#BufferWriteBusy Q7# Toggle 0 N/A N/A 0 0

BufferWriteAbort Q7# Toggle 0 N/A N/A 1 0

BufferWriteExceededTimeLimit Q7# Toggle 1 N/A N/A 0 0

Afterbeginningaprogramoperation,ProgramSuspendistheonlyvalidcommandthatmaybeissued.Thesys-temcandetermineifthedevicehasenteredtheProgram-SuspendedReadmodethroughQ6andRY/BY#.

After thedevicehasenteredProgram-Suspendedmode,thesystemcanreadanysector(s)except thosebe-ingprogrammedbythesuspendedprogramoperation.Readingthesectorbeingprogramsuspendedisinvalid.Wheneverasuspendcommandisissued,usermustissuearesumecommandandcheckQ6togglebitstatus,beforeissueanotherprogramcommand.Thesystemcanusethestatusregisterbitsshowninthefollowingtabletodeterminethecurrentstateofthedevice:

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AUTOMATIC SELECT OPERATIONS

WhenthedeviceisinReadmode,ProgramSuspendedmode,Erase-SuspendedReadmode,orCFImode,theusercanissuetheAutomatic SelectcommandshowninTable 3(twounlockcyclesfollowedbytheAutomaticSelectcommand90h)toenterAutomaticSelectmode.AfterenteringAutomaticSelectmode,theusercanquerytheManufacturerID,DeviceID,SecuritySectorlockedstatus,orSectorprotectedstatusmultipletimeswithoutissuinganewAutomaticSelectcommand.

WhileInAutomaticSelectmode,issuingaResetcommand(F0h)willreturnthedevicetoReadmode(orEase-SuspendedReadmodeifErase-Suspendwasactive)orProgramSuspendedReadmodeifProgramSuspendwasactive.

AnotherwaytoenterAutomaticSelectmodeistouseoneofthebusoperationsshowninTable 2-2. BUS OP-ERATION.Afterthehighvoltage(Vhv)isremovedfromtheA9pin,thedevicewillautomaticallyreturntoReadmodeorErase-SuspendedReadmode.

AUTOMATIC SELECT COMMAND SEQUENCE

AutomaticSelectmodeisusedtoaccessthemanufacturerID,deviceIDandtoverifywhetherornotsecuredsiliconislockedandwhetherornotasectorisprotected.Theautomaticselectmodehasfourcommandcycles.Thefirst twoareunlockcycles,and followedbyaspecificcommand.Thefourthcycle isanormal readcycle,andusercanreadatanyaddressanynumberoftimeswithoutenteringanothercommandsequence.TheResetcommandisnecessarytoexittheAutomaticSelectmodeandbacktoreadarray.Thefollowingtableshowstheidentificationcodewithcorrespondingaddress.

Afterenteringautomaticselectmode,noothercommandsareallowedexcepttheresetcommand.


Address Data (Hex) Representation

ManufacturerIDWord X00 C2Byte X00 C2

DeviceID MX29GL128EWord X01/0E/0F 227E/2221/2201

Byte X02/1C/1E 7E/21/01

SecuredSiliconWord X03 99/19(H) Factorylocked/unlocked89/09(L)

Byte X06 99/19(H) Factorylocked/unlocked89/09(L)

SectorProtectVerify Word (Sectoraddress)X02 00/01 Unprotected/protectedByte (Sectoraddress)X04 00/01 Unprotected/protected

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READ MANUFACTURER ID OR DEVICE ID

TheManufacturer ID (identification) is a uniquehexadecimal number assigned to eachmanufacturer by theJEDECcommittee.EachcompanyhasitsownmanufacturerID,whichisdifferentfromtheIDofallothercom-panies.ThenumberassignedtoMacronixisC2h.

AfterenteringAutomaticSelectmode,performingareadoperationwithA1&A0heldLOWwillcausethedevicetooutputtheManufacturerIDontheDataI/O(Q7toQ0)pins.

RESET

Inthefollowingsituations,executingresetcommandwillresetdevicebacktoReadmode:

• Amongerasecommandsequence(beforethefullcommandsetiscompleted)• Sectorerasetime-outperiod• Erasefail(whileQ5ishigh)• Amongprogramcommandsequence(beforethefullcommandset iscompleted,erase-suspendedprogramincluded)

• Programfail(whileQ5ishigh,anderase-suspendedprogramfailisincluded)• Auto-selectmode• CFImode

Whiledeviceisatthestatusofprogramfailorerasefail(Q5ishigh),usermustissueresetcommandtoresetdevicebacktoreadarraymode.WhilethedeviceisinAuto-SelectmodeorCFImode,usermustissueresetcommandtoresetdevicebacktoreadarraymode.

Whenthedeviceisintheprogressofprogramming(notprogramfail)orerasing(noterasefail),devicewillig-noreresetcommand.


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Start

Q1=0 Q2=0

Password Protection Mode

To chooseprotection mode

set lock register bit(Q1/Q2)

SPB Lock bit UnlockedAll SPBs are changeable

Solid write Protect bit (SPB)

SPB=0 sector protect

SPB=1 sector unprotect

Temporary Unprotect SPB bit (USPB)

USPB=0 SPB bit is disabled

USPB=1 SPB bit is enabled

USPB 0

USPB 1

USPB 2

::

USPB N-1

USPB N

SPB 0

SPB 1

SPB 2

::

SPB N-1

SPB N

SA 0

SA 1

SA 2

::

SA N-1

SA N

DPB 0

DPB 1

DPB 2

::

DPB N-1

DPB N

SPB Lock bit lockedAll SPBs can not changeable

Solid Protection Mode

Set 64 bit Password

Sector Array

Dynamic write Protect bit (DPB)

DPB=0 sector protect

DPB=1 sector unprotect

SetSPB Lock Bit

SPBLK = 0

SPBLK = 1

ADVANCED SECTOR PROTECTION/UN-PROTECTION

TherearetwowaystoimplementsoftwareAdvancedSectorProtectiononthisdevice:PasswordmethodorSolidmethods.Throughthesetwoprotectionmethods,usercandisableorenabletheprogrammingorerasingopera-tiontoanyindividualsectororthewholechip.Thefigurebelowhelpstodescribeanoverviewofthesemethods.

ThedeviceisdefaulttotheSolidmode.Allsectorsaredefaultasunprotectedwhenshippedfromfactory.Thedetailedalgorithmofadvancesectorprotectionisshownasfollows:

Figure 1. Advance Sector Protection/Unprotection SPB Program Algorithm

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Figure 2. Lock Register Program Algorithm

START

Pass

Exit Lock Register command

Done YES

YES

NO

Q5 = 1NO

Write Data AAH, Address 555H

Lock register command set EntryWrite Data 55H, Address 2AAH

Write Data 40H, Address 555H

Write Data A0H, Address don’t care

Write Program Data, Address don’t care

Data # Polling Algorithm

Fail

Reset command

Lock register data program

1. Lock Register

UsercanchoosethesectorprotectingmethodviasettingLockRegisterbitsasQ1andQ2.LockRegisterisa16-bitone-timeprogrammableregister.OnceprogrammingeitherQ1orQ2,theywillbelockedinthatmodeandtheotherswillbedisabledpermanently.Q1andQ2cannotbeprogrammedat thesame time,otherwise thedevicewillaborttheoperation.

IfusersselectPasswordProtectionmode,thepasswordsettingisrequired.Userscansetpasswordbyissuingpasswordprogramcommand.

Lock Register bitsQ15-Q3 Q2 Q1 Q0

Don'tcare PasswordProtectionModeLockBit

SolidProtectionModeLockBit

SecuredSiliconSectorProtectionBit

PleaserefertothecommandforLockRegistercommandsetabouthowtoreadandprogramtheLockRegisterbits.

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2. Solid Protection Mode

2.1 Solid write Protection Bits (SPB)

TheSolidwriteProtectionbits(SPB)arenonvolatilebitwiththesameendurancesastheFlashmemory.EachSPB is assigned to each sector individually.TheSPB is preprogrammed, and verifiedprior to erasurearemanagedbythedevice,sosystemmonitoringisnotnecessary.

WhenSPBissetto“0”,theassociatedsectormaybeprotected,preventinganyprogramoreraseoperationonthissector.WhetherthesectorisprotecteddependsalsouponthevalueoftheUSPB,asdescribedelsewhere.TheSPBbitsaresetindividuallybySPBprogramcommand.However,itcannotbeclearedindividually.IssuingtheAllSPBErasecommandwilleraseallSPBinthesametime.DuringSPBprogrammingperiod,thereadandwriteoperationsaredisabledfornormalsectoruntilexitingthismode.

Tounprotectaprotectedsector,theSPBlockbitmustbeclearedfirstbyusingahardwareresetorapower-upcycle.AftertheSPBlockbitiscleared,theSPBstatuscanbechangedtothedesiredsettings.TolocktheSolidProtectionBitsafterthemodificationhasfinished,theSPBLockBitmustbesetonceagain.

ToverifythestateoftheSPBforagivensector,issuingaSPBStatusReadCommandtothedeviceisrequired.RefertotheflowchartfordetailsinFigure3.

2.2 Dynamic write Protection Bits (DPB)

TheDynamicProtectionfeaturesavolatiletypeprotectiontoeachindividualsector.Itcanprotectsectorsfrombeingunintentionallychanged,andiseasytodisable.

AllDynamicwriteProtectionbit (DPB)canbemodified individually.DPBsprotect theunprotectedsectorswiththeirSPBscleared.TomodifytheDPBstatusbyissuingtheDPBSet(programmedto“0”)orDPBClear(erasedto“1”)commands,andplaceeachsectorintheprotectedorunprotectedstateseperately.AftertheDPBClearcommandisissued(erasedto“1”),thesectormaybemodifieddependingontheSPBstateofthatsector.

TheDPBsaredefaulttobeerasedto“1”whenfirstshippedfromfactory.

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Figure 3. SPB Program Algorithm

Q6 Toggle ?

Q6 Toggle ?

Q5 = 1 ?

NO

NO

YES

NO

NO

SPB commandset entry

Program SPB

Read Q7~Q0Twice

Read Q7~Q0Twice

Read Q7~Q0Twice

YES

YES

YES

Wait 500 µs

Program Fail Write Reset CMD

Pass

Q0='1' (Erase)'0' (Program)

SPB commandset Exit

2.3 Temporary Un-protect Solid write Protect Bits (USPB)

TemporaryUn-protectSolidwriteProtectBits are volatile.Theyareunique for each sector and canbeindividuallymodified.Softwarecan temporarilyunprotectwriteprotectsectorsdespiteofSPB'spropertywhenDPBsarecleared.WhiletheUSPBisset(to“0”),thecorrespondingsector'sSPBpropertyismasked.

Notes:1.Uponpowerup,theUSPBsarecleared(all“1”).TheUSPBscanbeset(to“0”)orcleared(to“1”)asoftenasneeded.ThehardwareresetwillresetUSPB/DPBtotheirdefaultvalues.

2.Tochangetheprotectedsectorstatusofsolidwriteprotectbit,usersdon'tneedtoclearallSPBs.Theuserscan just implement software to set correspondingUSPB to "0", inwhich the correspondingDPBstatus iscleared too.Consequently, theoriginal solidwrite protect statusof protected sectors canbe temporarilychanged.

Note:SPBprogram/erasestatuspollingflowchart:checkQ6toggle,whenQ6stoptoggle,thereadstatusis00H/01H(00Hforprogram/01Hforerase),otherwise,thestatusis“fail”and“exit”.

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4. Password Protection Method

ThesecuritylevelofPasswordProtectionMethodishigherthantheSolidprotectionmode.The64bitpasswordis requestedbeforemodifyingSPB lockbitstatus.Whendevice isunderpasswordprotectionmode, theSPBlockbitissetas“0”,afterapower-upcycleorResetCommand.

AcorrectpasswordisrequiredforpasswordUnlockcommandtounlocktheSPBlockbit.Await2usisnecessarytounlock thedeviceafteravalidpassword isgiven.After that, theSPBbitsareallowed tobechanged.ThePasswordUnlockcommand is issuedslower than2μsevery time, topreventhacker fromtryingall the64-bitpasswordcombinations.

Thereareafewstepstostartpasswordprotectionmode:(1).Seta64-bitpasswordforverificationbeforeenteringthepasswordprotectionmode.Thisverificationisonly

allowedinpasswordprogramming.(2).SetthePasswordProtectionModeLockBitto”0”toactivatethepasswordprotectionmode.

Oncethepasswordprotectionmodelockbitisprogrammed,theprogrammedQ2bitcannotbeerasedanymoreandthedevicewillremainpermanentlyinpasswordprotectionmode.Thepreviousset64-bitpasswordcannotberetrievedorprogrammed.Allthecommandstothepassword-protectedaddresswillalsobedisabled.

Allthecombinationsofthe64-bitpasswordcanbeusedasapassword,andprogrammingthepassworddoesnot require special address.Thepassword is defaulted to beall “1”when shipped from the factory.Underpasswordprogramcommand, only "0" canbeprogrammed. In order to prevent access, thePasswordModeLockingBitmustbesetafterthePasswordisprogrammedandverified.TosetthePasswordModeLockBitwillpreventthis64-bitspasswordtobereadonthedatabus.Anymodificationisimpossiblethen,andthepasswordcannotbecheckedanymoreafterthePasswordModeLockBitisset.

3. Solid Protection Bit Lock Bit

TheSolidProtectionBitLockBit(SPBLK)isassignedtocontrolallSPBstatus.Itisanuniqueandvolatile.WhenSPBLK=0(set),allSPBsarelockedandcannotbechanged.WhenSPBLK=1(cleared),allSPBsareallowedtobechanged.

There is no software commandsequence requested to unlock this bit, unless thedevice is in thepasswordprotectionmode.To clear theSPBLockBit, just executeahardware reset or a power-up cycle. In order topreventmodification,theSPBLockBitmustbeset(SPBLK=0)afterallSPBsaresettodesiredstatus.

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Sector Protection Status Table

Protection Bit StatusSector Status

DPB SPB USPBclear clear clear Unprotectclear clear set Unprotectclear set clear Protectclear set set Unprotectset clear clear Protectset clear set Protectset set clear Protectset set set Protect

Notes: IfSPBLKisset,SPBwillbeunchangeable. IfSPBLKiscleared,SPBwillbechangeable.

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Secured Silicon Sector Address Range Standard Factory Locked Express Flash

Factory Locked Customer Lockable

000000h-000007h ESN ESNorDeterminedbyCustomer DeterminedbyCustomer

000008h-00007Fh Unavailable DeterminedbyCustomer

Customer Lockable: Security Sector NOT Programmed or Protected at the Factory

Whenthesecurityfeatureisnotrequired,thesecurityregioncanactasanextramemoryspace.

Securitysiliconsectorcanalsobeprotectedbytwomethods.Notethatoncethesecuritysiliconsector ispro-tected,thereisnowaytounprotectthesecuritysiliconsectorandthecontentofitcannolongerbealtered.

Afterthesecuritysiliconislockedandverified,systemmustwriteExitSecuritySectorRegion,gothroughapow-ercycle,orissueahardwareresettoreturnthedevicetoreadnormalarraymode.

SECURITY SECTOR FLASH MEMORY REGION

TheSecuritySectorregionisanextraOTPmemoryspaceof128wordsin length.Thesecuritysectorcanbelockeduponshippingfromfactory,oritcanbelockedbycustomeraftershipping.CustomercanissueSecuritySectorFactoryProtectVerifyand/orSecuritySectorProtectVerifytoquerythelockstatusofthedevice.

In factory-lockeddevice,securitysectorregion isprotectedwhenshippedfromfactoryandthesecuritysiliconsectorindicatorbitissetto"1".Incustomerlockabledevice,securitysectorregionisunprotectedwhenshippedfromfactoryandthesecuritysiliconindicatorbitissetto"0".

Factory Locked: Security Sector Programmed and Protected at the Factory

Inafactorylockeddevice,theSecuritySectorispermanentlylockedbeforeshippingfromthefactory.Thede-vicewillhavea16-byte(8-word)ESNinthesecurityregion.TheESNoccupiesaddresses000000hto00000Fhinbytemodeor000000hto000007hinwordmode.

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TABLE 3. COMMAND DEFINITIONS

WA=WriteAddressWD=WriteDataSA=SectorAddressN-1=WordCountWBL=WriteBufferLocationPWD=PasswordPWDn=Passwordword0,word1,wordnID1/ID2/ID3:RefertoTable 2-2fordetailID.

Comm-and

ReadMode

ResetMode

AutomaticSelect SecuritySectorRegion

ExitSecuritySectorSiliconID DeviceID FactoryProtect

VerifySectorProtectVerify

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle

Addr Addr XXX 555 AAA 555 AAA 555 AAA 555 AAA 555 AAA 555 AAAData Data F0 AA AA AA AA AA AA AA AA AA AA AA AA

2ndBusCycle

Addr 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555Data 55 55 55 55 55 55 55 55 55 55 55 55

3rdBusCycle

Addr 555 AAA 555 AAA 555 AAA 555 AAA 555 AAA 555 AAAData 90 90 90 90 90 90 90 90 88 88 90 90

4thBusCycle

Addr X00 X00 X01 X02 X03 X06 (Sector)X02

(Sector)X04 XXX XXX

Data C2h C2h ID1 ID1 99/19(H)89/09(L) 00/01 00/01 00 00

5thBusCycle

Addr X0E X1CData ID2 ID2

6thBusCycle

Addr X0F X1EData ID3 ID3

Comm-and

ProgramWritetoBuffer

Program

WritetoBuffer

ProgramAbortReset

WritetoBuffer

Programconfirm

ChipErase SectorErase CFIRead

Program/Erase

Suspend

Program/EraseResume

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte

1stBusCycle

Addr 555 AAA 555 AAA 555 AAA SA SA 555 AAA 555 AAA 55 AA xxx xxx xxx xxxData AA AA AA AA AA AA 29 29 AA AA AA AA 98 98 B0 B0 30 30

2ndBusCycle

Addr 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555Data 55 55 55 55 55 55 55 55 55 55

3rdBusCycle

Addr 555 AAA SA SA 555 AAA 555 AAA 555 AAAData A0 A0 25 25 F0 F0 80 80 80 80

4thBusCycle

Addr Addr Addr SA SA 555 AAA 555 AAAData Data Data N-1 N-1 AA AA AA AA

5thBusCycle

Addr WA WA 2AA 555 2AA 555Data WD WD 55 55 55 55

6thBusCycle

Addr WBL WBL 555 AAA Sec-tor

Sec-tor

Data WD WD 10 10 30 30

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Command

DeepPowerDown PasswordProtection

Enter ExitPassword

CommandSetEntry

PasswordProgram

PasswordRead

PasswordUnlock

PasswordCommandSet

ExitWord Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte

1stBusCycle

Addr 555 AAA XXX XXX 555 AAA XXX XXX X00 X00 00 00 XXX XXXData AA AA AB AB AA AA A0 A0 PWD0 PWD0 25 25 90 90

2ndBusCycle

Addr 2AA 555 2AA 555 PWA PWA X01 X01 00 00 XXX XXXData 55 55 55 55 PWD PWD PWD1 PWD1 03 03 00 00

3rdBusCycle

Addr XXX XXX 555 AAA X02 X02 X00 X00Data B9 B9 60 60 PWD2 PWD2 PWD0 PWD0

4thBusCycle

Addr X03 X03 X01 X01Data PWD3 PWD3 PWD1 PWD1

5thBusCycle

Addr X04 X02 X02Data PWD4 PWD2 PWD2

6thBusCycle

Addr X05 X03 X03Data PWD5 PWD3 PWD3

7thBusCycle

Addr X06 00 X04Data PWD6 29 PWD4

8thBusCycle

Addr X07 X05Data PWD7 PWD5

9thBusCycle

Addr X06Data PWD6

10thBusCycle

Addr X07Data PWD7

11thBusCycle

Addr 00Data 29

33P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Command

LockRegister GlobalNon-Volatile

LockregisterCommandSetEntry

Program ReadLockregisterCommandSetExit

SPBCommandSetEntry

SPBProgram

AllSPBErase

SPBStatusRead

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle

Addr 555 AAA XXX XXX XXX XXX XXX XXX 555 AAA XXX XXX XXX XXX SA SAData AA AA A0 A0 DATA DATA 90 90 AA AA A0 A0 80 80 00/01 00/01

2ndBusCycle

Addr 2AA 555 XXX XXX XXX XXX 2AA 555 SA SA 00 00Data 55 55 Data Data 00 00 55 55 00 00 30 30

3rdBusCycle

Addr 555 AAA 555 AAA Data 40 40 C0 C0

4thBusCycle

AddrData

5thBusCycle

AddrData

Command

GlobalNon-Volatile GlobalVolatileFreeze Volatile

SPBCommandSetExit

SPBLockCommandSetEntry

SPBLockSet

SPBLockStatusRead

SPBLockCommandSetExit

DPBCommandSetEntry

DPBSet DPBClear

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle

Addr XXX XXX 555 AAA XXX XXX XXX XXX XXX XXX 555 AAA XXX XXX XXX XXXData 90 90 AA AA A0 A0 00/01 00/01 90 90 AA AA A0 A0 A0 A0

2ndBusCycle

Addr XXX XXX 2AA 555 XXX XXX XXX XXX 2AA 555 SA SA SA SAData 00 00 55 55 00 00 00 00 55 55 00 00 01 01

3rdBusCycle

Addr 555 AAA 555 AAA Data 50 50 E0 E0

4thBusCycle

AddrData

5thBusCycle

AddrData

Command

Volatile

DPBStatusRead

DPBCommandSetExit

Word Byte Word Byte1stBusCycle

Addr SA SA XXX XXXData 00/01 00/01 90 90

2ndBusCycle

Addr XXX XXXData 00 00

3rdBusCycle

AddrData

4thBusCycle

AddrData

5thBusCycle

AddrData

Notes: *Itisnotrecommendedtoadoptanyothercodenotinthecommanddefinitiontablewhichwillpotentiallyenterthehiddenmode.*FortheSPBLockandDPBStatusRead"00"meanslock(protect),"01"meansunlock(unprotect).

34P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Table 4-1. CFI mode: Identification Data Values (Note 1)

(Allvaluesinthesetablesareinhexadecimal)

Table 4-2. CFI mode: System Interface Data Values

COMMON FLASH MEMORY INTERFACE (CFI) MODE

QUERY COMMAND AND COMMAND FLASH MEMORY INTERFACE (CFI) MODE

Thedevice featuresCFImode.Host systemcan retrieve theoperating characteristics, structureand vendor-specified informationsuchas identifying information,memorysize,byte/wordconfiguration,operatingvoltagesandtiming informationof thisdevicebyCFImode. If thesystemwritestheCFIQuerycommand"98h", toad-dress"55h"/"AAh"(dependingonWord/Bytemode),thedevicewillentertheCFIQueryMode,anytimethede-viceisreadytoreadarraydata.ThesystemcanreadCFIinformationattheaddressesgiveninTable 4.

OnceuserentersCFIquerymode,usercan issue resetcommand toexitCFImodeand return to readarraymode.TheunusedCFIareaisreservedbyMacronix.

DescriptionAddress (h) (Word Mode)

Address (h)(Byte Mode)

Data (h)

Vccsupplyminimumprogram/erasevoltage 1B 36 0027Vccsupplymaximumprogram/erasevoltage 1C 38 0036VPPsupplyminimumprogram/erasevoltage 1D 3A 0000VPPsupplymaximumprogram/erasevoltage 1E 3C 0000Typicaltimeoutpersingleword/bytewrite,2nus 1F 3E 0003Typicaltimeoutformaximum-sizebufferwrite,2nus(00h,notsupport)

20 40 0006

Typicaltimeoutperindividualblockerase,2nms 21 42 0009Typicaltimeoutforfullchiperase,2nms(00h,notsupport) 22 44 0013Maximumtimeoutforword/bytewrite,2ntimestypical 23 46 0003Maximumtimeoutforbufferwrite,2ntimestypical 24 48 0005Maximumtimeoutperindividualblockerase,2ntimestypical 25 4A 0003Maximumtimeoutforchiperase,2ntimestypical(00h,notsupport)

26 4C 0002



Data (h)

Query-uniqueASCIIstring"QRY"10 20 005111 22 005212 24 0059

PrimaryvendorcommandsetandcontrolinterfaceIDcode 13 26 000214 28 0000

Addressforprimaryalgorithmextendedquerytable 15 2A 004016 2C 0000

AlternatevendorcommandsetandcontrolinterfaceIDcode 17 2E 000018 30 0000

Addressforalternatealgorithmextendedquerytable 19 32 00001A 34 0000

Note1.QuerydataarealwayspresentedonthelowestdataoutputQ7~Q0only,Q8~Q15are"0".

35P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Table 4-3. CFI mode: Device Geometry Data Values



Data (h)

Devicesize=2ninnumberofbytes 27 4E 0018

Flashdeviceinterfacedescription(02=asynchronousx8/x16)28 50 000229 52 0000

Maximumnumberofbytesinbufferwrite=2n(00h,notsupport)2A 54 00062B 56 0000

Numberoferaseregionswithindevice(01h:uniform,02h:boot) 2C 58 0001

IndexforEraseBankArea1:[2E,2D]=#ofsame-sizesectorsinregion1-1[30,2F]=sectorsizeinmultiplesof256K-bytes

2D 5A 007F2E 5C 00002F 5E 000030 60 0002

IndexforEraseBankArea2

31 62 000032 64 000033 66 000034 68 0000


35 6A 000036 6C 000037 6E 000038 70 0000


39 72 00003A 74 00003B 76 00003C 78 0000

36P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Table 4-4. CFI mode: Primary Vendor-Specific Extended Query Data Values



Data (h)

Query-Primaryextendedtable,uniqueASCIIstring,PRI40 80 005041 82 005242 84 0049

Majorversionnumber,ASCII 43 86 0031Minorversionnumber,ASCII 44 88 0033Unlockrecognizesaddress(0=recognize,1=don'trecognize) 45 8A 0014Erasesuspend(2=tobothreadandprogram) 46 8C 0002Sectorprotect(N=#ofsectors/group) 47 8E 0001Temporarysectorunprotect(1=supported) 48 90 0000Sectorprotect/Chipunprotectscheme 49 92 0008SimultaneousR/Woperation(0=notsupported) 4A 94 0000Burstmode(0=notsupported) 4B 96 0000Pagemode(0=notsupported,01=4wordpage,02=8wordpage) 4C 98 0002

MinimumACC(acceleration)supply(0=notsupported),[D7:D4]forvolt,[D3:D0]for100mV 4D 9A 0095

MaximumACC(acceleration)supply(0=notsupported),[D7:D4]forvolt,[D3:D0]for100mV 4E 9C 00A5

WP#Protection04=UniformsectorsbottomWP#protect05=UniformsectorstopWP#protect

4F 9E 0004/0005

ProgramSuspend(0=notsupported,1=supported) 50 A0 0001

37P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

ABSOLUTE MAXIMUM STRESS RATINGS

OPERATING TEMPERATURE AND VOLTAGE

ELECTRICAL CHARACTERISTICS

StorageTemperature -65°Cto+150°C

VoltageRange

VCC -0.5Vto+4.0V

VI/O -0.5Vto+4.0VA9,WP#/ACC -0.5Vto+10.5VTheotherpins. -0.5VtoVcc+0.5V

OutputShortCircuitCurrent(lessthanonesecond) 200mA

Industrial (I) Grade SurroundingTemperature(TA) -40°Cto+85°C

VCC Supply Voltages

FullVCCrange +2.7Vto3.6VRegulatedVCCrange +3.0Vto3.6V

VI/Orange 1.65VtoVCC

NOTICE:1.Stressesgreater than those listedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice.Thisisstressratingonlyandfunctionaloperationalsectionsofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodmayaffectreliability.

2.Specificationscontainedwithinthefollowingtablesaresubjecttochange.3.Duringvoltagetransitions,allpinsmayovershootGNDto-2.0VandVccto+2.0Vforperiodsupto20ns,seeFiguresbelow.

Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform

GND

GND - 2.0V

20ns 20ns

20ns

Vcc + 2.0V

Vcc

20ns 20ns

20ns

38P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

DC CHARACTERISTICSSymbol Description Min. Typ. Max. Remark

Iilk InputLeak ±2.0uA

Iilk9 A9Leak 35uA A9=10.5V

Iolk OutputLeak ±1.0uA

Icr1 ReadCurrent

5mA 15mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=1MHz,ByteMode

10mA 24mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=5MHz,ByteMode

30mA 60mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=10MHz

Icr2 VCCPageReadCurrent



Iio VIOnon-activecurrent 0.2mA 10mA

Icw WriteCurrent 14mA 30mA CE#=Vil,OE#=Vih

Isb StandbyCurrent 20uA 100uA Vcc=Vccmax,otherpindisable

Isbr ResetCurrent 20uA 100uAVcc=Vccmax,RESET#enable,otherpindisable

Isbs SleepModeCurrent 20uA 100uA

Idpd Vccdeeppowerdowncurrent 1uA 15uA

Icp1 AcceleratedPgmCurrent,WP#/Accpin(Word/Byte) 1mA 3mA CE#=Vil,OE#=Vih

Icp2 AcceleratedPgmCurrent,Vccpin,(Word/Byte) 7mA 14mA CE#=Vil,OE#=Vih

Vil InputLowVoltage -0.1V 0.3xVI/OVih InputHighVoltage 0.7xVI/O VI/O+0.3V

Vhv VeryHighVoltageforAutoSelect/AcceleratedProgram 9.5V 10.5V

Vol OutputLowVoltage 0.45V Iol=100uA

Voh OuputHighVoltage 0.85xVI/O Ioh=-100uA

Vlko LowVccLock-outvoltage 2.3V 2.5V

Note: Sleepmodeenablesthelowerpowerwhenaddressremainstablefortaa+30ns.

39P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

SWITCHING TEST CIRCUITS

SWITCHING TEST WAVEFORMS

TestConditionOutputLoadCapacitance,CL:1TTLgate,30pFRise/FallTimes:5nsInputPulselevels:0.0~VI/OIn/Outreferencelevels:0.5VI/O

Test Points

VI/O

VI/O / 2VI/O / 2

0.0VOUTPUTINPUT

DEVICE UNDERTEST

CL

3.3V

6.2KΩ

2.7KΩ

40P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

AC CHARACTERISTICS

Symbol Description29GL128E

(VCC=2.7V~3.6V) UnitMin. Typ. Max.

Taa ValiddataoutputafteraddressVI/O=VCC 90 nsVI/O=1.65toVCC 110 ns

Tpa PageaccesstimeVI/O=VCC 25 nsVI/O=1.65toVCC 30 ns

Tce ValiddataoutputafterCE#lowVI/O=VCC 90 nsVI/O=1.65toVCC 110 ns

Toe ValiddataoutputafterOE#lowVI/O=VCC 25 nsVI/O=1.65toVCC 30 ns

Tdf DataoutputfloatingafterOE#high 20 nsTsrw Latencybetweenreadandwriteoperation(Note) 35 ns

Toh Outputholdtimefromtheearliestrisingedgeofaddress,CE#,OE# 0 ns

Trc Readperiodtime 90 nsTwc Writeperiodtime 90 nsTcwc Commandwriteperiodtime 90 nsTas Addresssetuptime 0 nsTaso AddresssetuptimetoOE#lowduringtogglebitpolling 15 nsTah Addressholdtime 45 nsTaht AddressholdtimefromCE#orOE#highduringtogglebitpolling 0 nsTds Datasetuptime 30 nsTdh Dataholdtime 0 nsTvcs Vccsetuptime 500 usTcs ChipenableSetuptime 0 nsTch Chipenableholdtime 0 nsToes Outputenablesetuptime 0 ns

Toeh OutputenableholdtimeRead 0 nsToggle&Data#Polling 10 ns

Tws WE#setuptime 0 nsTwh WE#holdtime 0 nsTcepw CE#pulsewidth 35 nsTcepwh CE#pulsewidthhigh 30 nsTwp WE#pulsewidth 35 nsTwph WE#pulsewidthhigh 30 ns

Tbusy Program/EraseactivetimebyRY/BY#VI/O=VCC 90 nsVI/O=1.65toVCC 110 ns

Tghwl Readrecovertimebeforewrite 0 nsTghel Readrecovertimebeforewrite 0 ns

41P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Symbol Description29GL128E

(VCC=2.7V~3.6V) UnitMin. Typ. Max.

Twhwh1 Programoperation Byte 10 usTwhwh1 Programoperation Word 10 usTwhwh1 Accprogramoperation(Word/Byte) 10 usTwhwh2 Sectoreraseoperation 0.5 3.5 secTbal Sectoraddholdtime 50 usTrdp Releasefromdeeppowerdownmode 200 us

Note : Not100%tested.

42P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 4. COMMAND WRITE OPERATION

Addresses

CE#

OE#

WE#

DIN

Tds

Tah

Data

Tdh

Tcs Tch

Tcwc

TwphTwpToes

Tas

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

VA

VA: Valid Address

43P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

READ/RESET OPERATION

Figure 5. READ TIMING WAVEFORMS

Addresses

CE#

OE#

Taa

WE#

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Voh

Vol

HIGH Z HIGH ZDATA Valid

ToeToeh Tdf

Tce

Trc

Outputs

Toh

ADD Valid

Tsrw

44P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 6. RESET# TIMING WAVEFORM

Trh

Trb1

Trp2

Trp1

Tready2

Tready1

RY/BY#

CE#, OE#

RESET#

Reset Timing NOT during Automatic Algorithms

Reset Timing during Automatic Algorithms

RY/BY#

CE#, OE#

Trb2

WE#

RESET#

AC CHARACTERISTICS

Item Description Setup Speed UnitTrp1 RESET#PulseWidth(DuringAutomaticAlgorithms) MIN 10 us

Trp2 RESET#PulseWidth(NOTDuringAutomaticAlgorithms) MIN 500 ns

Trh RESET#HighTimeBeforeRead MIN 200 ns

Trb1 RY/BY#RecoveryTime(toCE#,OE#golow) MIN 0 ns

Trb2 RY/BY#RecoveryTime(toWE#golow) MIN 50 ns

Tready1 RESET#PINLow(DuringAutomaticAlgorithms)toReadorWrite MAX 20 us

Tready2 RESET#PINLow(NOTDuringAutomaticAlgorithms)toReadorWrite MAX 500 ns

45P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

ERASE/PROGRAM OPERATION

Figure 7. AUTOMATIC CHIP ERASE TIMING WAVEFORM

Twc

Address

OE#

CE#

55h

2AAh 555h

10h

InProgress Complete

VA VA

Tas Tah

Tghwl

Tch

Twp

Tds Tdh

Twhwh2

Read StatusLast 2 Erase Command Cycle

Tbusy Trb

Tcs TwphWE#

Data

RY/BY#

46P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 8. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART

START

Write Data AAH Address 555H

Write Data 55H Address 2AAH


Write Data 80H Address 555H

YES

NOData=FFh ?



Data# Polling Algorithm or

Toggle Bit Algorithm

Auto Chip Erase Completed

47P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 9. AUTOMATIC SECTOR ERASE TIMING WAVEFORM

Twc

Address

OE#

CE#

55h

2AAh SectorAddress 1

SectorAddress 0

30h

InProgress Complete

VA VA

30h

SectorAddress n

Tas

Tah

Tbal

Tghwl

Tch

Twp

Tds Tdh

Twhwh2

Read Status

Last 2 Erase Command Cycle

TbusyTrb

Tcs TwphWE#

Data

RY/BY#

30h

48P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 10. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART

START





Write Data 30H Sector Address


Data# Polling Algorithm or

Toggle Bit Algorithm

Auto Sector Erase Completed

NOLast Sector

to Erase

YES

YES

NOData=FFh

49P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 11. ERASE SUSPEND/RESUME FLOWCHART

START

Write Data B0H

Toggle Bit checking Q6 not toggled

ERASE SUSPEND

YES

NO

Write Data 30H

Continue Erase

Reading or Programming End

Read Array orProgram

AnotherErase Suspend ?

NO

YES

YES

NO

ERASE RESUME

50P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 12. AUTOMATIC PROGRAM TIMING WAVEFORMS

Figure 13. ACCELERATED PROGRAM TIMING DIAGRAM

Address

OE#

CE#

A0h

555h PA

PD Status DOUT

VA VA

Tas Tah

Tghwl

Tch

Twp

Tds Tdh

Twhwh1

Last 2 Read Status CycleLast 2 Program Command Cycle

TbusyTrb

Tcs TwphWE#

Data

RY/BY#

WP#/ACC

Vcc

250ns 250ns

Vhv (9.5V ~ 10.5V)

Vil or Vih Vil or Vih

Tvcs

Vcc (min)

GND

51P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 14. CE# CONTROLLED WRITE TIMING WAVEFORM

Address

OE#

CE#

A0h

555h PA

PD Status DOUT

VA VA

Tas Tah

Tghwl

Tcepw TwhTws

Tds Tdh

Twhwh1 or Twhwh2

Tbusy

Tcepwh

WE#

Data

RY/BY#

52P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 15. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART

START



Write Program Data/Address

Write Data A0H Address 555H

YES

Read Again Data:Program Data?

YES

Auto Program Completed

Data# Polling Algorithm orToggle Bit Algorithm

next address

Last Word to beProgramed

No

No

53P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 16. SILICON ID READ TIMING WAVEFORM

Taa Taa Taa Taa

Tce

Toe

Toh Toh Toh Toh

Tdf

DATA OUT

Manufacturer ID Device IDCycle 1

Device IDCycle 2

Device IDCycle 3

VhvVihVil

ADDA9

ADD

CE#

A1

OE#

WE#

ADDA0

DATA OUT DATA OUT DATA OUTDATAQ15~Q0

VCC3V

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

A2

Disable

Enable

54P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

WRITE OPERATION STATUS

Figure 17. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)

Tdf

Tce

Tch

Toe

Toeh

Toh

CE#

OE#

WE#

Q7

Q6-Q0

RY/BY#

Tbusy

Status Data Status Data

ComplementComplement True Valid Data

Taa

Trc

Address VAVA

High Z

High ZValid DataTrue

55P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 18. STATUS POLLING FOR WORD PROGRAM/ERASE

Notes:1.Forprogramming,validaddressmeansprogramaddress.Forerasing,validaddressmeanserasesectorsaddress.2.Q7maychangesimultaneouslywithQ5,soevenQ5=1,Q7shouldbereverify.

Start

Q7 = Data# ?

Q5 = 1 ?

Q7 = Data# ?(Note 2)

FailPass

No

No

No

Yes

Yes

Yes

Read Data at valid address(Note 1)

Read Data at valid address(Note 1)

56P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 19. STATUS POLLING FOR WRITE BUFFER PROGRAM

Read Data at last writeaddress (Note 1)

Start

Q7 = Data# ?

Q1=1 ?Only for write

buffer program


Fail Pass

Write Buffer Abort

No

No

No

No

No

Yes

Yes

Q5=1 ?

Yes

Yes

Yes




Notes:1.Forprogramming,validaddressmeansprogramaddress.Forerasing,validaddressmeanserasesectorsaddress.2.Q7maychangesimultaneouslywithQ5,soevenQ5=1,Q7shouldbereverify.

57P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)

Tdf

Taht Taso

Tce

Tch

Toe

Toeh

Taa

Trc

Toh

Address

CE#

OE#

WE#

Q6/Q2

RY/BY#

Tbusy

Valid Status

(first read)

Valid Status

(second read) (stops toggling)

Valid Data

VA VAVA

VA : Valid Address

VA

Valid Data

58P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 21. TOGGLE BIT ALGORITHM

Notes:1.TogglebitQ7-Q0shouldbereadtwicetocheckifitistoggling.2.WhileQ5=1,thetogglebit(Q6)maystoptoggling.Therefore,thesystemshouldbereadagain.

Start

Q5 = 1 ?

FailPass

No

No

No

Yes

Yes

Yes

Read Data Twice(Note 1)

Read Data Twice(Note 1, 2)

Q6 Toggle ?

Q6 Toggle ?

59P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word mode)

AC CHARACTERISTICS

WORD/BYTE CONFIGURATION (BYTE#)

Parameter Description Test Setup All Speed Options Unit

Telfl/Telfh CE#toBYTE#fromL/H Max. 5 nsTflqz BYTE#fromLtoOutputHiz Max. 30 nsTfhqv BYTE#fromHtoOutputActive Min. 90 ns

Tfhqv

Telfh

DOUT(Q0-Q7)

DOUT(Q0-Q14)

VA DOUT(Q15)

CE#

OE#

BYTE#

Q14~Q0

Q15/A-1

60P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 23. PAGE READ TIMING WAVEFORM

Amax:A3

(A-1),A0,A1,A2

DATA

CE#

Note: CE#, OE# are enable. Page size is 8 words in Word mode, 16 bytes in Byte mode. Address are A2~A0 for Word mode, A2~A-1 for Byte mode.

VALID ADD

Data 1 Data 2 Data 3

1'st ADD 2'nd ADD

Tpa Taa

3'rd ADD

Tpa

OE#

Toe

Tce

61P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 24. DEEP POWER DOWN MODE WAVEFORM

CEB

WEB

ADD

DATA

XX

B9

2AA55

tDP

XX (don't care)

AB

Standby mode

AA 55

Deep power down mode

tRDP

Standby mode

ITEM TYP MAXWEBhightoreleasefromdeeppowerdownmode tRDP 100us 200us

WEBhightodeeppowerdownmode tDP 10us 20us

AC CHARACTERISTICS

62P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

Figure 25. WRITE BUFFER PROGRAM FLOWCHART

Write CMD: Data=AAh, Addr=555h

Write CMD: Data=55h, Addr=2AAh

Write CMD: Data=25h, Addr=SA

SA: Sector Address of to be Programmed page

Write CMD: Data=PWC, Addr=SA

PWC: Program Word Count

Write CMD:Data=PGM_data, Addr=PGM_addr

PWC =0?

Write CMD: Data=29h, Addr=SA

Polling Status

Yes

Pass

No

No

Write Buffer Abort

Write reset CMD to return to read Mode

PWC=PWC-1 NoFail

YesWant to Abort ?

Yes

NoNo

Yes

Return to read Mode

Write Abort reset CMD to return to read Mode

Write a different sector address to cause Abort

Yes

63P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

RECOMMENDED OPERATING CONDITIONS

At Device Power-Up

ACtimingillustratedinFigure Aisrecommendedforthesupplyvoltagesandthecontrolsignalsatdevicepower-up(e.g.VccandCE#rampupsimultaneously).Ifthetiminginthefigureisignored,thedevicemaynotoperatecorrectly.

Figure A. AC Timing at Device Power-Up

Vcc

ADDRESS

CE#

WE#

OE#

DATA

Tvr

TaaTr or Tf Tr or Tf

TceTf

Vcc(min)

GND

VIOVIO(min)

GND

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Voh High ZVol

WP#/ACC

ValidOuput

ValidAddress

Tvcs

Tvr Tvios

Tr

ToeTfTr

Symbol Parameter Min. Max. UnitTvr VccRiseTime 20 500000 us/VTr InputSignalRiseTime 20 us/VTf InputSignalFallTime 20 us/V

Tvcs VccSetupTime 500 usTvios VI/OSetupTime 500 us

Notes: 1.VI/O<VCC+200mV.2.Nottest100%.

64P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

LATCH-UP CHARACTERISTICS

ERASE AND PROGRAMMING PERFORMANCE

PIN CAPACITANCE

Notes:1. Typicalprogramanderasetimesassumethefollowingconditions:25°C,3.0VVCC.Programmingspecifica-

tionsassumecheckboarddatapattern.2.MaximumvaluesaremeasuredatVCC=3.0V,worstcasetemperature.Maximumvaluesarevaliduptoand

including100,000program/erasecycles.3.Erase/ProgramcyclescomplywithJEDECJESD-47&22-A117standard.4.Exclude00hprogrambeforeeraseoperation.

Parameter Symbol Parameter Description Test Set Typ. Max. UnitCIN2 ControlPinCapacitance VIN=0 7.5 15 pFCOUT OutputCapacitance VOUT=0 8.5 12 pFCIN InputCapacitance VIN=0 6 7.5 pF

Min. Max.InputVoltagevoltagedifferencewithGNDonWP#/ACCandA9pins -1.0V 10.5VInputVoltagevoltagedifferencewithGNDonallnormalpinsinput -1.0V 1.5VccVccCurrent -100mA +100mAAllpinsincludedexceptVcc.Testconditions:Vcc=3.0V,onepinpertesting

Parameter Limits UnitsMin. Typ. (1) Max. (2)ChipEraseTime 60 150 sec

SectorEraseTime 0.5 3.5 sec

ChipProgrammingTime 50 180 sec

WordProgramTime 10 180 us

TotalWriteBufferTime 150 800 us

ACCTotalWriteBufferTime 75 us

Erase/ProgramCycles 100,000 Cycles

DATA RETENTION

Parameter Condition Min. Max. UnitDataretention 55˚C 20 years

65P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

ORDERING INFORMATION

PART NO. ACCESS TIME (ns) PACKAGE RemarkMX29GL128EHMC-90G* 90 70PinSSOP VI/O=VCC

MX29GL128EHXFI-90G 90 64LFBGA VI/O=VCC

MX29GL128ELXFI-90G 90 64LFBGA VI/O=VCC

MX29GL128EHXCI-90G 90 64FBGA VI/O=VCC

MX29GL128ELXCI-90G 90 64FBGA VI/O=VCC

MX29GL128EHT2I-90G 90 56PinTSOP VI/O=VCC

MX29GL128ELT2I-90G 90 56PinTSOP VI/O=VCC

MX29GL128EUXFI-11G 110 64LFBGA VI/O=1.65toVCC

MX29GL128EDXFI-11G 110 64LFBGA VI/O=1.65toVCC

MX29GL128EUT2I-11G 110 56PinTSOP VI/O=1.65toVCC

MX29GL128EDT2I-11G 110 56PinTSOP VI/O=1.65toVCC

Note : *1.70-pinSSOPonlyforPachinkoSocket.

66P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

PART NAME DESCRIPTIONMX 29 GL 90E H T2 I G

OPTION:G: RoHS compliant & Halogen-free with Vcc: 2.7V~3.6V

SPEED:90: 90ns11: 110ns

TEMPERATURE RANGE:I: Industrial (-40° C to 85° C)C: Commercial (0° C to 70° C)

PACKAGE:

PRODUCT TYPE (Protection when WP#=VIL):

REVISION:E

DENSITY & MODE:128: 128Mb x8/x16 Architecture

GL: 3V Page ModeTYPE:

DEVICE:29:Flash

128

T2: 56-TSOPM: 70SSOPXF: LFBGA (11mm x 13mm)XC: FBGA (10mm x 13mm)

H: VI/O=VCC=2.7 to 3.6V, Highest Address Sector ProtectedL: VI/O=VCC=2.7 to 3.6V, Lowest Address Sector ProtectedU: VI/O=1.65 to VCC, VCC=2.7 to 3.6V, Highest Address Sector ProtectedD: VI/O=1.65 to VCC, VCC=2.7 to 3.6V, Lowest Address Sector Protected

67P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

PACKAGE INFORMATION

68P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

69P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

70P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

71P/N:PM1500 REV. 1.8, NOV. 13, 2013

MX29GL128E

REVISION HISTORY

Revision No. Description Page Date1.0 1.Revised70-SSOP ground pin configurations. P4 APR/28/2009 2.Addedovershoot & undershoot specifications. P37 3.Removed"Preliminary". P2 4.Changeddataretentionfrom10yearsto20years. P2,61 5.ModifiedTdf(max.)=20ns. P40

1.1 1.Added1.8VVI/Oinformation. P2,37,40 JUN/29/2009 P64,65 2.ModifiedTsrw(min.)=35ns. P40 3.AddedIcr2parameterand"statusPollingforwritebufferprogram" P38,56 flowchart. 4.Addedednotes. P41,64 5.Contentcorrection. P14,39 6.ModifedthetitleofFigure 16aswritebufferandaddednotes. P56

1.2 1.Addedunused CFI area reservation notice. P34 NOV/22/2010 2.Addedwording"e.g. Vcc and CE# ramp up simultaneously" P62 3.ModifiedFigure A. AC Timing at Device Power-Up P62 4.ModifiedtimingwaveformatFigure 10 andFigure 14. P50,54 5.Modified"PIN CAPACITANCE"table P63 6.ModifieddescriptionforRoHScompliance P2,65 7.ModifiedFigure2.READTIMINGWAVEFORMS P43

1.3 1.ModifiedPARTNAMEDESCRIPTION P65 MAR/08/2011

1.4 1.ModifiedFigure16.StatusPollingForWriteBufferProgram P56 JUN/03/2011 2.ModifiedthedescriptionofWriteBufferProgrammingOperation P14

1.5 1.ModifiedFigure11.CE#ControlledWriteTimingWaveform P51 DEC/21/20111.6 1.AdvancedSectorProtection/Un-Protectiondescriptionupdate P24~29 AUG/12/2013 2.AddedNote1.Querydataarealwayspresentedonthelowest P34 dataoutputQ7~Q0only,Q8~Q15are"0". 3.ModifiedFigure 23. PAGE READ TIMING WAVEFORM P60 4.AddedMAX.TotalWriteBufferTime P64

1.7 1.UpdatedparametersforDCCharacteristics. P2,38 OCT/30/2013 2.UpdatedEraseandProgrammingPerformance. P2,41,64 3.Contentcorrection P24~29

1.8 1.UpdatedparametersforDCCharacteristics. P38 NOV/13/2013

72

MX29GL128E

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MX29GL128E DATASHEET - MXIC