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Multiplication and Division Lab 9

Multiplication and Division

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Multiplication and Division. Lab 9. Multiplication. 1101 x 1011 1101 1101 100111 0000 100111 1101 10001111. 13 x11 13 13 143 = 8Fh. Multiplication. 1101 x 1011 1101 1101 100111 0000 100111 1101 10001111. 1101 0000 1011 - PowerPoint PPT Presentation

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Page 1: Multiplication and Division

Multiplication and Division

Lab 9

Page 2: Multiplication and Division

Multiplication

13x11 1313 143 = 8Fh

1101 x1011 1101 1101 100111 0000 100111 1101 10001111

Page 3: Multiplication and Division

Multiplication

1101 x1011 1101 1101 100111 0000 100111 1101 10001111

11010000101101101101 adsh1101 10011110 adsh

1001111 sh1101 10001111 adsh

Page 4: Multiplication and Division

MultiplicationUM* ( u1 u2 -- upL upH )

T N

N2

mpp (multiply partial product) if N(0) = 1 then adsh else sh end if;

: UM* ( u1 u2 -- ud) LIT 0 mpp mpp mpp mpp ROT DROP ;

All other signed and unsigned multiplication can bederived from UM*

Page 5: Multiplication and Division

ReturnStack

RmuxPmux

PCclrclk

pload

pinc

IRclrclkirload

WC16_control

plus1

R

Tin

Rin

R T

P

Pin

M

M P1

R

M

The WC16WHYP Core

clkclr

rpop

rpush

psel rinsel

tsel(2:0)

rload

rdec

rsel

T

icode

E1(15:0)

B(1:4)DataStackclk

clr

dpop

dpush

ssel

nloadnsel

tload

y1(15:0)

T

0 11

1

0

0 2 3Tmux

Funit2

NN2

y(15:0)

y NN2E2E1S

S(1:8)

54 6 7

E2(15:0)

P(15:0)

M(15:0)

clr

clk

T(15:0)

N(15:0)

oe

we

Fcode(5:0)

digload

cs

LCD_RW

LCD_RS

LCD_E

y1

Modifications forMultiplication and Division

Page 6: Multiplication and Division

variable AVector: STD_LOGIC_VECTOR (width downto 0);

variable BVector: STD_LOGIC_VECTOR (width downto 0);

variable CVector: STD_LOGIC_VECTOR (width downto 0);

variable yVector: STD_LOGIC_VECTOR (width downto 0);

variable y1_tmp: STD_LOGIC_VECTOR (width-1 downto 0);

AVector := '0' & a;

BVector := '0' & b;

CVector := '0' & c;

y1_tmp := false;

yVector := '0' & false;

begin

Page 7: Multiplication and Division

when "011101" => -- mpp

if b(0) = '1' then

yVector := AVector + CVector;

else

yVector := AVector;

end if;

y <= yVector(width downto 1);

y1 <= yVector(0) & b(width-1 downto 1);

mpp (multiply partial product) if N(0) = 1 then adsh else sh end if;

T N

N2

Page 8: Multiplication and Division

: UM* ( u1 u2 - upL upH )0mpp mpp mpp mpp mpp mpp mpp mpp mpp mpp mpp mpp mpp mpp mpp mpp ROT_DROP ;

16 x 16 = 32 Multiplication

Page 9: Multiplication and Division

Division

1101 100001111010

110100111 0000 01111 1101 00101 0000 0101

13 135 13 05

10

Page 10: Multiplication and Division

Division 8-bit/4-bit = 4:4

1101 100001111010

110100111 0000 01111 1101 00101 0000 0101

_10000111 1101

numer[8:0]denom[3:0]

If denom < numer[7:4] then overflow (quotient won’t fit in 4 bits)

Let T = numer[8:4] N = numer[3:0] N2 = denom[3:0]

Page 11: Multiplication and Division

Division 8-bit/4-bit = 4:4

1101 100001111010

110100111 0000 01111 1101 00101 0000 0101

100001110 1101

sllT N

N2

for I in 0 to 3 loop sll T & N; if T[8:4] > N2 then T := T - (0 & N2); N(0) := ‘1’; end if;end loop;

Page 12: Multiplication and Division

Division 8-bit/4-bit = 4:4

1101 100001111010

110100111 0000 01111 1101 00101 0000 0101

100001110 1101

sllT N

N2

001111110 1101

sub1sll

011111100 1101

sll

001011010 sub1sllrem quot

Page 13: Multiplication and Division

Division

: UM/MOD ( unumL unumH udenom -- urem uquot )

All other signed and unsigned divisionoperations can be derived as WHYP wordsfrom UM/MOD

TNN2

TN N2

-ROT \ udenom unumL unumHSHLDCSHLDCSHLDCSHLDC \ denom quot remROT_DROP_SWAP ;

Page 14: Multiplication and Division

when "011110" => -- shldc

yVector := a & b(width-1);

y1_tmp := b(width-2 downto 0) & '0';

if yVector > CVector then

yVector := yVector - CVector;

y1_tmp(0) := '1';

end if;

for I in 0 to 3 loop sll T & N; if T[8:4] > N2 then T := T - (0 & N2); N(0) := ‘1’; end if;end loop;

100001110 1101

sllT N

N2

y <= yVector(width-1 downto 0);

y1 <= y1_tmp;

Page 15: Multiplication and Division

32 / 16 = 16:16 Division

: UM/MOD ( unL unH ud -- ur uq ) -ROT

shldc shldc shldc shldcshldc shldc shldc shldcshldc shldc shldc shldcshldc shldc shldc shldc ROT_DROP_SWAP ;

Page 16: Multiplication and Division

Hex DivisionTable 10.9

Hexadecimal Multiplication Table0 1 2 3 4 5 6 7 8 9 A B C D E F

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 01 1 2 3 4 5 6 7 8 9 A B C D E F2 4 6 8 A C E 10 12 14 16 18 1A 1C 1E3 9 C F 12 15 18 1B 1E 21 24 27 2A 2D4 10 14 18 1C 20 24 28 2C 30 34 38 3C5 19 1E 23 28 2D 32 37 3C 41 46 4B6 24 2A 30 36 3C 42 48 4E 54 5A7 31 38 3F 46 4D 54 5B 62 698 40 48 50 58 60 68 70 789 51 5A 63 6C 75 7E 87A 64 6E 78 82 8C 96B 79 84 8F 9A A5C 90 9C A8 B4D A9 B6 C3E C4 D2F E1

EE BC2FC

C x E = A8C x E = A8 + A = B2

B28 9AF

A

Page 17: Multiplication and Division

Hex DivisionTable 10.9

Hexadecimal Multiplication Table0 1 2 3 4 5 6 7 8 9 A B C D E F

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 01 1 2 3 4 5 6 7 8 9 A B C D E F2 4 6 8 A C E 10 12 14 16 18 1A 1C 1E3 9 C F 12 15 18 1B 1E 21 24 27 2A 2D4 10 14 18 1C 20 24 28 2C 30 34 38 3C5 19 1E 23 28 2D 32 37 3C 41 46 4B6 24 2A 30 36 3C 42 48 4E 54 5A7 31 38 3F 46 4D 54 5B 62 698 40 48 50 58 60 68 70 789 51 5A 63 6C 75 7E 87A 64 6E 78 82 8C 96B 79 84 8F 9A A5C 90 9C A8 B4D A9 B6 C3E C4 D2F E1

EE BC2FC

A x E = 8CA x E = 8C + 8 = 94

B28 9AF

A

94C 63

Dividend = BC2FDivisor = EEQuotient = CARemainder = 63

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