Microprocessors Questions and Answers Interrupts and Interrupt
Service RoutinesThis set of Microprocessor Multiple Choice
Questions & Answers (MCQs) focuses onInterrupts and Interrupt
Service Routines.1. While CPU is executing a program, an interrupt
exists then ita) follows the next instruction in the programb)
jumps to instruction in other registersc) breaks the normal
sequence of execution of instructionsd) stops executing the
programAnswer: cExplanation: An interrupt function is to break the
sequence of operation.2. An interrupt breaks the execution of
instructions and diverts its execution toa) Interrupt service
routineb) Counter word registerc) Execution unitd) Control
unitAnswer: aExplanation: An interrupt transfers the control to
interrupt service routine (ISR). After executing ISR, the control
is transferred back again to main program.3. While executing main
program, if two or more interrupts occur, then the sequence of
appearance of interrupts is calleda) multi-interruptb) nested
interruptc) interrupt within interrupt
d) nested interrupt and interrupt within interruptAnswer:
dExplanation: If an interrupt occurs while executing a program, and
the processoris executing the interrupt, if one more interrupt
occurs again, then it is called nested interrupt.4. Whenever a
number of devices interrupt a CPU at a time, and if the processoris
able to handle them properly, it is said to havea) interrupt
handling abilityb) interrupt processing abilityc) multiple
interrupt processing abilityd) multiple interrupt executing
abilityAnswer: cExplanation: The processor if handles more devices
as interrupts then it has mul
tiple interrupt processing ability.5. NMI stands fora)
nonmaskable interruptb) nonmultiple interruptc) nonmovable
interruptd) noneAnswer: aExplanation: NMI is the acronym for
nonmaskable interrupt.7. If any interrupt request given to an input
pin cannot be disabled by any means then the input pin is calleda)
maskable interruptb) nonmaskable interruptc) maskable interrupt and
nonmaskable interrupt
d) noneAnswer: bExplanation: A non-maskable interrupt input pin
is one which means that any interrupt request at NMI (non-maskable
interrupt) input cannot be masked or disabledby any means.8. The
INTR interrupt may bea) maskableb) non-maskablec) maskable and
non-maskabled) none
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Answer: aExplanation: the INTR (interrupt request) is maskable
or can be disabled.9. The Programmable interrupt controller is
required toa) handle one interrupt requestb) handle one or more
interrupt requests at a timec) handle one or more interrupt
requests with a delayd) handle no interrupt requestAnswer:
bExplanation: If more than one interrupt request (INTR) occurs at a
time, then anexternal chip called programmable interrupt controller
is required to handle them.10. The INTR interrupt may be masked
using the flaga) direction flagb) overflow flagc) interrupt flagd)
sign flagAnswer: cExplanation: If microprocessor wants to serve any
interrupt then interrupt flag,IF=1. If interrupt flag, IF=0, then
the processor ignores the service.
