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Mosfet IRF640
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©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B
IRF640, RF1S640, RF1S640SM
18A, 200V, 0.180 Ohm, N-Channel Power MOSFETsThese are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits.
Formerly developmental type TA17422.
Features
• 18A, 200V
• rDS(ON) = 0.180Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speed
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”
Symbol
PackagingJEDEC TO-220AB JEDEC TO-263AB
JEDEC TO-262AA
Ordering InformationPART NUMBER PACKAGE BRAND
IRF640 TO-220AB IRF640
RF1S640 TO-262AA RF1S640
RF1S640SM TO-263AB RF1S640
NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S640SM9A.
G
D
S
GATE
DRAIN (FLANGE)
SOURCEDRAIN
DRAIN(FLANGE)GATE
SOURCE
DRAINSOURCE
GATEDRAIN (FLANGE)
Data Sheet January 2002
©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF640, RF1S640, RF1S640SM UNITSDrain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 200 VDrain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 200 VContinuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
1811
AA
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 72 AGate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 VMaximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 125 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oCSingle Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 580 mJOperating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oCMaximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TLPackage Body for 10s, See TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
300260
oCoC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of thedevice at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V, (Figure 10) 200 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2 - 4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 1) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 18 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 1) rDS(ON) ID = 10A, VGS = 10V (Figures 8, 9) - 0.14 0.18 Ω
Forward Transconductance (Note 1) gfs VDS ≥ 10V, ID = 11A (Figure 12) 6.7 10 - S
Turn-On Delay Time td(ON) VDD = 100V, ID ≈ 18A, RGS = 9.1Ω , RL = 5.4Ω,MOSFET Switching Times are Essentially Independent of Operating Temperature
- 13 21 ns
Rise Time tr - 50 77 ns
Turn-Off Delay Time td(OFF) - 46 68 ns
Fall Time tf - 35 54 ns
Total Gate Charge(Gate to Source + Gate to Drain)
Qg(TOT) VGS = 10V, ID ≈ 18A, VDS = 0.8 x Rated BVDSS (Figure 14) Gate Charge is Essentially Independent of Operating TemperatureIG(REF) = 1.5mA
- 43 64 nC
Gate to Source Charge Qgs - 8 - nC
Gate to Drain “Miller” Charge Qgd - 22 - nC
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 1275 - pF
Output Capacitance COSS - 400 - pF
Reverse Transfer Capacitance CRSS - 100 - pF
Internal Drain Inductance LD Measured From the Contact Screw on Tab to Center of Die
Modified MOSFET Symbol Showing the Internal Devices Inductances
- 3.5 - nH
Measured From the Drain Lead, 6mm (0.25in) From Package to Center of Die
- 4.5 - nH
Internal Source Inductance LS Measured From the Source Lead, 6mm (0.25in) from Header to Source Bonding Pad
- 7.5 - nH
Thermal Resistance Junction to Case RθJC - - 1 oC/W
Thermal Resistance Junction to Ambient
RθJA Free Air Operation, IRF640 - - 62 oC/W
RθJA RF1S640SM Mounted on FR-4 Board with Minimum Mounting Pad
- - 62 oC/W
LS
LD
G
D
S
IRF640, RF1S640, RF1S640SM
©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
- - 18 A
Pulse Source to Drain Current(Note 2)
ISDM - - 72 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 18A, VGS = 0V, (Figure 13) - - 2.0 V
Reverse Recovery Time trr TJ = 25oC, ISD = 18A, dISD/dt = 100A/µs 120 240 530 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 18A, dISD/dt = 100A/µs 1.3 2.8 5.6 µC
NOTES:
2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive Rating: Pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 3.37mH, RG = 25Ω, peak IAS = 18A.
Typical Performance Curves Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
G
D
S
0 50 100 1500
TC, CASE TEMPERATURE (oC)
PO
WE
R D
ISS
IPA
TIO
N M
ULT
IPL
IER
0.2
0.4
0.6
0.8
1.0
1.2
8
4
025 50 75 100 125 150
16
I D, D
RA
IN C
UR
RE
NT
(A
)
TC, CASE TEMPERATURE (oC)
20
12
tP, RECTANGULAR PULSE DURATION (s)
10
ZθJ
C, T
RA
NS
IEN
T
TH
ER
MA
L IM
PE
DA
NC
E (
oC
/W)
10-3 10-2 10-1 110-5 10-4
10
0.01
0.1
NOTES:DUTY FACTOR: D = t1/t2PEAK TJ = PDM x ZθJC + TC
PDM
t1t2
0.001
1
SINGLE PULSE
0.1
0.02
0.2
0.5
0.01
0.05
IRF640, RF1S640, RF1S640SM
©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves Unless Otherwise Specified (Continued)
VDS, DRAIN TO SOURCE VOLTAGE (V)
101
10
1
I D, D
RA
IN C
UR
RE
NT
(A
) 100
100
TC = 25oC
SINGLE PULSE
1000OPERATION IN THIS AREA MAY BELIMITED BY rDS(ON)
DC
100µs
10µs
1ms
10ms
TC = 25oC
1000
TJ = MAX RATED
VDS, DRAIN TO SOURCE VOLTAGE (V)
I D, D
RA
IN C
UR
RE
NT
(A
)
00 12 24 36 48
6
12
18
24
30
60
7V
6V
5V
4V
10V8V
PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAX
0
6
0 1.0 2.0 3.0 5.0
12
18
I D, D
RA
IN C
UR
RE
NT
(A
)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 6V
24
4.0
VGS = 7V
30VGS = 8V
VGS = 10V
VGS = 5VVGS = 4V
PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAX
0 4 6 8 1020.1
1
10
I D, D
RA
IN C
UR
RE
NT
(A
)
VGS, GATE TO SOURCE VOLTAGE (V)
100
150oC
25oC
PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAXVDS ≥ 50V
0
0.6
0.9
1.2
15 30 45 60
r DS
(ON
), D
RA
IN T
O S
OU
RC
E
ID, DRAIN CURRENT (A)
75
1.5
0
0.3 VGS= 10V
VGS = 20V
ON
RE
SIS
TAN
CE
(Ω
)
PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAX
NO
RM
AL
IZE
D D
RA
IN T
O S
OU
RC
E
3.0
1.8
1.2
0.6
0-60 -40 -20 0 20 40 60
TJ, JUNCTION TEMPERATURE (oC)
100 120 140 160
2.4
80
ON
RE
SIS
TAN
CE
PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAXVGS = 10V, ID = 18A
IRF640, RF1S640, RF1S640SM
©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specified (Continued)
1.25
1.05
0.95
0.85
0.75-60 -40 -20 0 20 40 60
TJ, JUNCTION TEMPERATURE (oC)
NO
RM
AL
IZE
D D
RA
IN T
O S
OU
RC
EB
RE
AK
DO
WN
VO
LTA
GE
100 120 140 160
1.15
80
ID = 250µA3000
600
01 10 100
C, C
APA
CIT
AN
CE
(p
F)
1800
VDS, DRAIN TO SOURCE VOLTAGE (V)
2400
1200
CISS
COSS
CRSS
CISS = CGS + CGDCRSS = CGDCOSS ≈ CDS + CGD
VGS = 0V, f = 1MHz
25oC
ID, DRAIN CURRENT (A)
gfs
, TR
AN
SC
ON
DU
CTA
NC
E (
S)
00 6 12 18 24
3
6
9
12
15
30
150oC
PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAX
0 0.8 1.2 1.6 2.00.41
10
100
I SD
, SO
UR
CE
TO
DR
AIN
CU
RR
EN
T (
A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
1000
25oC
150oC
PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAX
Qg, GATE CHARGE (nC)
VG
S, G
AT
E T
O S
OU
RC
E V
OLT
AG
E (
V)
00 15 30 45 60
4
8
12
16
20
75
ID = 28A
VDS = 100V
VDS = 160V
VDS = 40V
IRF640, RF1S640, RF1S640SM
©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDDRG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS90%
10%
tf
td(OFF)
tOFF
90%
50%50%
10%PULSE WIDTH
VGS
0
0
0.3µF
12VBATTERY 50kΩ
VDS
S
DUT
D
G
IG(REF)0
(ISOLATEDVDS
0.2µF
CURRENTREGULATOR
ID CURRENTSAMPLING
IG CURRENTSAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPEAS DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
IRF640, RF1S640, RF1S640SM
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.
2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.
This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.
This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.
This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.
Formative orIn Design
First Production
Full Production
Not In Production
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