Microwave OscillatorBy

Professor Syed Idris Syed Hassan

Sch of Elect. & Electron Eng

Engineering Campus USM

Nibong Tebal 14300

SPS Penang

One-port negative Oscillator using IMPATT or Gunn diodes

I

in(Z in)

L(Z L)

X L

R L

X in

R in

Negativeresistance

device

Negative resistance device is usually a biased diode. Oscillation occurred whence ZL= -Zinwhich implies

inoin

oin

oin

oin

oL

oLL ZZ

ZZ

ZZ

ZZ

ZZ

ZZ

1

Stability of oscillationOscillation takes place when the circuit first unstable, i.e Rin +RL < 0 . Rin depends on current and frequency. Any transient or noise will excite or cause oscillation . The oscillation will become stable when Rin +RL=0 and Xin +XL=0. The stable frequency is fo.

Let’s ZT(I,s)= Zin(I,s) +ZL(s)

Where I current and s=jis a complex frequency. Then for a small change in current I and in frequency s, the Taylor’s series for ZT(I,s) is

0,,,,

II

Zs

s

ZsIZsIZ

oooo Is

T

Is

TooTT

Continue (stability)

0, ooT sIZ

0,,

II

Zs

s

Z

oooo Is

T

Is

T

TT Z

js

Z

Therefore

Use the fact thatWhere s=a+j

I

Z

ZIZjI

sZ

IZjs

T

TT

IsT

T

oo

2

*

, /

//

/

/

If the transient caused by I and s to decay we must have < 0 when I>0 so that

0Im*

TT Z

I

Z Or subst ZT=RT+jXT 0

TTTT R

I

XX

I

R

Continue ( stability)

0/// LLL RIXIR

For passive load

By substituting ZT=Zin + ZL, the stability equation reduces to

0

inininLin R

I

XXX

I

RWhere Zin = Rin + j Xin

ZL =RL + jXL

Matching diode oscillatorEg. A negative -resistive diode having Gin=1.25 /40o (Zo=50ohm) at its desired operating point , for 6 GHz . Design a load matching network for one-port of 50 ohm load oscillator.

50

50

0.308

0.254

Diode

123441

1jZ

in

inin

12344 jZZ inL

By plotting ZL in Smith chart then match to 50 ohm as usual. The 50

FET oscillator

Transistor[S]

OUT T

L in

Terminatingnetwork

Loadnetwork(tuning)

(Z L) (Z in ) (Z out ) (Z T )

Negativeresistance

•Choose high degree of unstable device. Typically, common source or common gate are used.Often positive feedback to enhance instability.•Draw output stable circle and choose T for large negative resistance (I.e Zin). Then take ZL to match Zin. Choose RL

such that RL+Rin < 0, otherwise oscillation will cease.

Design

3in

LR

R

inL XX

T

T

T

Tin

L S

S

S

SSS

22

11

22

211211 11

1

L

L

L

Lout S

S

S

SSS

11

22

11

211222 11

L

LT S

S

22

111

Usually we have to choose

And For resonation

21122211 SSSS where

For steady -state

and

We can proved that

FET common gate

S D

G

50

50

50

50Z L

x1x2

y

TinL

Design 4GHz oscillator using common gate FET configurationwith 5nH inductor to increase instability. Output port is 50. S-parameter for FET with common source configuration are : (Zo=50) S11= 0.72/-116o, S21=2.6/76o, S12=0.03/57o,S22=0.73/-54o.

5nH

continueFirst we have to convert from common source S-parameter to common gate with series inductor S-parameter. This is usually done using CAD. The new S-parameter is given by

S11’= 2.18/-35o, S21’=2.75/96o, S12’=1.26/18o,S22’=0.52/155o.

Thus the output stability circle parameters are given as

oT

S

SSC 3308.1

2'2'22

*'*11

''22

665.0

2'2'22

'21

'12

S

SSRT

'21

'12

'22

'11

' SSSS where

Stable regionfor T

T

To determine T

Since S’11>1, thus the stable region is inside the shaded circle.

T can be choose anywhere in the Smith chart but the main objective in should be larger than 1. Let say we choose T=0.59/-104. Then calculate in, thus

o

T

Tin S

SSS 4.296.3

'1

'''

22

211211

Or Zin= -84 - j1.9

Then

9.1283

jjXR

Z inin

L

0.241

89.5

Using a transmission line to match a resistive load, thus we have a length of 0.241and a load of 89.5 . Using Rin/3 should ensure enough instability for the startup of oscillator. It is easier to implement ZL =90 ohm . The steady -state oscillation frequency will differ from 4Ghz due to the nonlinearity of the transistor

L

Towards generator

T

0.319

0.346For T matching, we can use open-stub to match 50 ohm. Plot T and then determine the YT. Moving towards load until meet the crossing point between SWR circle and the unity circle. That the distant between transistor and the stub. Obtain the susceptance and distance towards open circuit.

S D

G

50

50

50

5090ohm

0.241 0.319

0.346 TinL

Dielectric resonator

d

Dielectricresonator

Microstrip

oQj

RNZ

/21

2

LCo /1

Equivalent series impedance

Where N =coupling factor/turn ratioQ=R/oL (unloaded resonator)

o

ooL

o

e Z

RN

LNR

LR

Q

Qg

2/

/ 2

2

Ratio of unloaded to external Q is given by

RL=2Zo for loaded resistance = Zo for transmission line

where

Continue (Dielectric resonator)

g

g

RNZ

RN

ZRNZ

ZRNZ

ooo

oo

12 2

2

2

2

1

g

Reflection coefficient looking on terminated microstrip feedline towards resonator is given by

or

Q can be determined by simple measurement of reflection coefficient

Dielectric resonator oscillator

Matching andterminating

networkZo

DR

Matching andterminating

networkZo

DR

Parallel feedback Series feedback

Example (dielectric resonator osc.)

Design 2.4GHz dielectric resonator oscillator using series feedback with bipolar transistor having S-parameters (Zo=50ohm); S11= 1.8 / 130o , S12= 0.4 / 45o , S21= 3.8 /36o, S22= 0.7 / -63o. Determine the required coupling coefficient for dielectric resonator and matching.

d1

l1

d2 out

inL’ L

T

Zo

Solution

Circuit layout

continueProcedures1. Plot the stability circles

Output

Input

We choosein=0.6 /-130 o

2. Choose a point n

Inside the instability area

continue

L

Lout S

SSS

11

211222 1

1.67.431327.101

1327.10150

1

1jZZ

o

o

out

outoout

Calculate the out and in = L using this formula

We obtain out = 10.7/132o. This corresponding to

Then 1.65.53

jjXR

Z outout

T

Continue (output matching)

d1=0.034 l1=0.193 Or d1=0.429 l1=0.307

So we have

0.431

0.034

X

Network at resonator

Output

Input

We choosein=0.6 /-130 o

0.181

0.431

Resonator should be placed at zero or 180o of phase from the transistor. So we have either 0.181 (zero phase) or 0.431 (180o phase)

d2= 0.181 Or = 0.431

Noise in oscillator•Amplitude noise•Phase noise•Flicker noise

Phase noise-may be due to variation of device capacitance with variation of voltage.This is usually happened in amplifier.Amplitude noise may be converted to phase noise if the amplifier is present. Noises cause frequency instability in oscillator.

Noise to Carrier Ratio (NCR)

gm=1/Rp

Vin VoutIout

In Rp Lp Cp

P

p

pp Qj

RjZ

1

o

o

Parallel impedances for Rp , Lp , and Cp can be written as

where

p

p

p

ppp L

R

L

CRQ

and

NCR Limit (cont)

)(1

)(

)(

)(

jZg

jZg

jV

jVjH

pm

pm

in

out

)(1

)(

)(

)(

jRgQj

jRg

jV

jVjH

pmp

pm

in

out

The transfer function of the oscillator is given by

Then substitute for Zp , we have

NCR (cont)

oo f

fthus

2

At oscillation

po

pin

out

Qff

jQjffjV

ffjVffjH

2

11

)(

)(

Where fo=oscillation frequency

And the gain condition (Barkhausen) for oscillation is gmRp=1

Thus, any changes will result

#%

NCR (cont)

pn R

kTBI

4

In the oscillator model, the noise source is Rp .The noise current produced is

k=Boltzman const , T = absolute temp.B= bandwidth

Since gm= 1/Rp and Iout= gm * Vin , the noise current can be transferred to input and hence Vin can be written as

BkTRffjV pin 4))((

where

**%%

NCR (cont)

2

22

21

m

o

prmscarrier

outo

f

f

QP

kTB

V

ffjV

P

N

p

rmscarrier

R

VP

2

Thus the Vout, can be obtained by substituting and squaring #% and **%% . We have

Taking B= 1 Hz and carrier voltage ,Vcarrier-rms

And the carrier power is given by

The noise to carrier ratio for SSB in Hz is given by

BkTR

Qff

ffjV p

po

out 42

1

2

2

2

Where fm =offset frequency from carrier

NCR (cont)

2

2

1

2

m

o

p

p

f

f

QP

kTB

P

N

For phase noise

Note: This ratio is half of the total noise since half will be converted to AM noise and half left for phase noise.

ExampleCalculate the phase noise to carrier ratio of an oscillator of 10MHz with Q=100. Assume the inductor is 2H and the peak voltage across it is 10V. Let the noise figure is 10dB.

LCf

2

1 pF

LfC 7.126

10210104

1

2

162622

92122 10335.610107.1262

1

2

1 p

CVU

sPUQ /

dBmmW

QfUQUPs698.3

100/10335.610102/2/ 96

dBP

kTBNCR

s

17310028.51098.32

102901038.1

218

3

23

Flicker noise ( 1/f noise)

2

21

22 m

o

s fQ

f

P

kTBNCR

As in previous example

fm NCR50kHz 170dB/Hz30kHz 168.5dB/Hz10kHz 159dB/Hz

Design for low 1/f noise

gs

mT C

gf

2

Cg

f mT 2

Design procedures:-1. Choose high Q-factor of the resonator2. Choose low 1/f noise active components (e.g Bipolar transistor)3. Choose transistor with the lowest possibility of fT . For good rule

of thumb fT < 2 x fosz .4. Low current best 1/f performance. Note that fT drops with low

current.

For high Q-factor choose parts that have low losses:1. Resonator2. Series resistance of capacitors3. Series resistance of tuning diode4. PCB.

cb

T

Cr

ff

8max

(HBT)(FET)

Maximum oscillation frequency (BJT)

Measure phase noise from VNA (for checking)

RF out

HP8714 VNAHP8594ESpectrumAnalyzer

1. Verify power input signal no higher than 10dBm2. Reduce input attenuation to minimum (0 dB)3. Determine the carrier power at large video and resolution bandwidth at

appropriate span (3MHz RBW, 1MHz VBW,50MHz span.4. Set span for single sideband ( desired offset frequency)5. Reduce VBW to 10 Hz, RBW to 1 kHz.6. Set marker to the carrier. Select marker to show the frequency

offset.7. Move the marker along the SSB phase noise curve and take reading.

MAX HOLD for maximum phase noise power( let the spectrum settle for 5 minutes )

8. Note that cable insertion loss should also be determined

Measure phase noise from VCO

HP8594E SpectrumAnalyzer

DC power supply

22dB adjustableattenuators

VCO undertest

RF out

Isolation Coupled (-10dB)

Narda 3042-10

Through Input

RF out

HP8548CSignal

Generator

Reducing Phase Noise in Oscillators

1. Maximize the Qu of the resonator. 2. Maximize reactive energy by means of a high RF voltage across the resonator. Use a low LC ratio. 3. Avoid device saturation and try to use anti parallel (back to back) tuning diodes. 4. Choose your active device with the lowest NF (noise figure). 5. Choose a device with low flicker noise, this can be reduced by RF feedback. A bipolar transistor with an unby-passed emitter resistor of 10 to 30 ohms can improve flicker noise by as much as 40 dB. - see emitter degeneration 6. The output circuits should

YIG oscillator

L

L

S

SSSS

11

211222

'22 1

YIG crystal

d 1

S 11S 22s

L

Load

Matchingsection

dc magneticfield

FET

L

L

S

SSSS

22

211211

'11 1

Condition for oscillation

S11’>1 and S22

’>1

YIG equivalent circuitL1

R oLo

C o

)/( uooo QRL )/(1 2

ooo LC H

MHQ sou

431

umoo QVkR 2

where V= volume of YIG spherek=1/d1=coupling factor and d1 is the loop diameterm= 2fm=2 (4 Ms)Ho= dc magnetic filed= gyro magnetic ratio ( 28 GHz/Tesla)H= resonance line widthL1= self inductance of the loop4Ms= saturation magnetism

fo=resonance frequency=Ho

mff3

2min

Hartley Oscillator

Colpitts Oscillator

Effects of ambient changes on stability in oscillators

A frequency change of a few tens of hertz back and forth over a couple of minutes would mean nothing to an entertainment receiver designed for the FM Radio band. Such a drift in an otherwise contest grade receiver designed to receive CW (morse code) would be intolerable. It's a question of relativity.