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Virtualizing NoC resources in chip-multiprocessors Microprocessors and Microsystems Volume 35, Issue 2, March 2011, Pages 230–245 Special issue on Network-on-Chip Architectures and Design Methodologies Francisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich 王王王 2012.10.24

Microprocessors and Microsystems Volume 35, Issue 2, March 2011, Pages 230–245 Special issue on Network-on-Chip Architectures and Design Methodologies

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Page 1: Microprocessors and Microsystems Volume 35, Issue 2, March 2011, Pages 230–245 Special issue on Network-on-Chip Architectures and Design Methodologies

Virtualizing NoC resources in chip-multiprocessors

Microprocessors and MicrosystemsVolume 35, Issue 2, March 2011, Pages 230–245

Special issue on Network-on-Chip Architectures and Design MethodologiesFrancisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich

王健宇2012.10.24

Page 2: Microprocessors and Microsystems Volume 35, Issue 2, March 2011, Pages 230–245 Special issue on Network-on-Chip Architectures and Design Methodologies

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Introduction NoC virtualization Performance evaluation Experimental results Conclusions

Outline

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Introduction NoC virtualization Performance evaluation Experimental results Conclusions

Outline

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Chip-mutiprocessors (CMP) are expected in the future

Applications run in CMP increase◦ Applications share resource, CMP load increase◦ Affect the performance of applications

Isolate the traffic of different applications to increase applications performance◦ Partition CMP into several regions

Introduction

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Introduction (cont.)

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Introduction (cont.)

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Introduction NoC virtualization Performance evaluation Experimental results Conclusions

Outline

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Partition CMP into several regions Virtual-regions (VR)

◦ Traffic can not traverse other regions Virtual-domains (VD)

◦ Message can cross the boundaries of the regions Logic-Based Distributed Routing (LBDR)

NoC virtualization

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NoC virtualization (cont.)

Virtual-regions (VR) Virtual-domains (VD)

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2 sets of bits per output port◦ 1 bit per port: connection◦ 2 bit per port: routing

Logic-Based Distributed Routing

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LBDR (cont.)

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Introduction NoC virtualization Performance evaluation Experimental results Conclusions

Outline

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Simulation environment System integration CMP model Workload Scenarios

Performance evaluation

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Simulation environmentSimics-GEMS

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System integration

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CMP model A processing element A router A private L1 cache A shared L2 cache A memory directory bank A memory controller

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CMP model (cont.)

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PARSEC v2.1 benchmark

Workload

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Baseline scenarios VR/VD scenarios

◦ Divided the CMP in four regions◦ Each region has the same number of resources◦ Each application is assigned to one region

Scenarios

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Baseline scenarios

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VR scenarios

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VR scenarios (cont.)

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VD scenarios

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Introduction NoC virtualization Performance evaluation Experimental results Conclusions

Outline

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Static Applications start until the first application

end (Blackscholes) Each scenario with 3 different packet

injection rates (PIR) Performance metrics

◦ Execution time◦ Network latency◦ Network throughput◦ Energy consumption◦ Link utilization

Experimental results

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Execution time

a

b

c

d

24%

18%

25%

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Execution time (cont.)

Blackscholes, Swaptions, Streamcluster, Fluidanimate

4%9%

Applications set two

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Network latency

a

b

c

d

29%

32%

33%

19%

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Network throughput

a

b

c

d

6%

8%18%

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Energy consumption

a

b

c

d

13%

10%

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Link utilization

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Link utilization (cont.)

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Link utilization (cont.)

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Link utilization (cont.)

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Introduction NoC virtualization Performance evaluation Experimental results Conclusions

Outline

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Improve the performance in CMP Partition CMP into several regions to isolate

the traffic of different applications Dynamic assign resources is a question

Conclusions