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    UNIT IV

    MICROCONTROLLERS

    INTRODUCTIONMicrocontrollers have only been with us for a few decades but their impact(direct or indirect) on our lives is profound. Usually these are supposed to

    be just data processors performing exhaustive numeric operations. But

    their presence is unnoticed at most of the places like

    At supermarkets in Cash Registers, Weighing Scales, etc.

    At home in Ovens, Washing Machines, Alarm Clocks, etc.

    At play in Toys, VCRs, Stereo Equipment, etc.

    At office in Typewriters, Photocopiers, Elevators, etc.

    In industry in Industrial Automation, safety systems, etc.

    On roads in Cars, Traffic Signals, etc.

    What inside them makes these machines _smart_? The answer is

    microcontroller. Creating applications for the microcontrollers is different

    than any other development job in electronics and computing. Before

    selecting a particular device for an application, it is important to

    understand what the different options and features are and what they can

    mean with regard to developing the application.

    MICROCONTROLLERS AND MICROPROCESSORSA controller is used to control some process. At one time, controllers were

    built exclusively from logic components, and were usually large, heavy

    boxes. Later on, microprocessors were used and the entire controller could

    fit on a small circuit board. This is still common one can find many

    controllers powered by one of the many common microprocessors

    (including Zilog Z80, Intel 8088, Motorola 6809, and others). As the

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    process of miniaturization continued, all of the components needed for a

    controller

    were built right onto one chip. A one chip computer, or microcontroller

    was born. A CPU built into a single VLSI chip is called microprocessor.The simplified block diagram of the CPU is shown in the Fig. 1.1. It

    contains arithmetic and logic unit (ALU), Instruction decode and control

    unit, Instruction register, Program counter (PC), clock circuit (internal or

    external), reset circuit (internal or external) and registers. For example,

    Intel 8085 is 8-bit microprocessor and Intel 8086/8088 is 16-bit

    microprocessor. Microprocessor is general-purpose digital computer

    central processing unit (CPU). The microprocessor is general-purpose

    device and additional external circuitry are added to make it

    microcomputer.

    A digital computer having microprocessor as the CPU along with I/O

    devices and memory is known as microcomputer. The block diagram in

    the Fig. 1.2 shows a microcomputer.

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    A microcontroller is a highly integrated chip, which includes on single

    chip, all or most of the parts needed for a controller. The microcontroller

    typically includes: CPU (Central Processing Unit), RAM (Random Access

    Memory), EPROM/PROM/ROM (Erasable Programmable Read Only

    Memory), I/O (input/output) serial and parallel, timers, interrupt

    controller. For example, Intel 8051 is 8-bit microcontroller and Intel 8096

    is 16-bit microcontroller.

    By only including the features specific to the task (control), cost is

    relatively low. A typical microcontroller has bit manipulation instructions,

    easy and direct access to I/O (input/output), and quick and efficient

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    interrupt processing. Figure 1.3 shows the block diagram of a typical

    microcontroller.

    COMPARING MICROPROCESSORS AND

    MICROCONTROLLERS Microprocessor is a single chip CPU, microcontroller contains, a CPU

    and much of the remaining circuitry of a complete microcomputer system

    in a single chip.

    Microcontroller includes RAM, ROM, serial and parallel interface,

    timer, interrupt schedule circuitry (in addition to CPU) in a single chip.

    RAM is smaller than that of even an ordinary microcomputer, but enough

    for its applications.

    Interrupt system is an important feature, as microcontrollers have to

    respond to control oriented devices in real time. E.g., opening of

    microwave ovens door cause an interrupt to stop the operation. (Most

    microprocessors can also implement powerful interrupt schemes, but

    external components are usually needed).

    Microprocessors are most commonly used as the CPU in microcomputer

    systems. Microcontrollers are used in small, minimum component designs

    performing control-oriented activities.

    Microprocessor instruction sets are _processing intensive_, implying

    powerful addressing modes with instructions catering to large volumes of

    data. Their instructions operate on nibbles, bytes, etc. Microcontrollers

    have instruction sets catering to the control of inputs and outputs. Their

    instructions operate also on a single bit. E.g., a motor may be turned ON

    and OFF by a 1-bit output port.

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    Before going in to details of microcontrollers it will be beneficial to go

    through common and frequently used terminology encountered in the

    description of microcontrollers.

    CENTRAL PROCESSING UNIT (CPU)

    CPU is the brain of the computer system, administers all activity in the

    system and performs all operations on data. It continuously performs two

    operations: fetching and executing instructions. It understand and execute

    instructions based on a set of binary codes called the instruction set.

    Machine CycleTo execute an instructionthe processor must:

    1. Fetch the instruction from memory

    2. Decode the instruction

    Introduction to Microcontroller _

    3. Execute the instruction

    4. Store the result back in the memory. These four steps refer to Machine

    Cycle.

    Generally one machine cycle = X clock cycles (_X_ depends on the

    particular instruction being executed). Shorter the clock cycle, lesser the

    time it takes to complete one machine cycle, so instructions are executed

    faster. Hence, faster the processor.FETCHING AND EXECUTING AN INSTRUCTION

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    Fetching involves the following steps:

    (a) Contents of PC are placed on address bus.

    (b) READ signal is activated.

    (c) Data (instruction opcode) are read from RAM and placed on data bus.(d) Opcode is latched into the CPUs internal instruction register.

    (e) PC is incremented to prepare for the next fetch from memory.

    While execution involves decoding the opcode and generating control

    signals to gate internal registers in and out of the ALU and to signal the

    ALU to perform the specified operation.

    THE BUSES: ADDRESS, DATA, AND CONTROL

    A BUS is a collection of wires carrying information with a common

    purpose. For each read or write operation, the CPU specifies the location

    of the data or instruction by placing an address on the address bus, then

    activates a signal on the control bus indicating whether the operation is

    read or write.

    READ OPERATIONS retrieve a byte of data from memory at the

    location specified and place it on the data bus. CPU reads the data and

    places it in one of its internal registers.

    WRITE OPERATIONS put data from CPU on the data bus and store it in

    the location specified.

    ADDRESS BUS carries the address of a specified location. For n address

    lines, 2n locations can be accessed. E.g., A 16-bit address bus can access

    216 = 65,536 locations or 64K locations (210 = 1024 = 1K, 26 = 64).

    DATA BUS carries information between the CPU and memory or between

    the CPU and I/O devices.

    CONTROL BUS carries control signals supplied by the CPU to

    synchronize the movement of information on the address and data bus.

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    Microcontroller and Embedded System

    CONTROL/MONITOR (INPUT/OUTPUT) DEVICES

    CONTROL DEVICES are outputs, or actuators, that can affect the world

    around them when supplied with a voltage or current.MONITORING DEVICES are inputs, or sensors, that are stimulated by

    temperature, pressure, light, motion, etc. and convert this to voltage or

    current read by the computer.

    Note: The interface circuitry converts the voltage or current to binary data,

    or vice versa.

    TYPES OF MICROCONTROLLERSMicrocontrollers can be classified on the basis of internal bus width,

    architecture, memory and instruction set. Figure 1.4 shows the various

    types of microcontrollers.

    THE 8,16 AND 32-BIT MICROCONTROLLERS

    THE 8-BIT MICROCONTROLLER

    When the ALU performs arithmetic and logical operations on a byte (8-

    bits) at an instruction, the microcontroller is an 8-bit microcontroller. The

    internal bus width of 8-bit microcontroller is of 8-bit. Examples of 8-bit

    microcontrollers are Intel 8051 family and Motorola MC68HC11 family.

    THE 16-BIT MICROCONTROLLER

    When the ALU performs arithmetic and logical operations on a word (16-

    bits) at an instruction, the microcontroller is an 16-bit microcontroller. The

    internal bus width of 16-bit microcontroller is of 16-bit. Examples of 16-

    bit microcontrollers are Intel 8096 family and Motorola MC68HC12 and

    MC68332 families. The performance and computing capability of 16 bit

    microcontrollers are enhanced with greater precision as compared to the 8-

    bit microcontrollers.

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    THE 32-BIT MICROCONTROLLER

    When the ALU performs arithmetic and logical operations on a double

    word (32- bits) at an instruction, the microcontroller is an 32-bit

    microcontroller. The internal bus width of 32-bit microcontroller is of 32-bit. Examples of 32-bit microcontrollers are Intel 80960 family and

    Motorola M683xx and Intel/Atmel 251 family. The performance and

    computing capability of 32 bit microcontrollers are enhanced with greater

    precision as compared to the 16-bit microcontrollers.

    EMBEDDED AND EXTERNAL MEMORY

    MICROCONTROLLERS

    EMBEDDED MICROCONTROLLERS

    When an embedded system has an microcontroller unit that has all thefunctional blocks (including program as well as data memory) available on

    a chip is called an embedded microcontroller. For example, 8051 having

    Program & Data Memory, I/O Ports, Serial Communication, Counters and

    Timers and Interrupt Control logic on the chip is an embedded

    microcontroller.

    EXTERNAL MEMORY MICROCONTROLLERS

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    When an embedded system has an microcontroller unit that has not all the

    functional blocks available on a chip is called an external memory

    microcontroller. In external memory microcontroller, all or part of the

    memory units are externally interfaced using an interfacing circuit calledthe glue circuit. For example, 8031 has no program memory on the chip is

    an external memory microcontroller.

    - CISC (COMPLEX INSTRUCTION SET COMPUTER)

    ARCHITECTURE

    MICROCONTROLLERS

    Almost all of todays microcontrollers are based on the CISC (Complex

    Instruction Set Computer) concept. When an microcontroller has an

    instruction set that supports many addressing modes for the arithmetic and

    logical instructions, data transfer and memory accesses instructions, the

    microcontroller is said to be of CISC architecture. The typical CISC

    microcontroller has well over 80 instructions, many of them very powerful

    and very specialized for specific control tasks. It is quite common for the

    instructions to all behave quite differently. Some might only operate on

    certain address spaces or registers, and others might only recognize certain

    addressing modes. The advantages of the CISC architecture are that many

    of the instructions are macrolike, allowing the programmer to use one

    instruction in place of many simpler instructions. An example of CISC

    architecture microcontroller is Intel 8096 family.

    - RISC (REDUCED INSTRUCTION SET COMPUTER)

    ARCHITECTURE

    MICROCONTROLLERS

    The industry trend for microprocessor design is for Reduced Instruction

    Set Computers (RISC) designs. When a microcontroller has an instruction

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    set that supports fewer addressing modes for the arithmetic and logical

    instructions and for data transfer instructions, the microcontroller is said to

    be of RISC architecture. The benefits of RISC design simplicity are a

    smaller chip, smaller pin count, and very low power consumption.Some of the typical features of a RISC processor- Harvard architecture are

    1. Allows simultaneous access of program and data.

    2. Overlapping of some operations for increased processing performance.

    3. Instruction pipelining increases execution speed.

    4. Orthogonal (symmetrical) instruction set for programming simplicity.

    5. Allows each instruction to operate on any register or use any addressing

    mode.

    - SISC (SPECIFIC INSTRUCTION SET COMPUTER)

    Actually, a microcontroller is by definition a Reduced Instruction Set

    Computer. It could really be called a Specific Instruction Set Computer

    (SISC). The basic idea behind the microcontroller was to limit the

    capabilities of the CPU itself, allowing a complete computer (memory,

    I/O, interrupts, etc) to fit on the single chip. At the expense of the more

    general purpose instructions that make the standard microprocessors

    (8088, 68000, 32032) so easy to use, the instruction set was designed for

    the specific purpose of control (powerful bit manipulation, easy and

    efficient I/O, and so on).

    MICROCONTROLLER APPLICATIONS

    In addition to control applications such as the home monitoring system,

    microcontrollers are frequently found in embedded applications. Among

    the many uses that you can find one or more microcontrollers: automotive

    applications, appliances (microwave oven, refrigerators, television and

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    VCRs, stereos), automobiles (engine control, diagnostics, climate control),

    environmental control (greenhouse, factory, home), instrumentation,

    aerospace, and thousands of other uses.

    Microcontrollers are used extensively in robotics. In this application, manyspecific tasks might be distributed among a large number of

    microcontrollers in one system. Communications between each

    microcontroller and a central, more powerful microcontroller (or

    microcomputer, or even large computer) would enable information to be

    processed by the central computer, or to be passed around to other

    microcontrollers in the system.

    A special application that microcontrollers are well suited for is data

    logging. By stick one of these chips out in the middle of a corn field or up

    in a balloon, one can monitor Introduction to Microcontroller __ and

    record environmental parameters (temperature, humidity, rain, etc). Small

    size, low power consumption, and flexibility make these devices ideal for

    unattended data monitoring and recording.

    COMMERCIAL MICROCONTROLLER DEVICES

    Microcontrollers come in many varieties. Depending on the power and

    features that are needed, one might choose a 4 bit, 8 bit, 16 bit, or 32 bit

    microcontroller. In addition, some specialized versions are available which

    include features specific for communications,

    keyboard handling, signal processing, video processing, and other tasks.

    The examples of different types of commercial microcontroller devices are

    given in the following tables.

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    4.1. INTRODUCTION TO 8051 MICROCONTROLLER

    INTERNAL ARCHITECTURE

    A struggle has been going on between MCU manufacturers for quite a

    long time, each of them trying to best respond to the ever-increasing

    demands of the market. Every couple of days there is a brand new chip

    available, working at higher frequency, with more memory or with better

    A/D converters. And yet, a closer look to their interior reveals the same or

    at least very similar structural design referred to as 8051 compatibility.

    What is it all about? The story began in the 80s when Intel introduced

    their microcontroller family MCS 8051 to the market. Although this

    family had quite limited capabilities by todays notions, it quickly

    captivated the world and became the standard for what is today understood

    as microcontroller. The most significant cause for such a success can be

    found in the cleverly chosen configuration which can satisfy a diversity of

    needs, yet allowing for continuous upgrades (in form of new controllers).

    In a brief period of time, a decent amount of software has been developed

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    for 8051, making further changes of the hardware core simply

    uneconomical. Consequently, there is a variety of MCUs available today,

    basically just the upgraded 8051 models. What exactly makes this

    microcontroller so special and universal that it is still manufactured by allthe major companies, just under a different label?

    As can be seen on the image above, there is nothing particularly

    remarkable about MCU 8051:

    basicneeds, but is not really astounding.

    connecting to the

    environs and are by no means luxury. Obviously, 8051 configuration is

    intended to satisfy the needs of programmers developing the controlling

    devices and instruments. This is one part of its key to success: there is

    nothing missing, yet there is no lavishness; it is meant for the average user.

    The other clue can be found in the organization of RAM, Central

    Processor Unit (CPU), and ports - all of which maximally utilize the

    available resources and allow further upgrades.

    4.2. PIN DESCRIPTION OF 8086

    Pins On The Case

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    18: Port 1; Each of these pins can be used as either input or output

    according to your needs. Also, pins 1 and 2 (P1.0 and P1.1) have special

    functions associated with Timer 2.

    9: Reset Signal; High logical state on this input halts the MCU andclears all the registers. Bringing this pin back to logical state zero starts the

    program anew as if the power had just been turned on. In another words,

    positive voltage impulse on this pin resets the MCU. Depending on the

    devices purpose and environs, this pin is usually connected to the push-

    button, reset-upon-start circuit or a brown out reset circuit (covered in the

    previous chapter). The image shows one simple circuit for safe reset upon

    starting the controller. It is utilized in situations when power fails to reach

    its optimal voltage.

    10-17: Port 3; As with Port 1, each of these pins can be used as universal

    input or output. However, each pin of Port 3 has an alternative function:

    - serial input for asynchronous communication.

    11: TXD - serial output for asynchronous communication or clock

    output for synchronous communication

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    - input for interrupt 0

    - input for interrupt 1

    - clock input of counter 0

    - clock input of counter 1Pin 16: WR - signal for writing to external (add-on) RAM memory

    synchronous communication.

    - serial output for asynchronous communication or clock

    output for synchronous communication

    - input for interrupt 0

    - input for interrupt 1

    - clock input of counter 0

    - clock input of counter 1

    - signal for writing to external (add-on) RAM memory

    - signal for reading from external RAM memory

    18-19: X2 and X1; Input and output of internal oscillator. Quartz

    crystal controlling the frequency commonly connects to these pins.

    Capacitances within the oscillator mechanism (see the image) are not

    critical and are normally about 30pF. Instead of a quartz crystal, miniature

    ceramic resonators can be used for dictating the pace. In that case,

    manufacturers recommend using somewhat higher capacitances (about 47

    pF). New MCUs work at frequencies from 0Hz to 50MHz+.

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    20: GND; Ground

    21- 28: Port 2; If external memory is not present, pins of Port 2 act as

    universal input/output. If external memory is present, this is the location of

    the higher address byte, i.e. addresses A8 A15. It is important to note

    that in cases when not all the 8 bits are used for addressing the memory

    (i.e. memory is smaller than 64kB), the rest of the unused bits are not

    available as input/output.

    29: PSEN; MCU activates this bit (brings to low state) upon each

    reading of byte (instruction) from program memory. If external ROM is

    used for storing the program, PSEN is directly connected to its control

    pins.

    30: ALE; Before each reading of the external memory, MCU sends

    the lower byte of the address register (addresses A0 A7) to port P0 and

    activates the output ALE. External register (74HCT373 or 74HCT375

    circuits are common), memorizes the state of port P0 upon receiving a

    signal from ALE pin, and uses it as part of the address for memory chip.

    During the second part of the mechanical MCU cycle, signal on ALE is

    off, and port P0 is used asData Bus. In this way, by adding only one cheap

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    integrated circuit, data from port can be multiplexed and the port

    simultaneously used for transferring both addresses and data.

    31: EA; Bringing this pin to the logical state zero (mass) designates

    the ports P2 and P3 for transferring addresses regardless of the presence ofthe internal memory. This means that even if there is a program loaded in

    the MCU it will not be executed, but the one from the external ROM will

    be used instead. Conversely, bringing the pin to the high logical state

    causes the controller to use both memories, first the internal, and then the

    external (if present).

    32-39: Port 0; Similar to Port 2, pins of Port 0 can be used as

    universal input/output, if external memory is not used. If external memory

    is used, P0 behaves as address output (A0A7) when ALE pin is at high

    logical level, or as data output (Data Bus) when ALE pin is at low logical

    level.

    40: VCC; Power +5V

    4.3. InputOutput (I/O) Ports

    Every MCU from 8051 family has 4 I/O ports of 8 bits each. This provides

    the user with 32 I/O lines for connecting MCU to the environs. Unlike the

    case with other controllers, there is no specific SFR register for

    designating pins as input or output. Instead, the port itself is in charge:

    0=output, 1=input. If particular pin on the case is needed as output, the

    appropriate bit of I/O port should be cleared. This will generate 0V on the

    specified controller pin. Similarly, if particular pin on the case is needed as

    input, the appropriate bit of I/O port should be set. This will designate the

    pin as input, generating +5V as a side

    effect (as with every TTL input

    Port 0

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    Port 0 has two fold role: if external memory is used, it contains the lower

    address byte (addresses A0-A7), otherwise all bits of the port are either

    input or output. Another feature of this port comes to play when it has

    been designated as output. Unlike other ports, Port 0 lacks the pull upresistor (resistor with +5V on one end). This seemingly insignificant

    change has the following consequences:

    impedance

    offering the infinite input resistance with no inner voltage.

    output, pin acts as open drain. Clearing a port

    bit grounds the appropriate pin on the case (0V). Setting a port bit makes

    the pin act as high impedance.

    Therefore, to get positive logic (5V) at output, external pull up resistor

    needs to be added for connecting the pin to the positive pole. Therefore, to

    get one (5V) on the output, external pull up resistor needs to be added

    for connecting the pin to the positive

    pole.

    Port 1

    This is true I/O port, devoid of dual function characteristic for Port 0.

    Having the pull up resistor, Port 1 is fully compatible with TTL circuits

    Port 2

    When using external memory, this port contains the higher address byte

    (addresses A8A15), similar to Port 0. Otherwise, it can be used as

    universal I/O port

    Port 3

    Beside its role as universal I/O port, each pin of Port 3 has an alternate

    function. In order to use one of these functions, the pin in question has to

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    be designated as input, i.e. the appropriate bit of register P3 needs to be

    set. From a hardware standpoint, Port 3 is similar to Port 0.

    4.4. Memory

    During the runtime, microcontroller uses two different types of memory:one for holding the program being executed (ROM memory), and the other

    for temporary storage of data and auxiliary variables (RAM memory).

    Depending on the particular model from 8051 family, this is usually few

    kilobytes of ROM and 128/256 bytes of RAM. This amount is built-in and

    is sufficient for common tasks performed independently by the MCU.

    However, 8051 can address up to 64KB of external memory. These can be

    separate memory blocks, (separate RAM chip and ROM chip) totaling

    128KB of memory on MCU which is a real programming goody.

    ROM Memory

    First models from 8051 family lacked the internal program memory, but it

    could be added externally in a form of a separate chip. These MCUs can

    be recognized by their mark which begins with 803 (e.g. 8031 or 8032).

    New models have built-in ROM, although there are substantial variations.

    With some models internal memory cannot be programmed directly by the

    user. Instead, the user needs to proceed the program to the manufacturer,

    so that the MCU can be programmed (masked) appropriately in the

    process of fabrication. Obviously, this option is cost-effective only for

    large series. Fortunately, there are MCU models ideal for experimentation

    and small specialized series. Many manufacturers deliver controllers that

    can be programmed directly by the user. These come in a ceramic case

    with an opening (EPROM version) or in a plastic case without an opening

    (EEPROM version). This book deals with one of the latter models that can

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    be programmed via simple programmer, even if the chip has already been

    mounted to the

    designated device.

    RAM MemoryAs previously stated, RAM is used for storing temporary data and

    auxiliary results generated during the runtime. Apart from that, RAM

    comprises a number of registers: hardware counters and timers, I/O ports,

    buffer for serial connection, etc. With older versions, RAM spanned 256

    locations, while new models feature additional 128 registers. First 256

    memory locations form the basis of RAM (addresses 0 FFh) of every

    8051 MCU. Locations that are available to the user span addresses from 0

    to 7Fh, i.e. first 128 registers, and this part of RAM is split into several

    blocks as can be seen in the image below.

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    as R0 -

    R7. To address these, the parent bank has to be selected.

    2Fh) is bit-addressable, meaning

    that every belonging bit has its own address (0 to 7Fh). Since the block

    comprises 16 of these registers, there is a total of 128 addressable bits. (Bit

    0 of byte 20h has bit address 0, while bit 7 of byte 2Fh has bit address

    7Fh).

    7Fh (total

    of 80 locations) without special features or a preset purpose

    Extra Memory Block

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    To satisfy the programmers ever-increasing demands for RAM, latest

    8051 models were added an extra memory block of 128 locations. But it is

    not all that simple... The problem lies in the fact that the electronics which

    addresses RAM employs 1 byte (8 bits), reaching only the first 256locations. Therefore, a little trick had to be applied in order to keep the

    existing 8-bit architecture for the sake of compatibility with older models.

    The idea is to make the additional memory block share the addresses with

    the existent locations intended for SFR registers (80h - FFh). For

    distinguishing these two physically separate memory areas, different

    methods of addressing are used: if SFR registers are in

    question, direct addressing is used; for extra RAM locations, indirect

    addressing is used.

    Memory Expanding

    In case the built-in amount of memory (either RAM or ROM) is not

    sufficient for your needs, there is always an option of adding two external

    64KB memory chips. When added, they are addressed and accessed via

    I/O ports P2 and P3. From users point of view its all very simple,

    because if properly connected most of the job is carried out automatically

    by MCU. 8051 MCU has two separate read signals, RD# (P3.7) and

    PSEN#. The first one is active when reading byte from the external data

    memory (RAM), and the second one is active when reading byte from the

    external program memory (ROM). Both signals are active on low logical

    level. The following image shows a typical scheme for such expansion

    using separate chips for RAM and ROM, known as Harvard architecture

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    Memory can be also mapped as a single block, functioning as both data

    memory and program memory simultaneously (only one memory chip is

    used). This approach is known as Von Neumann architecture. To be able

    to read the same block using RD# or PSEN#, these two signals were

    combined via logical AND. In this way, output of AND circuit is low if

    any of the two inputs is low.Using the Harvard architecture effectively doubles MCU memory, but

    thats not the only advantage offered by the method. Keeping the program

    code separated from the data makes the controller more reliable since there

    is no writing to the program memory.

    4.4. SFR Registers (Special Function Registers)

    SFR registers can be seen as a sort of control panel for managing and

    monitoring the microcontroller. Every register and each of the belonging

    bits has its name, specified address in RAM and strictly defined role (e.g.

    controlling the timer, interrupt, serial connection, etc). Although there are

    128 available memory slots for allocating SFR registers, the basic core

    shared by 8051 MCUs has but 22 registers. The rest has been left openintentionally to allow future upgrades while retaining the compatibility

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    with earlier models. This fact makes possible to use programs developed

    for obsolete models long ago.

    Types of Memory

    The 8051 has three very general types of memory. To effectively program

    the 8051 it is necessary to have a basic understanding of these memory

    types. The memory types are illustrated in the following graphic. They

    are: On-Chip Memory, External Code Memory, and External RAM.

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    On-Chip Memory refers to any memory (Code, RAM, or other) that

    physically exists on the microcontroller itself. On-chip memory can be of

    several types, but we'll get into that shortly.

    External Code Memory is code (or program) memory that resides off-

    chip. This is often in the form of an external EPROM.

    External RAM is RAM memory that resides off-chip. This is often in the

    form of standard static RAM or flash RAM.

    Code Memory

    Code memory is the memory that holds the actual 8051 program that is to

    be run. This memory is limited to 64K and comes in many shapes and

    sizes: Code memory may be found on-chip, either burned into the

    microcontroller as ROM or EPROM. Code may also be stored completely

    off-chip in an external ROM or, more commonly, an external EPROM.

    Flash RAM is also another popular method of storing a program. Various

    combinations of these memory types may also be used--that is to say, it is

    possible to have 4K of code memory on-chip and 64k of code memory off-

    chip in an EPROM.

    When the program is stored on-chip the 64K maximum is often reduced to

    4k, 8k, or 16k. This varies depending on the version of the chip that isbeing used. Each version offers specific capabilities and one of the

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    distinguishing factors from chip to chip is how much ROM/EPROM space

    the chip has.

    However, code memory is most commonly implemented as off-chip

    EPROM. This is especially true in low-cost development systems and insystems developed by students.

    Programming Tip: Since code memory is restricted to 64K, 8051

    programs are limited to 64K. Some assemblers and compilers offer

    ways to get around this limit when used with specially wired

    hardware. However, without such special compilers and hardware,

    programs are limited to 64K.

    External RAM

    As an obvious opposite of Internal RAM, the 8051 also supports what is

    called External RAM.

    As the name suggests, External RAM is any random access memory which

    is found off-chip. Since the memory is off-chip it is not as flexible in terms

    of accessing, and is also slower. For example, to increment an Internal

    RAM location by 1 requires only 1 instruction and 1 instruction cycle. To

    increment a 1-byte value stored in External RAM requires 4 instructions

    and 7 instruction cycles. In this case, external memory is 7 times slower!

    What External RAM loses in speed and flexibility it gains in quantity.While Internal RAM is limited to 128 bytes (256 bytes with an 8052), the

    8051 supports External RAM up to 64K.

    Programming Tip: The 8051 may only address 64k of RAM. To

    expand RAM beyond this limit requires programming and hardware

    tricks. You may have to do this "by hand" since many compilers and

    assemblers, while providing support for programs in excess of 64k, do

    not support more than 64k of RAM. This is rather strange since it has

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    been my experience that programs can usually fit in 64k but often

    RAM is what is lacking. Thus if you need more than 64k of RAM,

    check to see if your compiler supports it-- but if it doesn't, be prepared

    to do it by hand.On-Chip Memory

    As mentioned at the beginning of this chapter, the 8051 includes a certain

    amount of on-chip memory. On-chip memory is really one of two types:

    Internal RAM and Special Function Register (SFR) memory. The layout of

    the 8051's internal memory is presented in the following memory map:

    As is illustrated in this map, the 8051 has a bank of 128 bytes of InternalRAM. This Internal RAM is found on-chip on the 8051 so it is the fastest

    RAM available, and it is also the most flexible in terms of reading,

    writing, and modifying its contents. Internal RAM is volatile, so when the

    8051 is reset this memory is cleared.

    The 128 bytes of internal ram is subdivided as shown on the memory map.

    The first 8 bytes (00h - 07h) are "register bank 0". By manipulating certain

    SFRs, a program may choose to use register banks 1, 2, or 3. These

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    alternative register banks are located in internal RAM in addresses 08h

    through 1Fh. We'll discuss "register banks" more in a later chapter. For

    now it is sufficient to know that they "live" and are part of internal RAM.

    Bit Memory also lives and is part of internal RAM. We'll talk more aboutbit memory very shortly, but for now just keep in mind that bit memory

    actually resides in internal RAM, from addresses 20h through 2Fh.

    The 80 bytes remaining of Internal RAM, from addresses 30h through

    7Fh, may be used by user variables that need to be accessed frequently or

    at high-speed. This area is also utilized by the microcontroller as a storage

    area for the operating stack. This fact severely limits the 8051s stack

    since, as illustrated in the memory map, the area reserved for the stack is

    only 80 bytes--and usually it is less since this 80 bytes has to be shared

    between the stack and user variables.

    4.5. Register Banks

    The 8051 uses 8 "R" registers which are used in many of its instructions.

    These "R" registers are numbered from 0 through 7 (R0, R1, R2, R3, R4,

    R5, R6, and R7). These registers are generally used to assist in

    manipulating values and moving data from one memory location to

    another. For example, to add the value of R4 to the Accumulator, we

    would execute the following instruction:

    ADD A,R4

    Thus if the Accumulator (A) contained the value 6 and R4 contained the

    value 3, the Accumulator would contain the value 9 after this instruction

    was executed.

    However, as the memory map shows, the "R" Register R4 is really part of

    Internal RAM. Specifically, R4 is address 04h. This can be see in the

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    bright green section of the memory map. Thus the above instruction

    accomplishes the same thing as the following operation:

    ADD A,04h

    This instruction adds the value found in Internal RAM address 04h to thevalue of the Accumulator, leaving the result in the Accumulator. Since R4

    is really Internal RAM 04h, the above instruction effectively accomplished

    the same thing.

    But watch out! As the memory map shows, the 8051 has four distinct

    register banks. When the 8051 is first booted up, register bank 0 (addresses

    00h through 07h) is used by default. However, your program may instruct

    the 8051 to use one of the alternate register banks; i.e., register banks 1, 2,

    or 3. In this case, R4 will no longer be the same as Internal RAM address

    04h. For example, if your program instructs the 8051 to use register bank

    3, "R" register R4 will now be synonomous with Internal RAM address

    1Ch.

    The concept of register banks adds a great level of flexibility to the 8051,

    especially when dealing with interrupts (we'll talk about interrupts later).

    However, always remember that the register banks really reside in the first

    32 bytes of Internal RAM.

    Programming Tip: If you only use the first register bank (i.e. bank

    0), you may use Internal RAM locations 08h through 1Fh for your

    own use. But if you plan to use register banks 1, 2, or 3, be very

    careful about using addresses below 20h as you may end up

    overwriting the value of your "R" registers!

    Bit Memory

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    The 8051, being a communications-oriented microcontroller, gives the

    user the ability to access a number of bit variables. These variables may be

    either 1 or 0.

    There are 128 bit variables available to the user, numberd 00h through7Fh. The user may make use of these variables with commands such as

    SETB and CLR. For example, to set bit number 24 (hex) to 1 you would

    execute the instruction:

    SETB 24h

    It is important to note that Bit Memory is really a part of Internal RAM. In

    fact, the 128 bit variables occupy the 16 bytes of Internal RAM from 20h

    through 2Fh. Thus, if you write the value FFh to Internal RAM address

    20h youve effectively set bits 00h through 07h. That is to say that:

    MOV 20h,#0FFh

    is equivalent to:

    SETB 00h SETB 01h SETB 02h

    SETB 03h SETB 04h SETB 05h

    SETB 06h SETB 07h

    As illustrated above, bit memory isnt really a new type of memory. Its

    really just a subset of Internal RAM. But since the 8051 provides special

    instructions to access these 16 bytes of memory on a bit by bit basis it is

    useful to think of it as a separate type of memory. However, always keep

    in mind that it is just a subset of Internal RAM--and that operations

    performed on Internal RAM can change the values of the bit variables.

    Programming Tip: If your program does not use bit variables, you

    may use Internal RAM locations 20h through 2Fh for your own use.

    But if you plan to use bit variables, be very careful about using

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    addresses from 20h through 2Fh as you may end up overwriting the

    value of your bits!

    Bit variables 00h through 7Fh are for user-defined functions in their

    programs. However, bit variables 80h and above are actually used toaccess certain SFRs on a bit-by-bit basis. For example, if output lines P0.0

    through P0.7 are all clear (0) and you want to turn on the P0.0 output line

    you may either execute:

    MOV P0,#01h

    or you may execute:

    SETB 80h

    Both these instructions accomplish the same thing. However, using the

    SETB command will turn on the P0.0 line without effecting the status of

    any of the other P0 output lines. The MOV command effectively turns off

    all the other output lines which, in some cases, may not be acceptable.

    Programming Tip: By default, the 8051 initializes the Stack Pointer

    (SP) to 07h when the microcontroller is booted. This means that the

    stack will start at address 08h and expand upwards. If you will be

    using the alternate register banks (banks 1, 2 or 3) you must initialize

    the stack pointer to an address above the highest register bank you will

    be using, otherwise the stack will overwrite your alternate register

    banks. Similarly, if you will be using bit variables it is usually a good

    idea to initialize the stack pointer to some value greater than 2Fh to

    guarantee that your bit variables are protected from the stack.

    Special Function Register (SFR) Memory

    Special Function Registers (SFRs) are areas of memory that control

    specific functionality of the 8051 processor. For example, four SFRs

    permit access to the 8051s 32 input/output lines. Another SFR allows a

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    program to read or write to the 8051s serial port. Other SFRs allow the

    user to set the serial baud rate, control and access timers, and configure the

    8051s interrupt system.

    When programming, SFRs have the illusion of being Internal Memory.For example, if you want to write the value "1" to Internal RAM location

    50 hex you would execute the instruction:

    MOV 50h,#01h

    Similarly, if you want to write the value "1" to the 8051s serial port you

    would write this value to the SBUF SFR, which has an SFR address of 99

    Hex. Thus, to write the value "1" to the serial port you would execute the

    instruction:

    MOV 99h,#01h

    As you can see, it appears that the SFR is part of Internal Memory. This is

    not the case. When using this method of memory access (its called direct

    address), any instruction that has an address of 00h through 7Fh refers toan Internal RAM memory address; any instruction with an address of 80h

    through FFh refers to an SFR control register.

    Programming Tip: SFRs are used to control the way the 8051

    functions. Each SFR has a specific purpose and format which will be

    discussed later. Not all addresses above 80h are assigned to SFRs.

    However, this area may NOT be used as additional RAM memory

    even if a given address has not been assigned to an SFR

    4.6. What Are SFRs?

    The 8051 is a flexible microcontroller with a relatively large number of

    modes of operations. Your program may inspect and/or change the

    operating mode of the 8051 by manipulating the values of the 8051's

    Special Function Registers (SFRs).

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    SFRs are accessed as if they were normal Internal RAM. The only

    difference is that Internal RAM is from address 00h through 7Fh whereas

    SFR registers exist in the address range of 80h through FFh.

    Each SFR has an address (80h through FFh) and a name. The followingchart provides a graphical presentation of the 8051's SFRs, their names,

    and their address.

    As you can see, although the address range of 80h through FFh offer 128

    possible addresses, there are only 21 SFRs in a standard 8051. All other

    addresses in the SFR range (80h through FFh) are considered invalid.

    Writing to or reading from these registers may produce undefined values

    or behavior.

    Programming Tip: It is recommended that you not read or write to

    SFR addresses that have not been assigned to an SFR. Doing so may

    provoke undefined behavior and may cause your program to be

    incompatible with other 8051-derivatives that use the given SFR for

    some other purpose.

    SFR Types

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    As mentioned in the chart itself, the SFRs that have a blue background are

    SFRs related to the I/O ports. The 8051 has four I/O ports of 8 bits, for a

    total of 32 I/O lines. Whether a given I/O line is high or low and the value

    read from the line are controlled by the SFRs in green.

    The SFRs with yellow backgrouns are SFRs which in some way control

    the operation or the configuration of some aspect of the 8051. For

    example, TCON controls the timers, SCON controls the serial port.

    The remaining SFRs, with green backgrounds, are "other SFRs." These

    SFRs can be thought of as auxillary SFRs in the sense that they don't

    directly configure the 8051 but obviously the 8051 cannot operate without

    them. For example, once the serial port has been configured using SCON,

    the program may read or write to the serial port using the SBUF register.

    Programming Tip: The SFRs whose names appear in red in the chart

    above are SFRs that may be accessed via bit operations (i.e., using the

    SETB and CLR instructions). The other SFRs cannot be accessed

    using bit operations. As you can see, all SFRs that whose addresses are

    divisible by 8 can be accessed with bit operations.

    SFR Descriptions

    This section will endeavor to quickly overview each of the standard SFRs

    found in the above SFR chart map. It is not the intention of this section to

    fully explain the functionality of each SFR--this information will be

    covered in separate chapters of the tutorial. This section is to just give you

    a general idea of what each SFR does.

    P0 (Port 0, Address 80h, Bit-Addressable): This is input/output port 0.

    Each bit of this SFR corresponds to one of the pins on the microcontroller.

    For example, bit 0 of port 0 is pin P0.0, bit 7 is pin P0.7. Writing a value

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    of 1 to a bit of this SFR will send a high level on the corresponding I/O pin

    whereas a value of 0 will bring it to a low level.

    Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and

    P3), if your hardware uses external RAM or external code memory(i.e., your program is stored in an external ROM or EPROM chip or if

    you are using external RAM chips) you may not use P0 or P2. This is

    because the 8051 uses ports P0 and P2 to address the external

    memory. Thus if you are using external RAM or code memory you

    may only use ports P1 and P3 for your own use.

    SP (Stack Pointer, Address 81h): This is the stack pointer of the

    microcontroller. This SFR indicates where the next value to be taken from

    the stack will be read from in Internal RAM. If you push a value onto the

    stack, the value will be written to the address of SP + 1. That is to say, if

    SP holds the value 07h, a PUSH instruction will push the value onto the

    stack at address 08h. This SFR is modified by all instructions whichmodify the stack, such as PUSH, POP, LCALL, RET, RETI, and

    whenever interrupts are provoked by the microcontroller.

    Programming Tip: The SP SFR, on startup, is initialized to 07h. This

    means the stack will start at 08h and start expanding upward in

    internal RAM. Since alternate register banks 1, 2, and 3 as well as the

    user bit variables occupy internal RAM from addresses 08h through

    2Fh, it is necessary to initialize SP in your program to some other

    value if you will be using the alternate register banks and/or bit

    memory. It's not a bad idea to initialize SP to 2Fh as the first

    instruction of every one of your programs unless you are 100% sure

    you will not be using the register banks and bit variables.

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    DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The SFRs

    DPL and DPH work together to represent a 16-bit value called the Data

    Pointer. The data pointer is used in operations regarding external RAM

    and some instructions involving code memory. Since it is an unsignedtwo-byte integer value, it can represent values from 0000h to FFFFh (0

    through 65,535 decimal).

    Programming Tip: DPTR is really DPH and DPL taken together as a

    16-bit value. In reality, you almost always have to deal with DPTR

    one byte at a time. For example, to push DPTR onto the stack you

    must first push DPL and then DPH. You can't simply plush DPTR

    onto the stack. Additionally, there is an instruction to "increment

    DPTR." When you execute this instruction, the two bytes are operated

    upon as a 16-bit value. However, there is no instruction that

    decrements DPTR. If you wish to decrement the value of DPTR, you

    must write your own code to do so.

    PCON (Power Control, Addresses 87h): The Power Control SFR is used

    to control the 8051's power control modes. Certain operation modes of the

    8051 allow the 8051 to go into a type of "sleep" mode which requires

    much less power. These modes of operation are controlled through PCON.

    Additionally, one of the bits in PCON is used to double the effective baud

    rate of the 8051's serial port.

    TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer

    Control SFR is used to configure and modify the way in which the 8051's

    two timers operate. This SFR controls whether each of the two timers is

    running or stopped and contains a flag to indicate that each timer has

    overflowed. Additionally, some non-timer related bits are located in the

    TCON SFR. These bits are used to configure the way in which the external

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    interrupts are activated and also contain the external interrupt flags which

    are set when an external interrupt has occured.

    TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to

    configure the mode of operation of each of the two timers. Using this SFRyour program may configure each timer to be a 16-bit timer, an 8-bit

    autoreload timer, a 13-bit timer, or two separate timers. Additionally, you

    may configure the timers to only count when an external pin is activated or

    to count "events" that are indicated on an external pin.

    TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs,

    taken together, represent timer 0. Their exact behavior depends on how the

    timer is configured in the TMOD SFR; however, these timers always

    count up. What is configurable is how and when they increment in value.

    TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs,

    taken together, represent timer 1. Their exact behavior depends on how the

    timer is configured in the TMOD SFR; however, these timers always

    count up. What is configurable is how and when they increment in value.

    P1 (Port 1, Address 90h, Bit-Addressable): This is input/output port 1.

    Each bit of this SFR corresponds to one of the pins on the microcontroller.

    For example, bit 0 of port 1 is pin P1.0, bit 7 is pin P1.7. Writing a value

    of 1 to a bit of this SFR will send a high level on the corresponding I/O pin

    whereas a value of 0 will bring it to a low level.

    SCON (Serial Control, Addresses 98h, Bit-Addressable): The Serial

    Control SFR is used to configure the behavior of the 8051's on-board serial

    port. This SFR controls the baud rate of the serial port, whether the serial

    port is activated to receive data, and also contains flags that are set when a

    byte is successfully sent or received.

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    Programming Tip: To use the 8051's on-board serial port, it is

    generally necessary to initialize the following SFRs: SCON, TCON,

    and TMOD. This is because SCON controls the serial port. However,

    in most cases the program will wish to use one of the timers toestablish the serial port's baud rate. In this case, it is necessary to

    configure timer 1 by initializing TCON and TMOD.

    SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used to

    send and receive data via the on-board serial port. Any value written to

    SBUF will be sent out the serial port's TXD pin. Likewise, any value

    which the 8051 receives via the serial port's RXD pin will be delivered to

    the user program via SBUF. In other words, SBUF serves as the output

    port when written to and as an input port when read from.

    P2 (Port 2, Address A0h, Bit-Addressable): This is input/output port 2.

    Each bit of this SFR corresponds to one of the pins on the microcontroller.

    For example, bit 0 of port 2 is pin P2.0, bit 7 is pin P2.7. Writing a valueof 1 to a bit of this SFR will send a high level on the corresponding I/O pin

    whereas a value of 0 will bring it to a low level.

    Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and

    P3), if your hardware uses external RAM or external code memory

    (i.e., your program is stored in an external ROM or EPROM chip or if

    you are using external RAM chips) you may not use P0 or P2. This is

    because the 8051 uses ports P0 and P2 to address the external

    memory. Thus if you are using external RAM or code memory you

    may only use ports P1 and P3 for your own use.

    IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is used

    to enable and disable specific interrupts. The low 7 bits of the SFR areused to enable/disable the specific interrupts, where as the highest bit is

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    used to enable or disable ALL interrupts. Thus, if the high bit of IE is 0 all

    interrupts are disabled regardless of whether an individual interrupt is

    enabled by setting a lower bit.

    P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3.Each bit of this SFR corresponds to one of the pins on the microcontroller.

    For example, bit 0 of port 3 is pin P3.0, bit 7 is pin P3.7. Writing a value

    of 1 to a bit of this SFR will send a high level on the corresponding I/O pin

    whereas a value of 0 will bring it to a low level.

    IP (Interrupt Priority, Addresses B8h, Bit-Addressable): The Interrupt

    Priority SFR is used to specify the relative priority of each interrupt. On

    the 8051, an interrupt may either be of low (0) priority or high (1) priority.

    An interrupt may only interrupt interrupts of lower priority. For example,

    if we configure the 8051 so that all interrupts are of low priority except the

    serial interrupt, the serial interrupt will always be able to interrupt the

    system, even if another interrupt is currently executing. However, if aserial interrupt is executing no other interrupt will be able to interrupt the

    serial interrupt routine since the serial interrupt routine has the highest

    priority.

    PSW (Program Status Word, Addresses D0h, Bit-Addressable): The

    Program Status Word is used to store a number of important bits that are

    set and cleared by 8051 instructions. The PSW SFR contains the carry

    flag, the auxiliary carry flag, the overflow flag, and the parity flag.

    Additionally, the PSW register contains the register bank select flags

    which are used to select which of the "R" register banks are currently

    selected.

    Programming Tip: If you write an interrupt handler routine, it is a

    very good idea to always save the PSW SFR on the stack and restore it

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    when your interrupt is complete. Many 8051 instructions modify the

    bits of PSW. If your interrupt routine does not guarantee that PSW is

    the same upon exit as it was upon entry, your program is bound to

    behave rather erradically and unpredictably--and it will be tricky todebug since the behavior will tend not to make any sense.

    ACC (Accumulator, Addresses E0h, Bit-Addressable): The

    Accumulator is one of the most-used SFRs on the 8051 since it is involved

    in so many instructions. The Accumulator resides as an SFR at E0h, which

    means the instruction MOV A,#20h is really the same as MOV E0h,#20h.

    However, it is a good idea to use the first method since it only requires two

    bytes whereas the second option requires three bytes.

    B (B Register, Addresses F0h, Bit-Addressable): The "B" register is

    used in two instructions: the multiply and divide operations. The B register

    is also commonly used by programmers as an auxiliary register to

    temporarily store values.Other SFRs

    The chart above is a summary of all the SFRs that exist in a standard 8051.

    All derivative microcontrollers of the 8051 must support these basic SFRs

    in order to maintain compatability with the underlying MSCS51 standard.

    A common practice when semiconductor firms wish to develop a new

    8051 derivative is to add additional SFRs to support new functions that

    exist in the new chip.

    For example, the Dallas Semiconductor DS80C320 is upwards compatible

    with the 8051. This means that any program that runs on a standard 8051

    should run without modification on the DS80C320. This means that all the

    SFRs defined above also apply to the Dallas component.

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    However, since the DS80C320 provides many new features that the

    standard 8051 does not, there must be some way to control and configure

    these new features. This is accomplished by adding additional SFRs to

    those listed here. For example, since the DS80C320 supports two serialports (as opposed to just one on the 8051), the SFRs SBUF2 and SCON2

    have been added. In addition to all the SFRs listed above, the DS80C320

    also recognizes these two new SFRs as valid and uses their values to

    determine the mode of operation of the secondary serial port. Obviously,

    these new SFRs have been assigned to SFR addresses that were unused in

    the original 8051. In this manner, new 8051 derivative chips may be

    developed which will run existing 8051 programs.

    Programming Tip: If you write a program that utilizes new SFRs that

    are specific to a given derivative chip and not included in the above

    SFR list, your program will not run properly on a standard 8051 where

    that SFR does not exist. Thus, only use non-standard SFRs if you aresure that your program wil only have to run on that specific

    microcontroller. Likewise, if you write code that uses non-standard

    SFRs and subsequently share it with a third-party, be sure to let that

    party know that your code is using non-standard SFRs to save them

    the headache of realizing that due to strange behavior at run-time.

    Basic Registers

    The Accumulator

    If youve worked with any other assembly languages you will be familiar

    with the concept of an Accumulator register.

    The Accumulator, as its name suggests, is used as a general register to

    accumulate the results of a large number of instructions. It can hold an 8-

    bit (1-byte) value and is the most versatile register the 8051 has due to the

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    shear number of instructions that make use of the accumulator. More than

    half of the 8051s 255 instructions manipulate or use the accumulator in

    some way.

    For example, if you want to add the number 10 and 20, the resulting 30will be stored in the Accumulator. Once you have a value in the

    Accumulator you may continue processing the value or you may store it in

    another register or in memory.

    The "R" registers

    The "R" registers are a set of eight registers that are named R0, R1, etc. up

    to and including R7.

    These registers are used as auxillary registers in many operations. To

    continue with the above example, perhaps you are adding 10 and 20. The

    original number 10 may be stored in the Accumulator whereas the value

    20 may be stored in, say, register R4. To process the addition you would

    execute the command:

    ADD A,R4

    After executing this instruction the Accumulator will contain the value 30.

    You may think of the "R" registers as very important auxillary, or

    "helper", registers. The Accumulator alone would not be very useful if it

    were not for these "R" registers.

    The "R" registers are also used to temporarily store values. For example,

    lets say you want to add the values in R1 and R2 together and then

    subtract the values of R3 and R4. One way to do this would be:

    MOV A,R3 ;Move the value of R3 into the accumulator ADD A,R4

    ;Add the value of R4 MOV R5,A ;Store the resulting value

    temporarily in R5 MOV A,R1 ;Move the value of R1 into the

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    accumulator ADD A,R2 ;Add the value of R2 SUBB A,R5 ;Subtract

    the value of R5 (which now contains R3 + R4)

    As you can see, we used R5 to temporarily hold the sum of R3 and R4. Of

    course, this isnt the most efficient way to calculate (R1+R2) - (R3 +R4)but it does illustrate the use of the "R" registers as a way to store values

    temporarily.

    The "B" Register

    The "B" register is very similar to the Accumulator in the sense that it may

    hold an 8-bit (1-byte) value.

    The "B" register is only used by two 8051 instructions: MUL AB and DIV

    AB. Thus, if you want to quickly and easily multiply or divide A by

    another number, you may store the other number in "B" and make use of

    these two instructions.

    Aside from the MUL and DIV instructions, the "B" register is often used

    as yet another temporary storage register much like a ninth "R" register.

    The Data Pointer (DPTR)

    The Data Pointer (DPTR) is the 8051s only user-accessable 16-bit (2-

    byte) register. The Accumulator, "R" registers, and "B" register are all 1-

    byte values.

    DPTR, as the name suggests, is used to point to data. It is used by a

    number of commands which allow the 8051 to access external memory.

    When the 8051 accesses external memory it will access external memory

    at the address indicated by DPTR.

    While DPTR is most often used to point to data in external memory, manyprogrammers often take advantge of the fact that its the only true 16-bit

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    register available. It is often used to store 2-byte values which have

    nothing to do with memory locations.

    The Program Counter (PC)

    The Program Counter (PC) is a 2-byte address which tells the 8051 where

    the next instruction to execute is found in memory. When the 8051 is

    initialized PC always starts at 0000h and is incremented each time an

    instruction is executed. It is important to note that PC isnt always

    incremented by one. Since some instructions require 2 or 3 bytes the PC

    will be incremented by 2 or 3 in these cases.

    The Program Counter is special in that there is no way to directly modify

    its value. That is to say, you cant do something like PC=2430h. On the

    other hand, if you execute LJMP 2430h youve effectively accomplished

    the same thing.

    It is also interesting to note that while you may change the value of PC (by

    executing a jump instruction, etc.) there is no way to read the value of PC.

    That is to say, there is no way to ask the 8051 "What address are you about

    to execute?" As it turns out, this is not completely true: There is one trick

    that may be used to determine the current value of PC. This trick will be

    covered in a later chapter.

    The Stack Pointer (SP)The Stack Pointer, like all registers except DPTR and PC, may hold an 8-

    bit (1-byte) value. The Stack Pointer is used to indicate where the next

    value to be removed from the stack should be taken from.

    When you push a value onto the stack, the 8051 first increments the value

    of SP and then stores the value at the resulting memory location.

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    When you pop a value off the stack, the 8051 returns the value from the

    memory location indicated by SP, and then decrements the value of SP.

    This order of operation is important. When the 8051 is initialized SP will

    be initialized to 07h. If you immediately push a value onto the stack, thevalue will be stored in Internal RAM address 08h. This makes sense taking

    into account what was mentioned two paragraphs above: First the 8051

    will increment the value of SP (from 07h to 08h) and then will store the

    pushed value at that memory address (08h).

    SP is modified directly by the 8051 by six instructions: PUSH, POP,

    ACALL, LCALL, RET, and RETI. It is also used intrinsically whenever

    an interrupt is triggered.

    4.7. Addressing Modes

    An "addressing mode" refers to how you are addressing a given memory

    location. In summary, the addressing modes are as follows, with an

    example of each:

    Immediate Addressing MOV A,#20h

    Direct Addressing MOV A,30h

    Indirect Addressing MOV A,@R0

    External Direct MOVX A,@DPTR

    Code Indirect MOVC A,@A+DPTR

    Each of these addressing modes provides important flexibility.

    Immediate Addressing

    Immediate addressing is so-named because the value to be stored in

    memory immediately follows the operation code in memory. That is to

    say, the instruction itself dictates what value will be stored in memory.

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    For example, the instruction:

    MOV A,#20h

    This instruction uses Immediate Addressing because the Accumulator will

    be loaded with the value that immediately follows; in this case 20(hexidecimal).

    Immediate addressing is very fast since the value to be loaded is included

    in the instruction. However, since the value to be loaded is fixed at

    compile-time it is not very flexible.

    Direct Addressing

    Direct addressing is so-named because the value to be stored in memory is

    obtained by directly retrieving it from another memory location. For

    example:

    MOV A,30h

    This instruction will read the data out of Internal RAM address 30

    (hexidecimal) and store it in the Accumulator.

    Direct addressing is generally fast since, although the value to be loaded

    isnt included in the instruction, it is quickly accessable since it is stored in

    the 8051s Internal RAM. It is also much more flexible than Immediate

    Addressing since the value to be loaded is whatever is found at the given

    address--which may be variable.

    Also, it is important to note that when using direct addressing any

    instruction which refers to an address between 00h and 7Fh is referring to

    Internal Memory. Any instruction which refers to an address between 80h

    and FFh is referring to the SFR control registers that control the 8051

    microcontroller itself.

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    The obvious question that may arise is, "If direct addressing an address

    from 80h through FFh refers to SFRs, how can I access the upper 128

    bytes of Internal RAM that are available on the 8052?" The answer is: You

    cant access them using direct addressing. As stated, if you directly refer toan address of 80h through FFh you will be referring to an SFR. However,

    you may access the 8052s upper 128 bytes of RAM by using the next

    addressing mode, "indirect addressing."

    Indirect Addressing

    Indirect addressing is a very powerful addressing mode which in many

    cases provides an exceptional level of flexibility. Indirect addressing is

    also the only way to access the extra 128 bytes of Internal RAM found on

    an 8052.

    Indirect addressing appears as follows:

    MOV A,@R0

    This instruction causes the 8051 to analyze the value of the R0 register.

    The 8051 will then load the accumulator with the value from Internal

    RAM which is found at the address indicated by R0.

    For example, lets say R0 holds the value 40h and Internal RAM address

    40h holds the value 67h. When the above instruction is executed the 8051

    will check the value of R0. Since R0 holds 40h the 8051 will get the valueout of Internal RAM address 40h (which holds 67h) and store it in the

    Accumulator. Thus, the Accumulator ends up holding 67h.

    Indirect addressing always refers to Internal RAM; it never refers to an

    SFR. Thus, in a prior example we mentioned that SFR 99h can be used to

    write a value to the serial port. Thus one may think that the following

    would be a valid solution to write the value 1 to the serial port:

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    MOV R0,#99h ;Load the address of the serial port MOV @R0,#01h

    ;Send 01 to the serial port -- WRONG!!

    This is not valid. Since indirect addressing always refers to Internal RAM

    these two instructions would write the value 01h to Internal RAM address99h on an 8052. On an 8051 these two instructions would produce an

    undefined result since the 8051 only has 128 bytes of Internal RAM.

    External Direct

    External Memory is accessed using a suite of instructions which use what I

    call "External Direct" addressing. I call it this because it appears to be

    direct addressing, but it is used to access external memory rather than

    internal memory.

    There are only two commands that use External Direct addressing mode:

    MOVX A,@DPTR MOVX @DPTR,A

    As you can see, both commands utilize DPTR. In these instructions, DPTR

    must first be loaded with the address of external memory that you wish to

    read or write. Once DPTR holds the correct external memory address, the

    first command will move the contents of that external memory address into

    the Accumulator. The second command will do the opposite: it will allow

    you to write the value of the Accumulator to the external memory address

    pointed to by DPTR.

    External Indirect

    External memory can also be accessed using a form of indirect addressing

    which I call External Indirect addressing. This form of addressing is

    usually only used in relatively small projects that have a very small

    amount of external RAM. An example of this addressing mode is:

    MOVX @R0,A

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    Once again, the value of R0 is first read and the value of the Accumulator

    is written to that address in External RAM. Since the value of @R0 can

    only be 00h through FFh the project would effectively be limited to 256

    bytes of External RAM. There are relatively simple hardware/softwaretricks that can be implemented to access more than 256 bytes of memory

    using External Indirect addressing; however, it is usually easier to use

    External Direct addressing if your project has more than 256 bytes of

    External RAM.

    4.8. Interrupts

    An interrupt is a special feature which allows the 8051 to provide the

    illusion of "multi-tasking," although in reality the 8051 is only doing one

    thing at a time. The word "interrupt" can often be subsituted with the word

    "event."

    An interrupt is triggered whenever a corresponding event occurs. When

    the event occurs, the 8051 temporarily puts "on hold" the normal execution

    of the program and executes a special section of code referred to as an

    interrupt handler. The interrupt handler performs whatever special

    functions are required to handle the event and then returns control to the

    8051 at which point program execution continues as if it had never been

    interrupted.

    The topic of interrupts is somewhat tricky and very important. For that

    reason, an entire chapter will be dedicated to the topic. For now, suffice it

    to say that Interrupts can cause program flow to change.

    Interrupts

    As the name implies, an interrupt is some event which interrupts normal

    program execution.

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    As stated earlier, program flow is always sequential, being altered only by

    those instructions which expressly cause program flow to deviate in some

    way. However, interrupts give us a mechanism to "put on hold" the normal

    program flow, execute a subroutine, and then resume normal program flowas if we had never left it. This subroutine, called an interrupt handler, is

    only executed when a certain event (interrupt) occurs. The event may be

    one of the timers "overflowing," receiving a character via the serial port,

    transmitting a character via the serial port, or one of two "external events."

    The 8051 may be configured so that when any of these events occur the

    main program is temporarily suspended and control passed to a special

    section of code which presumably would execute some function related to

    the event that occured. Once complete, control would be returned to the

    original program. The main program never even knows it was interrupted.

    The ability to interrupt normal program execution when certain events

    occur makes it much easier and much more efficient to handle certainconditions. If it were not for interrupts we would have to manually check

    in our main program whether the timers had overflown, whether we had

    received another character via the serial port, or if some external event had

    occured. Besides making the main program ugly and hard to read, such a

    situation would make our program inefficient since wed be burning

    precious "instruction cycles" checking for events that usually dont

    happen.

    For example, lets say we have a large 16k program executing many

    subroutines performing many tasks. Lets also suppose that we want our

    program to automatically toggle the P3.0 port every time timer 0

    overflows. The code to do this isnt too difficult:

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    JNB TF0,SKIP_TOGGLE CPL P3.0 CLR TF0 SKIP_TOGGLE:

    ...

    Since the TF0 flag is set whenever timer 0 overflows, the above code will

    toggle P3.0 every time timer 0 overflows. This accomplishes what wewant, but is inefficient. The JNB instruction consumes 2 instruction cycles

    to determine that the flag is not set and jump over the unnecessary code. In

    the event that timer 0 overflows, the CPL and CLR instruction require 2

    instruction cycles to execute. To make the math easy, lets say the rest of

    the code in the program requires 98 instruction cycles. Thus, in total, our

    code consumes 100 instruction cycles (98 instruction cycles plus the 2 that

    are executed every iteration to determine whether or not timer 0 has

    overflowed). If were in 16-bit timer mode, timer 0 will overflow every

    65,536 machine cycles. In that time we would have performed 655 JNB

    tests for a total of 1310 instruction cycles, plus another 2 instruction cycles

    to perform the code. So to achieve our goal weve spent 1312 instruction

    cycles. So 2.002% of our time is being spent just checking when to toggle

    P3.0. And our code is ugly because we have to make that check every

    iteration of our main program loop.

    Luckily, this isnt necessary. Interrupts let us forget about checking for the

    condition. The microcontroller itself will check for the condition

    automatically and when the condition is met will jump to a subroutine

    (called an interrupt handler), execute the code, then return. In this case, our

    subroutine would be nothing more than:

    CPL P3.0 RETI

    First, youll notice the CLR TF0 command has disappeared. Thats

    because when the 8051 executes our "timer 0 interrupt routine," itautomatically clears the TF0 flag. Youll also notice that instead of a

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    normal RET instruction we have a RETI instruction. The RETI

    instruction does the same thing as a RET instruction, but tells the 8051 that

    an interrupt routine has finished. You must always end your interrupt

    handlers with RETI.Thus, every 65536 instruction cycles we execute the CPL instruction and

    the RETI instruction. Those two instructions together require 3 instruction

    cycles, and weve accomplished the same goal as the first example that

    required 1312 instruction cycles. As far as the toggling of P3.0 goes, our

    code is 437 times more efficient! Not to mention its much easier to read

    and understand because we dont have to remember to always check for

    the timer 0 flag in our main program. We just setup the interrupt and forget

    about it, secure in the knowledge that the 8051 will execute our code

    whenever its necessary.

    The same idea applies to receiving data via the serial port. One way to do

    it is to continuously check the status of the RI flag in an endless loop. Orwe could check the RI flag as part of a larger program loop. However, in

    the latter case we run the risk of missing characters--what happens if a

    character is received right after we do the check, the rest of our program

    executes, and before we even checkRI a second character has come in.

    We will lose the first character. With interrupts, the 8051 will put the main

    program "on hold" and call our special routine to handle the reception of a

    character. Thus, we neither have to put an ugly check in our main code nor

    will we lose characters.

    What Events Can Trigger Interrupts, and where do they go?

    We can configure the 8051 so that any of the following events will cause

    an interrupt:

    Timer 0 Overflow.

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    Timer 1 Overflow.

    Reception/Transmission of Serial Character.

    External Event 0.

    External Event 1.

    In other words, we can configure the 8051 so that when Timer 0

    Overflows or when a character is sent/received, the appropriate interrupt

    handler routines are called.

    Obviously we need to be able to distinguish between various interrupts andexecuting different code depending on what interrupt was triggered. This

    is accomplished by jumping to a fixed address when a given interrupt

    occurs.

    By consulting the above chart we see that whenever Timer 0 overflows

    (i.e., the TF0 bit is set), the main program will be temporarily suspended

    and control will jump to 000BH. It is assumed that we have code at

    address 000BH that handles the situation of Timer 0 overflowing.

    Setting Up Interrupts

    By default at powerup, all interrupts are disabled. This means that even if,

    for example, the TF0 bit is set, the 8051 will not execute the interrupt.

    Your program must specifically tell the 8051 that it wishes to enable

    interrupts and specifically which interrupts it wishes to enable.

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    Your program may enable and disable interrupts by modifying the IE SFR

    (A8h):

    As you can see, each of the

    8051s interrupts has its own bit in the IE SFR. You enable a given

    interrupt by setting the corresponding bit. For example, if you wish to

    enable Timer 1 Interrupt, you would execute either:

    MOV IE,#08h

    or

    SETB ET1

    Both of the above instructions set bit 3 of IE, thus enabling Timer 1

    Interrupt. Once Timer 1 Interrupt is enabled, whenever the TF1 bit is set,

    the 8051 will automatically put "on hold" the main program and execute

    the Timer 1 Interrupt Handler at address 001Bh.

    However, before Timer 1 Interrupt (or any other interrupt) is truly enabled,you must also set bit 7 of IE. Bit 7, the Global Interupt Enable/Disable,

    enables or disables all interrupts simultaneously. That is to say, if bit 7 is

    cleared then no interrupts will occur, even if all the other bits of IE are set.

    Setting bit 7 will enable all the interrupts that have been selected by setting

    other bits in IE. This is useful in program execution if you have time-

    critical code that needs to execute. In this case, you may need the code to

    execute from start to finish without any interrupt getting in the way. To

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    accomplish this you can simply clear bit 7 of IE (CLR EA) and then set it

    after your time-criticial code is done.

    So, to sum up what has been stated in this section, to enable the Timer 1

    Interrupt the most common approach is to execute the following twoinstructions:

    SETB ET1 SETB EA

    Thereafter, the Timer 1 Interrupt Handler at 01Bh will automatically be

    called whenever the TF1 bit is set (upon Timer 1 overflow).

    Polling Sequence

    The 8051 automatically evaluates whether an interrupt should occur after

    every instruction. When checking for interrupt conditions, it checks them

    in the following order:

    External 0 Interrupt

    Timer 0 Interrupt

    External 1 Interrupt

    Timer 1 Interrupt

    Serial Interrupt

    This means that if a Serial Interrupt occurs at the exact same instant that an

    External 0 Interrupt occurs, the External 0 Interrupt will be executed first

    and the Serial Interrupt will be executed once the External 0 Interrupt has

    completed.

    Interrupt Priorities

    The 8051 offers two levels of interrupt priority: high and low. By using

    interrupt priorities you may assign higher priority to certain interrupt

    conditions.

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    For example, you may have enabled Timer 1 Interrupt which is

    automatically called every time Timer 1 overflows. Additionally, you may

    have enabled the Serial Interrupt which is called every time a character is

    received via the serial port. However, you may consider that receiving acharacter is much more important than the timer interrupt. In this case, if

    Timer 1 Interrupt is already executing you may wish that the serial

    interrupt itself interrupts the Timer interrupt. When the serial interrupt is

    complete, control passes back to Timer 1 Interrupt and finally back to the

    main program. You may accomplish this by assigning a high priority to the

    Serial Interrupt and a low priority to the Timer 1 Interrupt.

    Interrupt priorities are controlled by the IP SFR (B8h). The IP SFR has the

    following format:

    4.9. Timers

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    The 8051 comes equipped with two timers, both of which may be

    controlled, set, read, and configured individually. The 8051 timers have

    three general functions: 1) Keeping time and/or calculating the amount of

    time between events, 2) Counting the events themselves, or 3) Generatingbaud rates for the serial port.

    The three timer uses are distinct so we will talk about each of them

    separately. The first two uses will be discussed in this chapter while the

    use of timers for baud rate generation will be discussed in the chapter

    relating to serial ports.

    How does a timer count?

    How does a timer count? The answer to this question is very simple: A

    timer always counts up. It doesnt matter whether the timer is being used

    as a timer, a counter, or a baud rate generator: A timer is always

    incremented by the microcontroller.

    Programming Tip: Some derivative chips actually allow the program

    to configure whether the timers count up or down. However, since this

    option only exists on some derivatives it is beyond the scope of this

    tutorial which is aimed at the standard 8051. It is only mentioned here

    in the event that you absolutely need a timer to count backwards, you

    will know that you may be able to find an 8051-compatible

    microcontroller that does it.

    USING TIMERS TO MEASURE TIME

    Obviously, one of the primary uses of timers is to measure time. We will

    discuss this use of timers first and will subsequently discuss the use of

    timers to count events. When a timer is used to measure time it is also

    called an "interval timer" since it is measuring the time of the interval

    between two events.