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MICA: A Holistic Approach to Fast In-Memory Key-Value Storage Hyeontaek Lim 1 Dongsu Han, 2 David G. Andersen, 1 Michael Kaminsky 3 1 Carnegie Mellon University 2 KAIST, 3 Intel Labs

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Page 1: MICA: A Holistic Approach to Fast In-Memory Key-Value … · MICA: A Holistic Approach to Fast In-Memory Key-Value Storage ... YCSB [SoCC 2010] ... Redesigning in-memory key-value

MICA: A Holistic Approach to Fast In-Memory Key-Value Storage

Hyeontaek Lim1

Dongsu Han,2 David G. Andersen,1 Michael Kaminsky3

1Carnegie Mellon University

2KAIST, 3Intel Labs

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Goal: Fast In-Memory Key-Value Store

• Improve per-node performance (op/sec/node)

• Less expensive

• Easier hotspot mitigation

• Lower latency for multi-key queries

• Target: small key-value items (fit in single packet)

• Non-goals: cluster architecture, durability

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Q: How Good (or Bad) are Current Systems?

• Workload: YCSB [SoCC 2010]

• Single-key operations

• In-memory storage

• Logging turned off in our experiments

• End-to-end performance over the network

• Single server node

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0

10

20

30

40

50

60

70

80

Memcached RAMCloud MemC3 Masstree MICA

95% GET ORIG

95% GET OPT

50% GET OPT

End-to-End Performance Comparison

4

Throughput (M operations/sec)

- Published results; Logging on RAMCloud/Masstree

- Using Intel DPDK (kernel bypass I/O); No logging

- (Write-intensive workload)

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1.4 0.1 4.4

8.9

1.3 5.8 5.7

16.5

65.6

0.7 1 0.9 6.5

70.4

0

10

20

30

40

50

60

70

80

Memcached RAMCloud MemC3 Masstree MICA

95% GET ORIG

95% GET OPT

50% GET OPT

End-to-End Performance Comparison

5

Throughput (M operations/sec)

Performance collapses under heavy writes

- Published results; Logging on RAMCloud/Masstree

- Using Intel DPDK (kernel bypass I/O); No logging

- (Write-intensive workload)

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1.4 0.1 4.4

8.9

1.3 5.8 5.7

16.5

65.6

0.7 1 0.9 6.5

70.4

0

10

20

30

40

50

60

70

80

Memcached RAMCloud MemC3 Masstree MICA

95% GET ORIG

95% GET OPT

50% GET OPT

End-to-End Performance Comparison

6

Throughput (M operations/sec)

13.5x

Maximum packets/sec attainable using UDP 4x

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MICA Approach

• MICA: Redesigning in-memory key-value storage

• Applies new SW architecture and data structures to general-purpose HW in a holistic way

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Client CPU

NIC CPU

Memory

Server node

1. Parallel data access

2. Request direction

3. Key-value data structures (cache & store)

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Parallel Data Access

• Modern CPUs have many cores (8, 15, …)

• How to exploit CPU parallelism efficiently?

8

Client CPU

NIC CPU

Memory

Server node

1. Parallel data access

2. Request direction

3. Key-value data structures

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Parallel Data Access Schemes

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CPU core

CPU core Memory

CPU core

CPU core

Partition

Partition

Concurrent Read Concurrent Write

Exclusive Read Exclusive Write

+ Good load distribution - Limited CPU scalability

(e.g., synchronization) - Cross-NUMA latency

+ Good CPU scalability - Potentially low performance under skewed workloads

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In MICA, Exclusive Outperforms Concurrent

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Throughput (Mops)

35.1

76.9

69.3

76.3

21.6

70.4 69.4 65.6

0

10

20

30

40

50

60

70

80

Concurrent Access Exclusive Access

Uniform, 50% GET

Uniform, 95% GET

Skewed, 50% GET

Skewed, 95% GET

End-to-end performance with kernel bypass I/O

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Request Direction

• Sending requests to appropriate CPU cores for better data access locality

• Exclusive access benefits from correct delivery

• Each request must be sent to corresp. partition’s core

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Client CPU

NIC CPU

Memory

Server node

1. Parallel data access

2. Request direction

3. Key-value data structures

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Request Direction Schemes

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Client CPU

CPU

Server node

Client

Classification using 5-tuple

CPU

CPU

Server node

Classification depends on request content

Key 1

Key 1

Key 2

Key 2 Client

Client NIC NIC

+ Good locality for flows (e.g., HTTP over TCP)

- Suboptimal for small key-value processing

+ Good locality for key access - Client assist or special HW support needed for efficiency

Flow-based Affinity Object-based Affinity

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Crucial to Use NIC HW for Request Direction

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Throughput (Mops)

Using exclusive access for parallel data access

33.9

76.9

28.1

70.4

0

10

20

30

40

50

60

70

80

Request direction done solely bysoftware

Client-assisted hardware-basedrequest direction

Uniform

Skewed

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Key-Value Data Structures

• Significant impact on key-value processing speed

• New design required for very high op/sec for both read and write

• “Cache” and “store” modes

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Client CPU

NIC CPU

Memory

Server node

1. Parallel data access

2. Request direction

3. Key-value data structures

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MICA’s “Cache” Data Structures

• Each partition has:

• Circular log (for memory allocation)

• Lossy concurrent hash index (for fast item access)

• Exploit Memcached-like cache semantics

• Lost data is easily recoverable (not free, though)

• Favor fast processing

• Provide good memory efficiency & item eviction

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Circular Log

• Allocates space for key-value items of any length

• Conventional logs + Circular queues

• Simple garbage collection/free space defragmentation

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New item is appended at tail

Head Tail

Head Tail

Evict oldest item at head (FIFO)

Insufficient space for new item?

(fixed log size)

Support LRU by reinserting recently accessed items

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Lossy Concurrent Hash Index

• Indexes key-value items stored in the circular log

• Set-associative table

• Full bucket? Evict oldest entry from it

• Fast indexing of new key-value items

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Key,Val

bucket 0

bucket 1

bucket N-1

Circular log

Hash index hash(Key)

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MICA’s “Store” Data Structures

• Required to preserve stored items

• Achieve similar performance by trading memory

• Circular log -> Segregated fits

• Lossy index -> Lossless index (with bulk chaining)

• See our paper for details

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Evaluation

• Going back to end-to-end evaluation…

• Throughput & latency characteristics

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Throughput Comparison

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Throughput (Mops)

End-to-end performance with kernel bypass I/O

0.7 0.9 0.9

5.7

76.9

1.3

5.4 6.1

12.2

76.3

0.7 0.9 1

6.5

70.4

1.3

5.7 5.8

16.5

65.6

0

10

20

30

40

50

60

70

80

Memcached MemC3 RAMCloud Masstree MICA

Uniform, 50% GET

Uniform, 95% GET

Skewed, 50% GET

Skewed, 95% GET

Bad at high write ratios

Similar performance regardless of skew/write

Large performance

gap

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Throughput-Latency on Ethernet

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Average latency (μs)

Throughput (Mops)

0

10

20

30

40

50

60

70

80

90

100

0 20 40 60 80

Original Memcached MICA

0

10

20

30

40

50

60

70

80

90

100

0 0.1 0.2 0.3

Original Memcached using standard socket I/O; both use UDP

200x+ throughput

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MICA

• Redesigning in-memory key-value storage

• 65.6+ Mops/node even for heavy skew/write

• Source code: github.com/efficient/mica

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Client CPU

NIC CPU

Memory

Server node

1. Parallel data access

2. Request direction

3. Key-value data structures (cache & store)