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Memory and Addressing How and Where Information is Stored

Memory and Addressing How and Where Information is Stored

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Page 1: Memory and Addressing How and Where Information is Stored

Memory and Addressing

How and Where Information is Stored

Page 2: Memory and Addressing How and Where Information is Stored

What is Stored• Strings of bits word = 32 bits

• word may represent:– an address in memory– a value

• signed integer

• positive integer

• four characters

– an instruction• interpreted according to instruction format (ISA)

Page 3: Memory and Addressing How and Where Information is Stored

Where Things are Stored• Registers on CPU

– general purpose registers (32)– PC Program Counter

• holds address of next instruction to be executed

– IR Instruction Register • holds current instruction

• Memory– A very very large array of memory locations– byte addresses

• word (32 bits) addresses are multiples of 4

Page 4: Memory and Addressing How and Where Information is Stored

Where Things are Stored

CPU Memory

PC

IR

GeneralPurposeRegisters

Page 5: Memory and Addressing How and Where Information is Stored

Addressing Modes

• Purpose – to find a value (operand)– to find an instruction

• Places where target or address can be found– anywhere some bits can be– in the instruction– in a register– in memory

Page 6: Memory and Addressing How and Where Information is Stored

MIPS Addressing Modes• Register Direct

– value found in register

• Immediate– value is part of instruction

• Register Indirect with offset– value found in memory, address in register plus offset

• PC-relative– address of next instruction is offset plus PC

• (Pseudo-) Direct– address of next instruction is in current instruction

Page 7: Memory and Addressing How and Where Information is Stored

Register DirectR-Type Instructions

op rs rt rd ... funct

Register

Page 8: Memory and Addressing How and Where Information is Stored

ImmediateArithmetic/Logical Immediate Instructions

op rs rt immediate

Page 9: Memory and Addressing How and Where Information is Stored

Register Indirect with BaseLoad / Store Instructions

op rs rt

Register

offset

Memory+

Page 10: Memory and Addressing How and Where Information is Stored

PC-relativeConditional Branch Instructions (beq, bne)

op rs rt

PC

offset

Memory

+

00:

Page 11: Memory and Addressing How and Where Information is Stored

Pseudo-DirectJ-type (jump) Instructions

op

PC

address

Memory:

00: