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Hoja de datos del circuito integrado MAX 038, con el que se podrá realizar un sencillo generador de ondas (senoidal, triangular, rectangular) de hasta 20 MHz con muy pocos componentes.
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AVAILABLE
Functional Diagrams
Pin Configurations appear at end of data sheet.Functional Diagrams continued at end of data sheet.UCSP is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maximintegrated.com.
General DescriptionThe MAX038 is a high-frequency, precision functiongenerator producing accurate, high-frequency triangle,sawtooth, sine, square, and pulse waveforms with aminimum of external components. The output frequencycan be controlled over a frequency range of 0.1Hz to20MHz by an internal 2.5V bandgap voltagereference and an external resistor and capacitor. Theduty cycle can be varied over a wide range by applyinga 2.3V control signal, facilitating pulse-width modula-tion and the generation of sawtooth waveforms.Frequency modulation and frequency sweeping areachieved in the same way. The duty cycle and frequen-cy controls are independent.
Sine, square, or triangle waveforms can be selected atthe output by setting the appropriate code at twoTTL-compatible select pins. The output signal for allwaveforms is a 2VP-P signal that is symmetrical aroundground. The low-impedance output can drive up to 20mA.
The TTL-compatible SYNC output from the internaloscillator maintains a 50% duty cycleregardless ofthe duty cycle of the other waveformsto synchronizeother devices in the system. The internal oscillator canbe synchronized to an external TTL clock connected to PDI.
ApplicationsPrecision Function Generators
Voltage-Controlled Oscillators
Frequency Modulators
Pulse-Width Modulators
Phase-Locked Loops
Frequency Synthesizer
FSK GeneratorSine and Square Waves
Features 0.1Hz to 20MHz Operating Frequency Range Triangle, Sawtooth, Sine, Square, and Pulse
Waveforms Independent Frequency and Duty-Cycle
Adjustments 350 to 1 Frequency Sweep Range 15% to 85% Variable Duty Cycle Low-Impedance Output Buffer: 0.1 Low 200ppm/C Temperature Drift
High-Frequency Waveform Generator
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
V-
OUT
GND
V+A1
A0
GND
REF
TOP VIEW
MAX038
DV+
DGND
SYNC
PDIFADJ
DADJ
GND
COSC
PDO
GNDIIN
GND
DIP/SO
Pin Configuration
Ordering Information
* Contact factory prior to design.
PART TEMP RANGE PIN-PACKAGEMAX038CPP 0C to +70C 20 Plastic DIP
MAX038CWP 0C to +70C 20 SO
MAX038C/D* 0C to +70C Dice
Ordering Information
19-0266; Rev 7; 8/07
* Contact factory prior to design.
MAX038
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High-Frequency Waveform Generator
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(Circuit of Figure 1, GND = DGND = 0V, V+ = DV+ = 5V, V- = -5V, VDADJ = VFADJ = VPDI = VPDO = 0V, CF = 100pF,RIN = 25k RL = 1k, CL = 20pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.
V+ to GND ...............................................................-0.3V to +6VDV+ to DGND...........................................................-0.3V to +6VV- to GND .................................................................+0.3V to -6VPin Voltages
IIN, FADJ, DADJ, PDO .....................(V- - 0.3V) to (V+ + 0.3V)COSC ......................................................................+0.3V to V
A0, A1, PDI, SYNC, REF.............................................-0.3V to V+GND to DGND ...................................................................0.3VMaximum Current into Any Pin ........................................50mAOUT, REF Short-Circuit Duration to GND, V+, V- ..................30s
Continuous Power Dissipation (TA = +70C)Plastic DIP (derate 11.11mW/C above +70C) .........889mWSO (derate 10.00mW/C above +70C).......................800mWCERDIP (derate 11.11mW/C above +70C)...............889mW
Operating Temperature RangesMAX038C_ _ ......................................................0C to +70C
Maximum Junction Temperature . ...................................+150CStorage Temperature Range ............................-65C to +150CLead Temperature (soldering, 10s) .................................+300C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSFREQUENCY CHARACTERISTICSMaximum Operating Frequency Fo CF 15pF, IIN = 500A 20.0 40.0 MHz
VFADJ = 0V 2.50 750Frequency ProgrammingCurrent
IINVFADJ = -3V 1.25 375
A
IIN Offset Voltage VIN 1.0 2.0 mV
Fo/C VFADJ = 0V 600Frequency TemperatureCoefficient Fo/C VFADJ = -3V 200
ppm/C
(Fo/Fo)V+ V- = -5V, V+ = 4.75V to 5.25V 0.4 2.00Frequency Power-Supply
Rejection (Fo/Fo)V- V+ = 5V, V- = -4.75V to -5.25V 0.2 1.00
%/V
OUTPUT AMPLIFIER (applies to all waveforms)Output Peak-to-Peak Symmetry VOUT 4 mV
Output Resistance ROUT 0.1 0.2 Output Short-Circuit Current IOUT Short circuit to GND 40 mA
SQUARE-WAVE OUTPUT (RL = 100)Amplitude VOUT 1.9 2.0 2.1 VP-PRise Time tR 10% to 90% 12 ns
Fall Time tF 90% to 10% 12 ns
Duty Cycle dc VDADJ = 0V, dc = tON/t x 100% 47 50 53 %
TRIANGLE-WAVE OUTPUT (RL = 100)Amplitude VOUT 1.9 2.0 2.1 VP-PNonlinearity FO = 100kHz, 5% to 95% 0.5 %
Duty Cycle dc VDADJ = 0V (Note 1) 47 50 53 %
SINE-WAVE OUTPUT (RL = 100)VOUT 1.9 2.0 2.1 VP-P
Total Harmonic Distortion THD CF = 1000pF, FO = 100kHz 2.0 %
MAX038
2 Maxim Integrated
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High-Frequency Waveform Generator
Note 1: Guaranteed by duty-cycle test on square wave.Note 2: VREF is independent of V-.
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, GND = DGND = 0V, V+ = DV+ = 5V, V- = -5V, VDADJ = VFADJ = VPDI = VPDO = 0V, CF = 100pF,RIN = 25k RL = 1k, CL = 20pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSSYNC OUTPUTOutput Low Voltage VOL ISINK = 3.2mA 0.3 0.4 VOutput High Voltage VOH ISOURCE = 400A 2.8 3.5 VRise Time tR 10% to 90%, RL = 3k, CL = 15pF 10 nsFall Time tF 90% to 10%, RL = 3k, CL = 15pF 10 nsDuty Cycle dcSYNC 50 %DUTY-CYCLE ADJUSTMENT (DADJ)DADJ Input Current IDADJ 190 250 320 ADADJ Voltage Range VDADJ 2.3 VDuty-Cycle Adjustment Range dc -2.3V VDADJ +2.3V 15 85 %DADJ Nonlinearity dc/VFADJ -2V VDADJ +2V 2 4 %Change in Output Frequencywith DADJ Fo/VDADJ -2V VDADJ +2V 2.5 8 %
Maximum DADJ ModulatingFrequency FDC 2 MHz
FREQUENCY ADJUSTMENT (FADJ)FADJ Input Current IFADJ 190 250 320 AFADJ Voltage Range VFADJ 2.4 VFrequency Sweep Range Fo -2.4V VFADJ +2.4V 70 %FM Nonlinearity with FADJ Fo/VFADJ -2V VFADJ +2V 0.2 %Change in Duty Cycle with FADJ dc/VFADJ -2V VFADJ +2V 2 %Maximum FADJ ModulatingFrequency FF 2 MHz
VOLTAGE REFERENCEOutput Voltage VREF IREF = 0 2.48 2.50 2.52 V
Temperature Coefficient VREF/C 20 ppm/C
0mA IREF 4mA (source) 1 2Load Regulation VREF/IREF
-100A IREF 0A (sink) 1 4mV/mA
Line Regulation VREF/V+ 4.75V V+ 5.25V (Note 2) 1 2 mV/VLOGIC INPUTS (A0, A1, PDI)Input Low Voltage VIL 0.8 V
Input High Voltage VIH 2.4 V
Input Current (A0, A1) IIL, IIH VA0, VA1 = VIL, VIH 5 A
Input Current (PDI) IIL, IIH VPDI = VIL, VIH 25 APOWER SUPPLYPositive Supply Voltage V+ 4.75 5.25 V
SYNC Supply Voltage DV+ 4.75 5.25 V
Negative Supply Voltage V -4.75 -5.25 V
Positive Supply Current I+ 35 45 mA
SYNC Supply Current IDV+ 1 2 mA
Negative Supply Current I 45 55 mA
MAX038
Maxim Integrated 3
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High-Frequency Waveform Generator
Typical Operating Characteristics(Circuit of Figure 1, V+ = DV+ = 5V, V- = -5V, VDADJ = VFADJ = VPDI = VPDO = 0V, RL = 1k/, CL = 20pF, TA = +25C, unlessotherwise noted.)
0.11 100 1000
OUTPUT FREQUENCYvs. IIN CURRENT
10
100
MAX
038-
08
IIN CURRENT ( A)
OUTP
UT F
REQU
ENCY
(Hz)
10
1
1k
10k
100k
1M
10M
100M
100F47F
10F
3.3F
1F
100nF
33nF
3.3nF
330pF
100pF
33pF
1.0
0-3 2
NORMALIZED OUTPUT FREQUENCYvs. FADJ VOLTAGE
0.2
0.8
MAX
038-
09
VFADJ (V)F O
UT N
ORM
ALIZ
ED0
0.4
-2 -1 1
0.6
3
1.2
1.4
1.6
1.8
2.0
IIN = 100 A, COSC = 1000pF
0.85
NORMALIZED OUTPUT FREQUENCYvs. DADJ VOLTAGE
0.90
1.10
MAX
038-
17
DADJ (V)
NORM
ALIZ
ED O
UTPU
T FR
EQUE
NCY
1.00
0.95
1.05
IIN = 10 A
IIN = 25 AIIN = 50 A
IIN = 100 A
IIN = 250 A
IIN = 500 A
2.0
-2.5-2.0 -1.0 1.0 2.5
DUTY-CYCLE LINEARITYvs. DADJ VOLTAGE
-2.0
1.0
MAX
038-
18
DADJ (V)
DUTY
-CYC
LE L
INEA
RITY
ERR
OR (%
)
0 1.5
0
-1.0
-1.5
-0.5
0.5
1.5
IIN = 10 AIIN = 25 A
IIN = 50 A
IIN = 100 A
IIN = 250 A
IIN = 500 A
60
0-3 2
DUTY CYCLE vs. DADJ VOLTAGE
10
50
MAX
038-
16B
DADJ (V)
DUTY
CYC
LE (%
)
0
30
20
-2 -1 1
40
70
80
90
100
3
IIN = 200 A
MAX038
4 Maxim Integrated
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High-Frequency Waveform Generator
SINE-WAVE OUTPUT (50Hz)
TOP: OUTPUT 50Hz = FoBOTTOM: SYNCIIN = 50ACF = 1F
TRIANGLE-WAVE OUTPUT (50Hz)
TOP: OUTPUT 50Hz = FoBOTTOM: SYNCIIN = 50ACF = 1F
SQUARE-WAVE OUTPUT (50Hz)
TOP: OUTPUT 50Hz = FoBOTTOM: SYNCIIN = 50ACF = 1F
SINE-WAVE OUTPUT (20MHz)
IIN = 400ACF = 20pF
TRIANGLE-WAVE OUTPUT (20MHz)
IIN = 400ACF = 20pF
SINE WAVE THD vs. FREQUENCY
MAX
038
toc0
1
FREQUENCY (Hz)
THD
(%)
1M100k10k1k
1
2
3
4
5
6
7
0100 10M
Typical Operating Characteristics (continued)(Circuit of Figure 1, V+ = DV+ = 5V, V- = -5V, VDADJ = VFADJ = VPDI = VPDO = 0V, RL = 1k/, CL = 20pF, TA = +25C, unlessotherwise noted.)
MAX038
Maxim Integrated 5
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High-Frequency Waveform Generator
Typical Operating Characteristics (continued)(Circuit of Figure 1, V+ = DV+ = 5V, V- = -5V, VDADJ = VFADJ = VPDI = VPDO = 0V, RL = 1k/, CL = 20pF, TA = +25C, unlessotherwise noted.)
FREQUENCY MODULATION USING FADJ
TOP: OUTPUTBOTTOM: FADJ
0.5V
0V
-0.5V
FREQUENCY MODULATION USING IIN
TOP: OUTPUTBOTTOM: IIN
FREQUENCY MODULATION USING IIN
TOP: OUTPUTBOTTOM: IIN
PULSE-WIDTH MODULATION USING DADJ
TOP: SQUARE-WAVE OUT, 2VP-PBOTTOM: VDADJ, -2V to +2.3V
+1V
0V
-1V
+2V
0V
-2V
SQUARE-WAVE OUTPUT (20MHz)
IIN = 400ACF = 20pF
MAX038
6 Maxim Integrated
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High-Frequency Waveform Generator
0
-1000 20 60 100
OUTPUT SPECTRUM, SINE WAVE(Fo = 11.5MHz)
-80
-20
MAX
038-
12A
FREQUENCY (MHz)
ATTE
NUAT
ION
(dB)
40 80
-40
-60
-10
-30
-50
-70
-90
10 30 50 70 90
RIN = 15k (VIN = 2.5V), CF = 20pF, VDADJ = 40mV, VFADJ = -3V
0
-1000 10 30 50
OUTPUT SPECTRUM, SINE WAVE(Fo = 5.9kHz)
-80
-20
MAX
038
12B
FREQUENCY (kHz)AT
TENU
ATIO
N (d
B)
20 40
-40
-60
-10
-30
-50
-70
-90
5 15 25 35 45
RIN = 51k (VIN = 2.5V), CF = 0.01F, VDADJ = 50mV, VFADJ = 0V
Pin Description
Typical Operating Characteristics (continued)(Circuit of Figure 1, V+ = DV+ = 5V, V- = -5V, VDADJ = VFADJ = VPDI = VPDO = 0V, RL = 1k/, CL = 20pF, TA = +25C, unlessotherwise noted.)
PIN NAME FUNCTION1 REF 2.50V bandgap voltage reference output
2, 6, 9,11, 18
GND Ground*
3 A0 Waveform selection input; TTL/CMOS compatible
4 A1 Waveform selection input; TTL/CMOS compatible
5 COSC External capacitor connection
7 DADJ Duty-cycle adjust input
8 FADJ Frequency adjust input
10 IIN Current input for frequency control
12 PDO Phase detector output. Connect to GND if phase detector is not used.
13 PDI Phase detector reference clock input. Connect to GND if phase detector is not used.
14 SYNCTTL/C M O S - com p ati b l e outp ut, r efer enced b etw een D G N D and D V + . P er m i ts the i nter nal osci l l ator to b esynchronized with an external signal. Leave open if unused.
15 DGND Digital ground
16 DV+ Digital +5V supply input. Can be left open if SYNC is not used.
17 V+ +5V supply input
19 OUT Sine, square, or triangle output
20 V- -5V supply input
*The five GND pins are not internally connected. Connect all five GND pins to a quiet ground close to the device. A ground plane isrecommended (see Layout Considerations).
MAX038
Maxim Integrated 7
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Detailed DescriptionThe MAX038 is a high-frequency function generatorthat produces low-distortion sine, triangle, sawtooth, orsquare (pulse) waveforms at frequencies from less than1Hz to 20MHz or more, using a minimum of externalcomponents. Frequency and duty cycle can be inde-pendently controlled by programming the current, volt-age, or resistance. The desired output waveform isselected under logic control by setting the appropriatecode at the A0 and A1 inputs. A SYNC output andphase detector are included to simplify designs requir-ing tracking to an external signal source.
The MAX038 operates with 5V 5% power supplies.The basic oscillator is a relaxation type that operates byalternately charging and discharging a capacitor, CF,
with constant currents, simultaneously producing a tri-angle wave and a square wave (Figure 1). The charg-ing and discharging currents are controlled by the cur-rent flowing into IIN, and are modulated by the voltagesapplied to FADJ and DADJ. The current into IIN can bevaried from 2A to 750A, producing more than twodecades of frequency for any value of CF. Applying2.4V to FADJ changes the nominal frequency (withVFADJ = 0V) by 70%; this procedure can be used forfine control.
Duty cycle (the percentage of time that the output wave-form is positive) can be controlled from 10% to 90% byapplying 2.3V to DADJ. This voltage changes the CFcharging and discharging current ratio while maintain-ing nearly constant frequency.
High-Frequency Waveform Generator
MAX038
OSCILLATOR
OSCILLATORCURRENT
GENERATOR
2.5VVOLTAGE
REFERENCE
OSC B
OSC ATRIANGLE
SINESHAPER
COMPARATOR
COMPARATOR
PHASEDETECTOR
MUX
COSC
GND
5
6CF
8
7
10
FADJ
DADJ
IIN
REF1
1720
2, 9, 11, 18
V+V-
GND
RF RD RIN
+5V
-5V
-250A
SINE
TRIANGLE
SQUARE
A0 A1
OUT
SYNC
PDO
PDI
19
14
12
13
RL CL
3 4
DGND DV+15 16
+5V
*
= SIGNAL DIRECTION, NOT POLARITY = BYPASS CAPACITORS ARE 1F CERAMIC OR 1F ELECTROLYTIC IN PARALLEL WITH 1nF CERAMIC.
*
*Figure 1. Block Diagram and Basic Operating Circuit
MAX038
8 Maxim Integrated
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A stable 2.5V reference voltage, REF, allows simpledetermination of IIN, FADJ, or DADJ with fixed resistors,and permits adjustable operation when potentiometersare connected from each of these inputs to REF. FADJand/or DADJ can be grounded, producing the nominalfrequency with a 50% duty cycle.
The output frequency is inversely proportional tocapacitor CF. CF values can be selected to producefrequencies above 20MHz.
A sine-shaping circuit converts the oscillator trianglewave into a low-distortion sine wave with constantamplitude. The triangle, square, and sine waves areinput to a multiplexer. Two address lines, A0 and A1,control which of the three waveforms is selected. Theoutput amplifier produces a constant 2VP-P amplitude(1V), regardless of wave shape or frequency.
The triangle wave is also sent to a comparator that pro-duces a high-speed square-wave SYNC waveform thatcan be used to synchronize other oscillators. The SYNCcircuit has separate power-supply leads and can bedisabled.
Two other phase-quadrature square waves are gener-ated in the basic oscillator and sent to one side of an"exclusive-OR" phase detector. The other side of thephase-detector input (PDI) can be connected to anexternal oscillator. The phase-detector output (PDO) isa current source that can be connected directly toFADJ to synchronize the MAX038 with the externaloscillator.
Waveform SelectionThe MAX038 can produce either sine, square, or trian-gle waveforms. The TTL/CMOS-logic address pins (A0and A1) set the waveform, as shown below:
X = Dont care. Waveform switching can be done at any time, withoutregard to the phase of the output. Switching occurswithin 0.3s, but there may be a small transient in theoutput waveform that lasts 0.5s.
Waveform Timing Output Frequency
The output frequency is determined by the currentinjected into the IIN pin, the COSC capacitance (toground), and the voltage on the FADJ pin. When
VFADJ = 0V, the fundamental output frequency (Fo) isgiven by the formula:
Fo (MHz) = IIN (A) CF (pF) [1]
The period (to) is:
to (s) = CF (pF) IIN (A) [2]
where:
IIN = current injected into IIN (between 2A and 750A)
CF = capacitance connected to COSC and GND(20pF to >100F).
For example:
0.5MHz = 100A 200pF
and
2s = 200pF 100A
Optimum performance is achieved with IIN between10A and 400A, although linearity is good with IINbetween 2A and 750A. Current levels outside of thisrange are not recommended. For fixed-frequency oper-ation, set IIN to approximately 100A and select a suit-able capacitor value. This current produces the lowesttemperature coefficient, and produces the lowest fre-quency shift when varying the duty cycle.
The capacitance can range from 20pF to more than100F, but stray circuit capacitance must be minimizedby using short traces. Surround the COSC pin and thetrace leading to it with a ground plane to minimize cou-pling of extraneous signals to this node. Oscillationabove 20MHz is possible, but waveform distortionincreases under these conditions. The low frequencylimit is set by the leakage of the COSC capacitor andby the required accuracy of the output frequency.Lowest frequency operation with good accuracy is usu-ally achieved with 10F or greater non-polarizedcapacitors.
An internal closed-loop amplifier forces IIN to virtualground, with an input offset voltage less than 2mV. IINmay be driven with either a current source (IIN), or avoltage (VIN) in series with a resistor (RIN). (A resistorbetween REF and IIN provides a convenient method ofgenerating IIN: IIN = VREF/RIN.) When using a voltage inseries with a resistor, the formula for the oscillator fre-quency is:
Fo (MHz) = VIN [RIN x CF (pF)] [3]
and: to (s) = CF(pF) x RIN VIN [4]
High-Frequency Waveform Generator
A0 A1 WAVEFORMX 1 Sine wave
0 0 Square wave
1 0 Triangle wave
MAX038
Maxim Integrated 9
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When the MAX038s frequency is controlled by a volt-age source (VIN) in series with a fixed resistor (RIN), theoutput frequency is a direct function of VIN as shown inthe above equations. Varying VIN modulates the oscilla-tor frequency. For example, using a 10k resistor forRIN and sweeping VIN from 20mV to 7.5V produceslarge frequency deviations (up to 375:1). Select RIN sothat IIN stays within the 2A to 750A range. The band-width of the IIN control amplifier, which limits the modu-lating signals highest frequency, is typically 2MHz.
IIN can be used as a summing point to add or subtractcurrents from several sources. This allows the outputfrequency to be a function of the sum of several vari-ables. As VIN approaches 0V, the IIN error increasesdue to the offset voltage of IIN.
Output frequency will be offset 1% from its final valuefor 10 seconds after power-up.
FADJ Input The output frequency can be modulated byFADJ, which is intended principally for fine frequencycontrol, usually inside phase-locked loops. Once thefunda-mental, or center frequency (Fo) is set by IIN, itmay be changed further by setting FADJ to a voltageother than 0V. This voltage can vary from -2.4V to+2.4V, causing the output frequency to vary from 1.7 to0.30 times the value when FADJ is 0V (Fo 70%).Voltages beyond 2.4V can cause instability or causethe frequency change to reverse slope.
The voltage on FADJ required to cause the output todeviate from Fo by Dx (expressed in %) is given by theformula:
VFADJ = -0.0343 x Dx [5]
where VFADJ, the voltage on FADJ, is between -2.4Vand +2.4V.
Note: While IIN is directly proportional to the fundamen-tal, or center frequency (Fo), VFADJ is linearly related to% deviation from Fo. VFADJ goes to either side of 0V,corresponding to plus and minus deviation.
The voltage on FADJ for any frequency is given by theformula:
VFADJ = (Fo - Fx) (0.2915 x Fo) [6]
where:
Fx = output frequency
Fo = frequency when VFADJ = 0V.
Likewise, for period calculations:
VFADJ = 3.43 x (tx- to) tx [7]
where:
tx = output period
to = period when VFADJ = 0V.
Conversely, if VFADJ is known, the frequency is givenby:
Fx = Fo x (1 - [0.2915 x VFADJ]) [8]
and the period (tx) is:
tx = to (1 - [0.2915 x VFADJ]) [9]
Programming FADJ FADJ has a 250A constant current sink to V- that mustbe furnished by the voltage source. The source is usu-ally an op-amp output, and the temperature coefficientof the current sink becomes unimportant. For manualadjustment of the deviation, a variable resistor can beused to set VFADJ, but then the 250A current sinkstemperature coefficient becomes significant. Sinceexternal resistors cannot match the internal tempera-ture-coefficient curve, using external resistors to pro-gram VFADJ is intended only for manual operation,when the operator can correct for any errors. Thisrestriction does not apply when VFADJ is a true voltagesource.
A variable resistor, RF, connected between REF (+2.5V)and FADJ provides a convenient means of manuallysetting the frequency deviation. The resistance value(RF) is:
RF = (VREF - VFADJ) 250A [10]
VREF and VFADJ are signed numbers, so use correctalgebraic convention. For example, if VFADJ is -2.0V(+58.3% deviation), the formula becomes:
RF = (+2.5V - (-2.0V)) 250A
= (4.5V) 250A
= 18k
Disabling FADJ The FADJ circuit adds a small temperature coefficientto the output frequency. For critical open-loop applica-tions, it can be turned off by connecting FADJ to GND(not REF) through a 12k resistor (R1 in Figure 2). The -250A current sink at FADJ causes -3V to be devel-oped across this resistor, producing two results. First,the FADJ circuit remains in its linear region, but discon-nects itself from the main oscillator, improving tempera-ture stability. Second, the oscillator frequency doubles.If FADJ is turned off in this manner, be sure to correctequations 1-4 and 6-9 above, and 12 and 14 below bydoubling Fo or halving to. Although this method doublesthe normal output frequency, it does not double theupper frequency limit. Do not operate FADJ open cir-cuit or with voltages more negative than -3.5V. Doingso may cause transistor saturation inside the IC, lead-ing to unwanted changes in frequency and duty cycle.
High-Frequency Waveform Generator
MAX038
10 Maxim Integrated
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With FADJ disabled, the output frequency can still bechanged by modulating IIN.
Swept Frequency OperationThe output frequency can be swept by applying a vary-ing signal to IIN or FADJ. IIN has a wider range, slightlyslower response, lower temperature coefficient, andrequires a single polarity current source. FADJ may beused when the swept range is less than 70% of thecenter frequency, and it is suitable for phase-lockedloops and other low-deviation, high-accuracy closed-loop controls. It uses a sweeping voltage symmetricalabout ground.
Connecting a resistive network between REF, the volt-age source, and FADJ or IIN is a convenient means ofoffsetting the sweep voltage.
Duty CycleThe voltage on DADJ controls the waveform duty cycle(defined as the percentage of time that the outputwaveform is positive). Normally, VDADJ = 0V, and theduty cycle is 50% (Figure 2). Varying this voltage from+2.3V to -2.3V causes the output duty cycle to varyfrom 15% to 85%, about -15% per volt. Voltagesbeyond 2.3V can shift the output frequency and/orcause instability.
DADJ can be used to reduce the sine-wave distortion.The unadjusted duty cycle (VDADJ = 0V) is 50% 2%;any deviation from exactly 50% causes even order har-monics to be generated. By applying a smalladjustable voltage (typically less than 100mV) toVDADJ, exact symmetry can be attained and the distor-tion can be minimized (see Figure 2).
The voltage on DADJ needed to produce a specificduty cycle is given by the formula:
VDADJ = (50% - dc) x 0.0575 [11]
or:
VDADJ = (0.5 - [tON to]) x 5.75 [12]
where:
VDADJ = DADJ voltage (observe the polarity)
dc = duty cycle (in %)
tON = ON (positive) time
to = waveform period.
Conversely, if VDADJ is known, the duty cycle and ONtime are given by:
dc = 50% - (VDADJ x 17.4) [13]
tON = to x (0.5 - [VDADJ x 0.174]) [14]
High-Frequency Waveform Generator
MAX038
1F
GND
COSC12
AO
V-
1811926GND GNDGND GND
5
8
10
7
1
13
14
15
16 N.C.
3
FADJ
IIN
DADJ
REF
OUT
DV+
DGND
SYNC
PDI
PDO
V+ A141720
5V +5V
C2
1nFC3
1FC1
12kR1
20kRIN
FREQUENCY
50R2
N.C.
CF
19 SINE-WAVEOUTPUT
2 x 2.5VRIN x CF
Fo =
MAX038
100kR5
5k R6
100kR7
100kR3
100kR4
DADJ
REF
+2.5V2.5V
PRECISION DUTY-CYCLE ADJUSTMENT CIRCUIT
ADJUST R6 FOR MINIMUM SINE-WAVE DISTORTION
Figure 2. Operating Circuit with Sine-Wave Output and 50% Duty Cycle; SYNC and FADJ Disabled
MAX038
Maxim Integrated 11
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Programming DADJDADJ is similar to FADJ; it has a 250A constant cur-rent sink to V- that must be furnished by the voltagesource. The source is usually an op-amp output, andthe temperature coefficient of the current sink becomesunimportant. For manual adjustment of the duty cycle, avariable resistor can be used to set VDADJ, but then the250A current sinks temperature coefficient becomessignificant. Since external resistors cannot match theinternal temperature-coefficient curve, using externalresistors to program VDADJ is intended only for manualoperation, when the operator can correct for any errors.This restriction does not apply when VDADJ is a truevoltage source.
A variable resistor, RD, connected between REF(+2.5V) and DADJ provides a convenient means ofmanually setting the duty cycle. The resistance value(RD) is:
RD = (VREF - VDADJ) 250A [15]
Note that both VREF and VDADJ are signed values, soobserve correct algebraic convention. For example, ifVDADJ is -1.5V (23% duty cycle), the formula becomes:
RD = (+2.5V - (-1.5V)) 250A
= (4.0V) 250A = 16kVarying the duty cycle in the range 15% to 85% hasminimal effect on the output frequencytypically lessthan 2% when 25A < IIN < 250A. The DADJ circuit iswideband, and can be modulated at up to 2MHz (seephotos, Typical Operating Characteristics).
Output The output amplitude is fixed at 2VP-P, symmetricalaround ground, for all output waveforms. OUT has anoutput resistance of under 0.1, and can drive 20mAwith up to a 50pF load. Isolate higher output capaci-tance from OUT with a resistor (typically 50) or bufferamplifier.
Reference VoltageREF is a stable 2.50V bandgap voltage reference capa-ble of sourcing 4mA or sinking 100A. It is principallyused to furnish a stable current to IIN or to bias DADJand FADJ. It can also be used for other applicationsexternal to the MAX038. Bypass REF with 100nF to min-imize noise.
Selecting Resistors and CapacitorsThe MAX038 produces a stable output frequency overtime and temperature, but the capacitor and resistorsthat determine frequency can degrade performance ifthey are not carefully chosen. Resistors should bemetal film, 1% or better. Capacitors should be chosen
for low temperature coefficient over the whole tempera-ture range. NPO ceramics are usually satisfactory.
The voltage on COSC is a triangle wave that variesbetween 0V and -1V. Polarized capacitors are generallynot recommended (because of their outrageous tem-perature dependence and leakage currents), but if theyare used, the negative terminal should be connected toCOSC and the positive terminal to GND. Large-valuecapacitors, necessary for very low frequencies, shouldbe chosen with care, since potentially large leakagecurrents and high dielectric absorption can interferewith the orderly charge and discharge of CF. If possi-ble, for a given frequency, use lower IIN currents toreduce the size of the capacitor.
SYNC OutputSYNC is a TTL/CMOS-compatible output that can beused to synchronize external circuits. The SYNC outputis a square wave whose rising edge coincides with theoutput rising sine or triangle wave as it crosses through0V. When the square wave is selected, the rising edgeof SYNC occurs in the middle of the positive half of theoutput square wave, effectively 90 ahead of the out-put. The SYNC duty cycle is fixed at 50% and is inde-pen-dent of the DADJ control.
Because SYNC is a very-high-speed TTL output, thehigh-speed transient currents in DGND and DV+ canradiate energy into the output circuit, causing a narrowspike in the output waveform. (This spike is difficult tosee with oscilloscopes having less than 100MHz band-width). The inductance and capacitance of IC socketstend to amplify this effect, so sockets are not recom-mended when SYNC is on. SYNC is powered from sep-arate ground and supply pins (DGND and DV+), and itcan be turned off by making DV+ open circuit. If syn-chronization of external circuits is not used, turning offSYNC by DV+ opening eliminates the spike.
Phase Detectors Internal Phase Detector
The MAX038 contains a TTL/CMOS phase detector thatcan be used in a phase-locked loop (PLL) to synchro-nize its output to an external signal (Figure 3). Theexternal source is connected to the phase-detectorinput (PDI) and the phase-detector output is taken fromPDO. PDO is the output of an exclusive-OR gate, andproduces a rectangular current waveform at theMAX038 output frequency, even with PDI grounded.PDO is normally connected to FADJ and a resistor,RPD, and a capacitor CPD, to GND. RPD sets the gainof the phase detector, while the capacitor attenuateshigh-frequency components and forms a pole in thephase-locked loop filter.
High-Frequency Waveform Generator
MAX038
12 Maxim Integrated
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PDO is a rectangular current-pulse train, alternatingbetween 0A and 500A. It has a 50% duty cycle whenthe MAX038 output and PDI are in phase-quadrature(90 out of phase). The duty cycle approaches 100%as the phase difference approaches 180 and con-versely, approaches 0% as the phase differenceapproaches 0. The gain of the phase detector (KD)can be expressed as:
KD = 0.318 x RPD (volts/radian) [16]
where RPD = phase-detector gain-setting resistor.
When the loop is in lock, the input signals to the phasedetector are in approximate phase quadrature, the dutycycle is 50%, and the average current at PDO is 250A(the current sink of FADJ). This current is dividedbetween FADJ and RPD; 250A always goes into FADJand any difference current is developed across RPD,creating VFADJ (both polarities). For example, as thephase difference increases, PDO duty cycle increases,the average current increases, and the voltage on RPD(and VFADJ) becomes more positive. This in turndecreases the oscillator frequency, reducing the phasedifference, thus maintaining phase lock. The higherRPD is, the greater VFADJ is for a given phase differ-ence; in other words, the greater the loop gain, the lessthe capture range. The current from PDO must also
charge CPD, so the rate at which VFADJ changes (theloop bandwidth) is inversely proportional to CPD.
The phase error (deviation from phase quadrature)depends on the open-loop gain of the PLL and the ini-tial frequency deviation of the oscillator from the exter-nal signal source. The oscillator conversion gain (Ko) is:
KO = o VFADJ [17] which, from equation [6] is:
KO = 0.2915 x o (radians/sec) [18]
The loop gain of the PLL system (KV) is:
KV= KD x KO [19]
where:
KD = detector gain
KO = oscillator gain.
With a loop filter having a response F(s), the open-looptransfer function, T(s), is:
T(s) = KD x KO x F(s) s [20]
Using linear feedback analysis techniques, the closed-loop transfer characteristic, H(s), can be related to theopen-loop transfer function as follows:
H(s) = T(s) [1+ T(s)] [21]
The transient performance and the frequency responseof the PLL depends on the choice of the filter charac-teristic, F(s).
When the MAX038 internal phase detector is not used,PDI and PDO should be connected to GND.
External Phase DetectorsExternal phase detectors may be used instead of theinternal phase detector. The external phase detectorshown in Figure 4 duplicates the action of the MAX038sinternal phase detector, but the optional N circuit canbe placed between the SYNC output and the phasedetector in applications requiring synchronizing to anexact multiple of the external oscillator. The resistor net-work consisting of R4, R5, and R6 sets the sync range,while capacitor C4 sets the capture range. Note thatthis type of phase detector (with or without the N cir-cuit) locks onto harmonics of the external oscillator aswell as the fundamental. With no external oscillatorinput, this circuit can be unpredictable, depending onthe state of the external input DC level.
Figure 4 shows a frequency phase detector that locksonto only the fundamental of the external oscillator.With no external oscillator input, the output of the fre-quency phase detector is a positive DC voltage, andthe oscillations are at the lowest frequency as set byR4, R5, and R6.
High-Frequency Waveform Generator
MAX038
GND
COSC12
A0V-
181192 6GND GND
15DGNDGND GND
5
8
10
7
1
13
3
FADJ
IIN
DADJ
REF
RD
OUT
PDI
PDO
V+
17
DV+
16 20
+5V -5V C11FC21F
CENTERFREQUENCY
50ROUT
CF
RPD
CPD
19
RFOUTPUT
A14
SYNC
14
EXTERNAL OSC INPUT
Figure 3. Phase-Locked Loop Using Internal Phase Detector
MAX038
Maxim Integrated 13
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Figure 4. Phase-Locked Loop Using External Phase Detector
High-Frequency Waveform Generator
MAX038
GND
COSC12
A0V-
181192 6GND GND
15DGNDGND GND
5
8
10
7
1
13
3
FADJ
IIN
DADJ
REF
R2CW
R3
OUT
PDI
PDO
V+
17
DV+
16 20
+5V -5V
-5V
C21F
1FC1
CENTERFREQUENCY
50R1
R6GAIN
R5OFFSET
R4PHASE DETECTOR
EXTERNALOSC INPUT
C4CAPTURE
19 RFOUTPUT
A14
SYNC
14+N
Figure 5. Phase-Locked Loop Using External Frequency Phase Detector
MAX038
GND
COSC12
A0V-
181192 6GND GND
15DGNDGND GND
5
8
10
7
1
13
3
FADJ
IIN
DADJ
REF
R2CW
R3
OUT
PDI
PDO
V+
17
DV+
16 20
+5V -5V
-5V
C21F
C11F
CENTERFREQUENCY
50R1
R6GAIN
R5OFFSET
R4
C4CAPTURE
19
RFOUTPUT
A14
SYNC
14
FREQUENCY
EXTERNALOSC INPUT
+N
MAX038
14 Maxim Integrated
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Figure 6. Crystal-Controlled, Digitally Programmed Frequency Synthesizer8kHz to 16MHz with 1kHz Resolution
N4N3 N2
MC1
4515
1
N6
8.19
2MHz
MAX
427
N5
OUT1
OUT2
RFB
VREF
VDD
GND1
MX7541
N7 N8 N9 T/R
N12
N13
N10
N11
OSC O
UT
OSC I
N
LDNN1 N0 FV PD
VPD
RRA
2RA
1
RA0
PD1 O
UT V DD
V SS
F IN
35pF
20pF
1514
281
GND
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT12
BIT11
BIT10
BIT9
BIT8
BIT7
MAX
038
A0 A1 COSC
GND1
DADJ
FADJ
OUT
GND V+ DV+
DGND
SYNC PD
I
PDO
VREF
V-
GND1
IINGN
D1
3.3M
PDV
PDR
3.3M
33k
0.1
F
0.1
F
0.1
F0.
1F 0.
1F
0.1
F
0.1
F
0.1
F
33k
7.5k
10k
2 3
7 4
6
+2.5
V
2.5V
35 pF
1011
0.1
F
50.0
100
120
50
, 50M
HzLO
WPA
SS F
ILTE
R22
0nH
220n
H
56pF
110p
F56
pF
50
SIGN
ALOU
TPUT
SYNC
OUTP
UT
+5V
-5V
9 10
1 18
3 2
1
0V T
O 2.
5V
2N39
04
3.33
k
2.7M
1k
1k
568 4
72N
39061
N914
2A
to75
0A
MAX
412
MAX
412
8.192MHz4.096MHz2.048MHz1.024MHz
512kHz256kHz128kHz64kHz32kHz16kHz8kHz4kHz2kHz1kHz
WAV
EFOR
MSE
LECT
FREQ
UENC
Y SY
NTHE
SIZE
R 1k
Hz R
ESOL
UTIO
N; 8
kHz T
O 16
.383
MHz
Maxim Integrated 15
High-Frequency Waveform Generator
MAX038
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High-Frequency Waveform Generator
Layout ConsiderationsRealizing the full performance of the MAX038 requirescareful attention to power-supply bypassing and boardlayout. Use a low-impedance ground plane, and con-nect all five GND pins directly to it. Bypass V+ and V-directly to the ground plane with 1F ceramic capaci-tors or 1F tantalum capacitors in parallel with 1nFceramics. Keep capacitor leads short (especially withthe 1nF ceramics) to minimize series inductance.
If SYNC is used, DV+ must be connected to V+, DGNDmust be connected to the ground plane, and a second1nF ceramic should be connected as close as possiblebetween DV+ and DGND (pins 16 and 15). It is notnecessary to use a separate supply or run separatetraces to DV+. If SYNC is disabled, leave DV+ open.Do not open DGND.
Minimize the trace area around COSC (and the groundplane area under COSC) to reduce parasitic capaci-tance, and surround this trace with ground to preventcoupling with other signals. Take similar precautionswith DADJ, FADJ, and IIN. Place CF so its connectionto the ground plane is close to pin 6 (GND).
Applications Information Frequency Synthesizer
Figure 6 shows a frequency synthesizer that producesaccurate and stable sine, square, or triangle waves witha frequency range of 8kHz to 16.383MHz in 1kHz incre-ments. A Motorola MC145151 provides the crystal-con-trolled oscillator, the N circuit, and a high-speed phasedetector. The manual switches set the output frequency;opening any switch increases the output frequency.Each switch controls both the N output and anMX7541 12-bit DAC, whose output is converted to a cur-rent by using both halves of the MAX412 op amp. Thiscurrent goes to the MAX038 IIN pin, setting its coarsefrequency over a very wide range.
Fine frequency control (and phase lock) is achievedfrom the MC145151 phase detector through the differ-ential amplifier and lowpass filter, U5. The phase detec-
tor compares the N output with the MAX038 SYNCoutput and sends differential phase information to U5.U5s single-ended output is summed with an offset intothe FADJ input. (Using the DAC and the IIN pin forcoarse frequency control allows the FADJ pin to havevery fine control with reasonably fast response toswitch changes.)
A 50MHz, 50 lowpass filter in the output allows pas-sage of 16MHz square waves and triangle waves withreasonable fidelity, while stopping high-frequencynoise generated by the N circuit.
Package InformationFor the latest package outline information, go towww.maxim-ic.com/packages.
Revision HistoryPages changed at Rev 7: 13, 16
Chip Topography
TRANSISTOR COUNT: 855
SUBSTRATE CONNECTED TO GND
V+
PDI
SYNC
AO
DADJ
PDOFADJ
0.118"(2.997mm)
0.106"(2.692mm)
A1
COSC
GND
IINGND GND
DGND
DV+
GND
GND REF V- OUT
MAX038
16 Maxim Integrated
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High-Frequency Waveform Generator
MAX038
17Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
2007 Maxim Integrated The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.
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/ColorImageDict > /JPEG2000ColorACSImageDict > /JPEG2000ColorImageDict > /AntiAliasGrayImages false /CropGrayImages true /GrayImageMinResolution 300 /GrayImageMinResolutionPolicy /OK /DownsampleGrayImages true /GrayImageDownsampleType /Bicubic /GrayImageResolution 300 /GrayImageDepth -1 /GrayImageMinDownsampleDepth 2 /GrayImageDownsampleThreshold 1.50000 /EncodeGrayImages true /GrayImageFilter /DCTEncode /AutoFilterGrayImages true /GrayImageAutoFilterStrategy /JPEG /GrayACSImageDict > /GrayImageDict > /JPEG2000GrayACSImageDict > /JPEG2000GrayImageDict > /AntiAliasMonoImages false /CropMonoImages true /MonoImageMinResolution 1200 /MonoImageMinResolutionPolicy /OK /DownsampleMonoImages true /MonoImageDownsampleType /Bicubic /MonoImageResolution 1200 /MonoImageDepth -1 /MonoImageDownsampleThreshold 1.50000 /EncodeMonoImages true /MonoImageFilter /CCITTFaxEncode /MonoImageDict > /AllowPSXObjects false /CheckCompliance [ /None ] /PDFX1aCheck false /PDFX3Check false /PDFXCompliantPDFOnly false /PDFXNoTrimBoxError true /PDFXTrimBoxToMediaBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXSetBleedBoxToMediaBox true /PDFXBleedBoxToTrimBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXOutputIntentProfile () /PDFXOutputConditionIdentifier () /PDFXOutputCondition () /PDFXRegistryName () /PDFXTrapped /False
/Description > /Namespace [ (Adobe) (Common) (1.0) ] /OtherNamespaces [ > /FormElements false /GenerateStructure true /IncludeBookmarks false /IncludeHyperlinks false /IncludeInteractive false /IncludeLayers false /IncludeProfiles true /MultimediaHandling /UseObjectSettings /Namespace [ (Adobe) (CreativeSuite) (2.0) ] /PDFXOutputIntentProfileSelector /NA /PreserveEditing true /UntaggedCMYKHandling /LeaveUntagged /UntaggedRGBHandling /LeaveUntagged /UseDocumentBleed false >> ]>> setdistillerparams> setpagedevice