MATLAB and Simulink for Engineering Education 2009 The
MathWorks, Inc.
Tabrez Khan Applications Engineer MathWorks India Pvt. Ltd
[email protected]
AgendaFilter Design & Analysis Fixed Point Analysis Neural
Network Design and Analysis Lunch Break Signal Processing,
Communications and Video System Design Event-Driven and Discrete
Event Simulation Implementation and Verification on Embedded
Targets
2
ObjectiveFilter Design and Analysis
3
What is fixed point?Binary representation of data with finite
number of bits Finite word length arithmetic with a fixed number of
fractional digits Optimal for machine, hard for humans to
programSign bitIf signed
1st integer bit
Binary point
Number of fractional bits (3) Word length (8)4
Who is interested in fixed-point design?People whose everyday
tasks involve:
Designing, analyzing, and verifying fixed-point algorithms FPGA
or ASIC Fixed-point DSP chip Microcontrollers
Designers whose hardware targets include:
5
Fixed-Point Data Types in MATLABFeatures fixed-point numeric
object fi
Bit-true, fixed-point math in MATLAB Fixed-point algorithm
development in M Natural MATLAB syntax
>> a=fi(pi, true, 8, 5); >> bin(a) 0 1 0 1 0 1 1 . 0
s 2 1 . 1/2 1/4 1/8 1/16 1/32 >> double(a) 3.156256
Parts of a fi Object>> a = fi(pi) a = 3.1416015625
DataTypeMode: Signed: WordLength: FractionLength: RoundMode:
OverflowMode: ProductMode: MaxProductWordLength: SumMode:
MaxSumWordLength: CastBeforeSum: Fixed-point: binary point scaling
true 16 13 nearest saturate FullPrecision 128 FullPrecision 128
true
data
numerictype
fimath
7
Streamlined Floating-to-Fixed ConversionTurn on logging mode Set
data type override parameters Observe dynamic range of variables in
your M-code Set the best fixed-point attributes to avoid overflow
or underflow and large quantization errors
8
IntroductionNeural Networks
The network is adjusted, based on a comparison of the output and
the target, until the network output matches the
target.TargetNeural Network including connections (called weights)
between neurons
Input
Output
Compare
Adjust weights9
Neural Networks applicationsBiotech
Cancer detection, Gene expression analysis, EEG and ECG
analysis, Data Mining Market forecasting, Credit evaluation, Fraud
detection, Real estate appraisal, Mortgage screening, Corporate
bond rating, Portfolio trading program, Corporate financial
analysis, Currency price prediction OCR, Handwriting recognition,
Biometrics, Image and data compression, Fault detection and
compensation, Nonlinear adaptive control, Process control,
Robotics
Financial Services
Other
10
Common PainTechnology is complex and difficult to understand
Steep Learning curve associated with learning and applying neural
networks Solution : Mathworks offers Neural Networks Toolbox that
allows users to use proven and tested built-in training algorithms
and graphical tools thereby substantially reducing the effort and
time needed to design, implement, evaluate, visualize and simulate
neural networks.
11
Design of Neural NetworksBasically comprises of following three
steps: Initialization >> net=newff([0 2],[20 1],{tansig,
purelin}, trainlm); Training >> net=train(net,P,T) Simulation
>> a=sim(net,P)
Conversion to Simulink Block Simulink model from trained network
can be generated using the gensim(net) command12
Sampling SignalsAnalog signal sourcesElectromagnetic, audio,
sonar, biomedical
Sampling
x( n) = xa (nTs )discrete signal analog signal sample time
2009 The MathWorks, Inc.
13
AliasingShannon Sampling Theorem:fs > 2 fM
fs > 2 fMfs 2 fM
Original signal and sampled signal have same frequency
Sampled signal is aliased to half the original frequency
2009 The MathWorks, Inc.
14
Signal GenerationSignals Create a time-base vector>> t =
[0:0.1:2];
Signal as function of time>> x = sin(pi*t/2);
Useful MATLAB Functions Nonperiodic functionsones, zeros
Periodic functionssin, cos, square, sawtooth
2009 The MathWorks, Inc.
15
Amplitude ModulationAmplitude Modulation is a process where the
amplitude of a carrier signal is altered according to information
in a message signal. The frequency of the carrier signal is usually
much greater than the highest frequency of the input message
signal.
16
AM Basic DefinitionsThe AM signal5
s (t ) = Ac [1 + k m(t )]cos ctThe modulating signal:
0
-5 0 01 02 03 04 05 06 07 08 09 0 .0 .0 .0 .0 .0 .0 .0 .0 .0 .1
1
m(t )The Carrier Signal:
0
-1 0 01 02 03 04 05 06 07 08 09 0 .0 .0 .0 .0 .0 .0 .0 .0 .0 .1
1
0
c(t ) = Ac cos c t
-1 0 01 02 03 04 05 06 07 08 09 0 .0 .0 .0 .0 .0 .0 .0 .0 .0
.1
17
Wireless Communication System DesignPhysical layer design
Digital baseband design: Channel coding, modulation, spreading
and filtering RF/Analog: Non-linearity, phase noise and noise
figure Receiver algorithms: Carrier recovery, timing recovery,
equalization Acknowledgement schemes, call processing, and simple
protocols
MAC/Data link layer design
18
Collect Blocks and Set ParametersQPSK Transmitter QPSK
Receiver
1. Drag and Drop Library Blocks into Simulink Model 2. Double
Click on Blocks to Edit Block Parameters19
Run Simulation and Visualize Results
Start Simulation
Visualize Output
20
Construct Receiver and Examine Received BitsQPSK Transmitter
QPSK Receiver
Error Rate Error Bits Received Bitsc
Received Signal
21
Example: IEEE 802.11a System
22
Stateflow OverviewExtend Simulink with a design environment for
developing state machines and flow charts Design systems containing
control, supervisory, and mode logic Describe logic in a natural
and understandable form with deterministic execution semantic
23
Modeling Performance of Transport and Networks LayersSimEvents
extends Simulink with discrete-event simulation Efficient,
event-driven modeling of data packets passing through network of
queues, servers, gates, and switches Connects to lower layers
modeled in Simulink and Stateflow
24
Communications protocol stackExample Open Systems
Interconnection OSI model from International Standards Organization
(ISO)7. Application
e.g. web browser
7. Application
UML: Transactional modeling languages Large scale applications
programming
6. Presentation
e.g. Windows
6. Presentation
5. Session
e.g. NT login
5. Session
SimEvents: Discrete event
4. Transporte.g. TCP
4. Transport
3. Networke.g. IP
3. Network
Stateflow: State transition Comms Blockset: coding, modulation,
etc. Signal Proc Blockset: Sampled data processing Simulink: Time
domain
2. Data Link and Medium Access Control
e.g. WiFi MAC
2. Data Link and Medium Access Control
1. Physical
e.g. WiFi PHY
1. Physical
"0". RF or "analog front end" components and medium (the aether,
copper or fiber) with impairments caused by both
Seven specialist layers in a protocol stack: Divide and
conquer
25
25
Some Image Processing ApplicationsAutomotive Defense Biometrics
Medical Diagnosis
Earth Sciences
Microscopy
Semiconductors
Drug Discovery
26
Objective: Noise Filtering in the Video Stream Construct your
modelthrough an intuitive block diagram Use Simulink Blocks to
build your algorithm and model your system
View signals from block to block to determine the effectiveness
of your model27
Objective: To Build Sobel Algorithm for Edge Detection
Input Image
Edges
2D Filter
(.)2SQRT and Thresholding
2D Filter
(.)2
28
The System Design ChallengeWe design, simulate, and validate
system models and algorithms in MATLAB and/or Simulink How can we
implement and verify designs on DSPs and GPPs? How can we implement
and verify designs on FPGAs and ASICs?C HDL
MATLAB and Simulink Algorithm and System Design
MCU
DSP
FPGA
ASIC
29
Embedded Software Design: TI ProcessorsAlgorithm Development
Target Support Package TC2System Design
MATLAB
SimulinkReal-Time Workshop Target Support Packages C/ASM
Code
Stateflow
Real-Time Workshop Embedded Coder Target Support Package TC6DSP
Hardware
Embedded IDE Link CC
Compile & Link
Texas Instruments Code Composer Studio Environment Debug
Down load
C2000 DSP C5000 DSP C6000 DSP
30
Model-Based Design Flow for Hardware
ImplementationRequirements
Algorithmic Development
System Design and Simulation
Simulink Stateflow Embedded MATLAB
EDA Simulator Link
Simulink HDL Coder
Filter Design HDL Coder
Xilinx ISE Synplify Pro PrecisionRTL Altera Quartus II
DesignCompiler
/ External Code VHDL,
Generic RTL VHDL / Verilog Digital Embedded Legacy Electronics
Software Verilog C, HDL Simulation C++
Mentor Graphics ModelSim
Cadence Incisive Synopsys Discovery
FPGA
ASIC MCU Synthesis P&RIntegration
DSP
Test Environments
Leonardo FPGA ASIC
Continuous V&V 31
Implement Implement
MathWorks India Contact DetailsE-mail: [email protected]
Technical Support E-mail: [email protected] URL:
http://www.mathworks.in Address / Tel/ Fax: MathWorks India Private
Limited Salarpuria Windsor Building Third Floor, 'A' Wing No.3
Ulsoor Road Bangalore - 560042, Karnataka India Tel: +91 - 80 -
6632 6000 Fax: +91- 80 - 6632 6010
Thank You!32
