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Analysis of flicker noise degradation mechanism in ultra-thin oxide CMOS
Student: H. C. ChangAdvisor: Tahui Wang
National Chiao Tung University
Institute of electronics
EVDTL
Outline
1.Introduction
2.Flicker Noise Unified Model
3.Stress-enhanced Flicker Noise degradation
4.Dominant 1/f noise degradation mechanisms
5.Oxide Soft Breakdown Effects on 1/f noise
6.Summary
Motivation
To develop an accurate, physics-based flicker noise
model
Using the drain current flicker noise to monitor the
Si-SiO2 interface quality
• Stress effect
• Ultra thin oxide MOSFETs
In this thesis
Introduction to Unified 1/f noise theory
Developing a two-region model based on the unified
noise theory
Using the two models in stress-enhanced 1/f noise
degradation
Using the two models to distinguish between number
and mobility fluctuation
Using the two models to explain the SBD effect on 1/
f noise
Flicker Noise Unified Model
xeff qNEWIdI
µ=
NtNtNt
N
NII eff
effdd ∆
∆
±∆∆
∆= δ
δδµ
µδδδ 11
),(1
),(22
fxSNxW
IfxS Nteff
dId ∆∆
±
∆= αµ
I-V model:
( ) ( ) ( ) ( )( )
dzdydEzyxE
zyxEfxfzyxENfxS ttt
E
E
W t
Nt
c
v
ox
220 0 ,,,1
,,,1,,,4,
τωτ
+−∆= ∫ ∫ ∫∆
Flicker Noise Unified Model
)(1
)(22
fntd
Id ENNfWL
kTIfS
+= αµ
γ
)()1()( 22
2
fnT
OX
Vg ENNfWLC
kTqfS αµ
γ+=
Drain current noise power:
Input referred noise power:
Stress-enhanced Flicker Noise degradation
NMOS
ONO Cell
Two-region model
NMOS:Max Ib Stress
-0.5 0.0 0.5 1.0 1.5 2.010
-13
10-11
10-9
10-7
10-5
10-3
10-1
NMOS, tOX=33A, Vt=0.1VW/L=10µm/0.18µmCharacterization VD=0.1VMaximum IB stress:VD=3V, VG=1.59V
I D (
A)
VG (V)
fresh t=3000s
102 103 104 105
10-14
10-13
10-12
10-11
NMOS, tOX=33A, Vt=0.1VW/L=10µm/0.18µmV
D=0.2V,V
G=1V (Operation Region)
Maximum IB stress:
VD=3V,V
G=1.64V
SV
g (
V2 /H
z)f (Hz)
fresh t=3000s
Max Ib stress generates interface states
Interface states enhance less 1/f noise degradation
NMOS:Max Ig Stress
0.0 0.5 1.0 1.5 2.0 2.5 3.010-12
10-10
10-8
10-6
10-4
NMOS 65A W/L=10/0.34measure @ VD=0.1V
I D(A
)
VG(V)
fresh Max IG stress ∆Vt=0.3V
102
103
104
105
10-14
10-13
10-12
10-11
10-10
S
Vg (V
2 /Hz)
NMOS 65A W/L=10/0.34measure @ V
G=1V V
D=0.1V
fresh Max IG stress ∆Vt=0.3V
f(Hz)
Max Ig stress generates local oxide charges & traps
Either Local charges or traps enhance serious 1/f noise degradation
NMOS:FN Stress
0 1 2 310-14
10-12
10-10
10-8
10-6
10-4
NMOS 65A W/L=10/0.34measure @ VG=1V VD=0.1V
I D(A
)
VG(V)
fresh FN stress ∆V
t=0.3v
102 103 104 10510-14
10-13
10-12
10-11
NMOS 65A W/L=10/0.34measure @ VG=1V VD=0.1V
SV
g (V
2 /Hz)
f(Hz)
fresh FN stress ∆Vt=0.3V
FN stress generates uniform oxide charges & traps
Uniform charges or traps enhance less 1/f noise degradation
ONO Cell:FN Program
0 1 2 3 4 5
10-12
10-10
10-8
10-6
measure @ VD=0.1v
ONO cell W/L=1/0.58
I D(A
)
VG(V)
fresh program (V
G=15V,V
D=0V)
102
103
104
105
10-14
10-13
10-12
10-11
10-10
fresh program (V
G=15V,V
D=0V)
SV
g (
V2 /H
z)
ONO cell W/L=1/0.58measure@ V
D=0.5V,V
G=3V
f(Hz)
FN program generates uniform oxide charges
Uniform oxide charges enhance less 1/f noise degradation
the oxide traps don’t induce the noise degradation
ONO Cell:Max Ig Program
0 1 2 3 4 5
10-11
10-9
10-7
10-5
I D
(A
) ONO cell W/L=1/0.58measure @ V
D=0.1v
VG(v)
fresh program (Vd=4V,Vg=6.5V,2ms) erase (Vd=7V,Vg=-3V,2ms)
102
103
104
10510
-14
10-13
10-12
10-11
10-10
10-9
SV
g (
V2 /H
z)
ONO cell W/L=1/0.58measure @ Vd=0.2v
fresh program erase
VD=0.5V,V
G=3V
f(Hz)
Max Ig program generates local oxide charges
Oxide traps don’t contribute to the 1/f noise degradation
the flicker noise degradation is due to non-uniform oxide charge distribution
ONO Cell:Double side Program
0 1 2 3 4 5
10-12
10-10
10-8
10-6
measure @ VG=2.5V V
D=0.2V
ONO cell W/L=1/0.58
I D
(A)
VG(V)
fresh program one side program two side
102
103
104
105
10-13
10-12
10-11
10-10
Svg
(V2 /H
z)
ONO cell W/L=1/0.58
f(Hz)
measure @ VG=2.5V V
D=0.2V
erase state Vt=1.1V program one side V
t=2.2V
program two side Vt=2.2V,V
t=1.6V
the 1/f noise of double-side program is only half of the one-side program and is much larger than that of the fresh device
Two-region model
22
22
1
12
)( )()()(
G
fS
G
fS
G
fSVgVgstressVg
+=i
iii L
WQG
µ=
121
1
2
2 GGL
Q
L
Q >>⇒>> )()(1)( fSfS VgstressVg =⇒
)()1()( 112
11
12
2
)( fT
OX
stressVg ENNWLfC
kTqfS αµ
γ+=
≈
)(
)(
)(
)( 1
1
)(
fnt
fnt
Vg
stressVg
EN
EN
L
L
fS
fS
VtL2 L1
Q2Q1
High Vt region dominate
Extended to Three-region
⇒
High Vt region dominate
VtL2 L1
Q2Q1
L3
Q3
23
22
22
1
12
)( )()()()(3
G
fS
G
fS
G
fS
G
fSVgVgVgstressVg
++=
3123
3
1
1
2
2 && GGGL
Q
L
Q
L
Q >>⇒>>2
32
1
12
)( )()()(3
G
fS
G
fS
G
fSVgVgstressVg
+=
31),()(31
GGfSfS vgvg == 12
1GG =⇒
)(2
1)(
1)( fSfS VgstressVg =
Dominant 1/f noise degradation mechanisms
NMOS
• Gate Voltage Dependence
• Channel Length Dependence
• Delta threshold shift dependence
Repeat with PMOS
NMOS: Gate Voltage Dependence
1 2 3 4 510
-13
10-12
10-11
S
Vg (
V2 /H
z)
Fresh Max IG Stress ∆Vt=0.3V
tox
=65A W/L=10/0.5measure @ V
D=0.13v f=1kHz
VG(V)
Low gate bias: Number fluctuation dominate
High gate bias: Mobility fluctuation dominate
)()1()( 22
2
fnT
OX
Vg ENNfWLC
kTqfS αµ
γ+=
Fresh:
Max Ig stress:
)()1()( 112
11
12
2
)( fT
OX
stressVg ENNWLfC
kTqfS αµ
γ+=
NMOS: Cross Point in VG dependence
0 1 21.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
NMOS 65A W=10µmmeasure @ f=1kHz
VG(V
)
L(µm)
Cross Point
+
+
≈
)(
)(
1
1
)(
)( 1
2
111
1
)(
fnt
fnt
Vg
stressVg
EN
EN
N
N
L
L
fS
fS
αµµα
NMOS: Channel Length Dependence
110
-14
10-13
L(µm)
SV
g (
V2 /H
z)
Measure @ VG=1.5V
NMOS tox
=65A W=10µm
0.3 0.5 2
Fresh Stress delta V
t=0.3V
110
-12
10-11
10-10
0.3 0.5 2
measure @ VG=5V f=1Khz
tox
=65A W=10µm
Fresh Max Ig Stress ∆V
t=0.3V
SVg
(V2 /H
z)L(µm)
Low Vg High Vg
after stress: at low gate biasL independence
at high gate bias1/L
NMOS: V t Dependence
2.5 3.0 3.5 4.0 4.5 5.0
10-12
10-11
10-10
S
Vg (
V2 /H
z)
measure @ VD=0.5V
NMOS tox
=65A W/L=10/1
VG(V)
fresh Vt=0.8V Max I
G stress V
t=1.0V
Max IG stress Vt=1.2V Max IG stress Vt=1.4V Max I
G stress V
t=1.5V
Max IG stress Vt=1.6V Max IG stress Vt=1.8V
At low gate bias1/f noise
At high gate bias1/f noise
∝
∆
)( 11 fT EN
∝ ( ) 211Nµ
PMOS: Gate Voltage Dependence
1 2 3 4 5
10-13
10-12
10-11
SV
g (
V2 /H
z)
Fresh Vt=-0.5V
Stress ∆ Vt=-0.3v
PMOS65A W/L=10/0.5measure @ VD=-0.12V
-Vg(V)
PMOS: Channel Length Dependence
110-14
10-13
10-12
20.50.3
measure @Vg= -1.5V
UMC tox=65A W=10µm
Fresh Hot hole Stress delta Vt=0.3V
L(µm)
SVg
(V2 /H
z)
110-12
10-11
10-10
measure @Vg= -5V
tox=65A W=10µm
Fresh Hot hole Stress delta Vt=0.3V
0.3 0.5 2L(µm)
SVg
(V2 /H
z)
Low Vg High Vg
PMOS: Mobility fluctuation dominate
PMOS: V t Dependence∆
2.0 2.5 3.0 3.5 4.0 4.5 5.010
-14
10-13
10-12
S
Vg (
V2 /H
z)
PMOS 65A W/L=10/2 measure @ Vd= -0.5V
-Vg(V)
Fresh Vt=-0.5V Stress Vt=-0.8V Stress Vt=-1.32V
PMOS1/f noise ∝ ( ) 211Nµ
Oxide Soft Breakdown Effects on 1/f noise
Tunneling Current Effect
Comparison of SBD effect between NMOS & PMOS
SBD channel width dependence
Tunneling current effect on NMOS
0.0 0.5 1.0 1.510
-41
10-39
10-37
10-35
10-13
10-11
10-9
10-7
10-41
10-39
10-37
10-35
10-13
10-11
10-9
10-7
Vg(65A) 4.1852.7081.230-0.247
measure @ Vd=0.25V f=1kHz
NMOS W/L=10/1
Svg(22A) Svg(33A) Svg(65A) Ig(22A) Ig(33A) Ig(65A)
2.1551.4050.655-0.095
IG (A)
Vg(33A)
Svg
*(C
ox2 )
Vg(22A)
Tunneling current effect on PMOS
0 1 210-41
10-39
10-37
10-35
10-12
10-10
10-8
10-6
10-41
10-39
10-37
10-35
10-12
10-10
10-8
10-6
5.6622.708-0.247-Vg(22A) -Vg(65A)
measure @ Vd=-0.25V f=1kHzPMOS W/L=10/1
IG (A)
Svg
*to
x2
Svg(22A) Svg(65A) Ig(22A) Ig(65A)
the gate tunneling current doesn’t contribute to the flicker noise
Comparison of SBD effect between NMOS & PMOS
0 1240 1280 1320
10-7
10-5
10-3
SBD
t3
t2t1
t0
PMOS
FN stress @ V
G=-4.6V
I G (
A)
time (s)0 90 180 270 360
SBD
NMOS
t3
t2
t0t
1
FN stress @ VG=4.2V
time (s)
SBD effect on PMOS
102
103
104
105
10-14
10-13
10-12
10-11
10-10
measure @VG=-0.7V , VD=-0.1V
S vg(V
2 /Hz)
f (Hz)
t0
t1
t2
t3
0.0 0.3 0.6 0.9 1.2 1.510-13
10-11
10-9
10-7
10-5
10-3
measure @ VD=-0.1V
-ID (
A)
-VG (V)
t0
t1
t2
t3
SBD enhances local positive oxide charge in the SBD spot
rapidly increase in Vt after SBD
SBD effect on PMOS
0.0 0.1 0.2 0.3 0.40
2
4
6
8
SBD
VT(t)-V
T(t
0) (V)
Svg(
t)/S
vg(t
=0)
@ f
=10
kHz
localized Q
ox gen.
uniform Q
ox gen.
1/f Noise arises sharply due to non-uniform charge creation
Oxide charge distribution
Nox distributionafter SBD
LS D
G
SBD path in the gate oxide
)N , L(S : 1Region 11 tVg ∆
2Region
SBD effect on NMOS
102 103 104 105
10-14
10-13
10-12
10-11
measure @V
D=0.7V , V
G=0.1V
S vg(V
2 /Hz)
f (Hz)
t0
t1
t2
t3
0.0 0.3 0.6 0.9 1.2 1.510
-12
10-10
10-8
10-6
10-4 measure @ VD=0.1V
I D (
A)
VG (V)
t0
t1
t2
t3
negative oxide charge creation in ultrathin gate oxide is negligible
No Vt shift
1/f noise remain the same
SBD channel width dependence
Smaller 1/f noise degradation in a larger gate width device.
Two-region model along the gate width
W
LS D
G
SVg1
SVg2SBD spot
22
212
12
VgmVgmVgm SgSgSg +=
21 IdIdId SSS +=
⇒
For large gate width
current bypass the SBD spot
negligible noise degradation
2VgVg SS ≈
Summary
The local oxide charge caused by CHE stress give rise
to serious degradation of flicker noise
NMOS: low gate biasnumber fluctuation dominate
high gate biasmobility fluctuation dominate
PMOS: mobility fluctuation dominate
CHE stress enhanced 1/f noise degradation is more
serious in long channel devices
Summary
Gate leakage current doesn’t contribute to 1/f noise
SBD effect induces larger 1/f noise degradation in
PMOS than in NMOS
SBD enhanced 1/f noise degradation is more serious
in short width devices
Reference
J. W. Wu, H. C. Chang, and T. Wang, “Oxide soft
breakdown effects on drain current flicker noise in
ultra-thin oxide CMOS devices,” The International
Conference on Solid State Devices and Materials
(SSDM) 2002, pp. 698–699.
