LVI, LVP, TRI, TRE a technical approach to chose the right toolsphilippe.perdu.free.fr/workshops/workshop2012/SmartFA/pdf... · 2015-07-22 · TRI: Signal propagation Visualization

LVI, LVP, TRI, TRE atechnical approach tochose the right tools

Philippe PERDU

Guillaume BASCOUL

Kevin SANCHEZ

EUFANET Smart workshop Dresden – 2012, September 17-18

Purpose

Browse optical probing techniques(single point and image mode) usedto solve VLSI dynamic issues(functional at speed, timing issues)

Identify overlaps and specific fields

2

Identify overlaps and specific fields(only) covered by one technique.

Underlines trends and challengesrelated to ultimate CMOStechnologies

Outline

Introduction

LVI / LVP / TRE / TRI Background

Functional issues

3

Functional issues

Timing issues

BEOL and other issues

Conclusion

Introduction

Optical techniques are mandatory to analyze complexVLSI: Backside analysis to access active area through silicon

(multilayer BEOL, metal dummies in full planar, flip chip, LeadOn Chip…)

Static and dynamic optical techniques include opticalstimulation (laser) and probing techniques

Probing techniques to replace ebeam testing (image

4

Probing techniques to replace ebeam testing (imagemode or single point mode)

Dynamic: Laser (LVI, LVP) or EMMI (TRE, TRI) ?

STIMULATION ANALYSIS TECHNIQUE

optical electrical Laser Pumping (OBIC, TLS, SDL…)

electrical optical Probing (laser,emission …)

D.U.T

Outline

Introduction


Functional issues

5

Functional issues

Timing issues


Conclusion

LVP / LVI background (1)

Modulation of reflected laser by structure undertest

Laser Voltage Probing Based on

• Franz-Keldish effect (1064 nm) (band gap modulation =>absorption modulation)

• Free carrier absorption, (1340 nm) (free carrier modulation =>

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• Free carrier absorption, (1340 nm) (free carrier modulation =>absorption modulation)

2 schemes• CW (Continuous wave)

• “1064 could trigger latchup (OBIC)• Timing resolution given by the photodiode (down to 200 ps)

• Pulsed laser• Mostly 1064nm• Timing resolution given by pulse width (down to 10 ps)

Gives signal shape and timing / not signal voltage


7


LVI / LVP advantages Real shape of the

signal Work at low voltage Does not need current

LVI / LVP limitations

8

LVI / LVP limitations LVI is In fact

Frequency Tracing(use of Lock-in /spectrum analysis),only {x,y} map at onefrequency

Very sensitive to focus Complex situation

when spot size isgreater than uniformsubstructure

LVI LVP


9

Light Emission from relaxation of carriers speedup by the electrical field of overload MOS

Photon

TRE / TRI background (1)

1010

Source Drain

SiO2

Gate

P-Bulk

. . ... ... .. .

Photon

PhotonPinch-off

SG

D

TRI Detector


TRE (Time Resolved Emission, list of {t})

TRI (Time Resolved Imaging, list of {x,y,t})

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t

Ph

t

n-MOS p-MOS


TRE / TRI advantages No invasive

Additive (if 2 emissive structures arein the same pixel)

Easy to setup

Spectrum / Number of photonconsiderations

12

considerations VDS voltage (balanced by QE:

coulombian effects and field)

Number and duration of transitions

TRE / TRI limitations Need voltage and current

View transitions not signal shape

Does not work well at low frequency

Cannot work at low voltage

Huge amount of data (TRI)

Number of photons / secondproportional toTransition repetition rate

Increase Nb of emitted photonsShift to visible

Circuits view TRI view

Time TimeWaveformpattern Clock

Transitionpattern Clock


13

Y

X

Y

X

Outline

Introduction


Functional issues

14

Functional issues

Timing issues


Conclusion

Functional issue challenge

Find gate involved in Open More complex situation Neither overconsumtion

(or not measurable)targetable by statictechniques nor soft defecttargetable by DLS

Gate ngood

Gate n+1bad

Open

No propagation

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targetable by DLS

=> track a signal insidethe die LVI (map different

frequencies and look atdifferences

TRI (work on the fulldatabase {x,y,t} to find thefirst difference, activityanalysis or patternmatching

Gate ngood

Gate n+1bad

Fault

Bad output

Functional defect tracking with LVI

Only frequency tracing

But also work at low frequency

Can work at low magnification (but challenged by signalcomposition)

Pinpoint the last gate with signal whatever the defectplace is

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place is

Gate ngood

Gate n+1bad

Open

Gate ngood

Gate n+1bad

Open

Database analysis with TRI

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Compared dataCompared data

1,244 dissimilarevents

Identifying of the failureIdentifying of the failure

originorigin with the firstwith the firstdissimilar events.dissimilar events.

Database comparison (ADC MAX186), Raw data 601,942 photons,processed data: 38,735 photons

Activity Analysis with TRI

Block activity depends on control signal (Input 0 and Input 1 inthis case) Blocks 1, 2, 3 and 4 related to input 0 and blocks 6,7, 8 and 9 related to input 1

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Pattern matching with TRI

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Ability to track any kind of signal Pattern matching (based on events) High probablity for long pattern (2n)

Can work at low magnification (but challenged by clock signalsuperimposition)

Pinpoint the last good gate with (BEOL) load, depends on open position Combining with LVI will give complementary information on open position

TRI more complex but more infos / complementary info (Opens)

Outline

Introduction


Functional issues

20

Functional issues

Timing issues


Conclusion

Timing issue challenge

Gate involved in timing issue: rising or falling edge too slow Rising or falling edge delayed

Electrical behavior Transition delayed or too long (TRE / TRI)

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Transition delayed or too long (TRE / TRI) Signal shape, rising edge or falling edge (LVP)

Where is the faulty gate? LVI: second harmonic analysis, difficult to locate

delay (same signature) TRI: direct ({x,y,t} database analysis or specific

Signal propagation analysis

LVI: Second Harmonic Analysis

Good

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From ST Crolles (Courtesy ofGuillaume Celi and Sylain Dudit)

A good clock signal will havesquare shape with 50% of dutycycle

Any timing issue will modify thisspectrum (even harmonics)

Good

Bad

2nd harmonicLVI

TRI: Signal propagation

Visualization of thepropagation Temporal Frame-by-

Frame Chronogram in a selected

square (transistor or gate)

No way to vilualize delay

FPGA(130 nm)EMMI x20

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No way to vilualize delayin a map (pixel intensitylinked to emission)

“Digital Lock-in” treatmentof TRI database Select transition of

interest Map the phase (directly

linked to time)

Outline

Introduction


Functional issues

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Functional issues

Timing issues


Conclusion

Active area

Glitch (detected by TRI) Experiment done on 32

nm technology

LVP / LVI Low voltage

Down to less than 100 mV

No current Transmission gate NOR / NAND

DNand

D

Off

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PropagationDelay in D

Glitch

TransmissionGate

1 1

Off

TransmissionGate

1 1

On

(BEOL) defect / Thermal behavior

Thermoreflectance TFI (Courtesy of Guillaume Celi

& Sylvain Dudit ST) Split Thermoreflectance from

LVI by modulating Power supply(min-max to keep the samebehavior)

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Ultra fast thermography Experiments done on sample

shown ability to detect thermalphotons starting at 50 °C

Difficult to differenciate thermal /photo emission:

• OK on only BEOL• Possible by timing analysis

Exponentially increase withtemperature: heating the samplerise up thermal emission morethan photo emission

42°C 53°C 60°C 71°C

80°C 90°C 100°C 110°C

Spatial resolution challenges

Spatial resolution challenged For both techniques

Even with SiL

Transistor an elementary gate localisation lost

Detectivity remains high

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Detectivity remains high LVI / LVP: complex contribution of Neighbors (+, -, =)

TRE / TRI: photons emitted by the neighbors areadded (+)

LVx more sensitive to focus

Low volltage LVP on Analog structure

LV

Psig

nalm

ag

nit

ud

e

Acquisition time <20sec for each waveforms

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All data are displayed with the same H/V scale

LVP signal magnitude vs. DAC value

DAC Voltage (Volt)

LV

Psig

nalm

ag

nit

ud

e

This set of data on DAC structure demonstrates a strong linearity betweenLVP signal and actual voltage on the cheap

Good CW-LVP results on analog part down to 70mV

1.75 1.4 1.05 0.7 0.35 0.07

Courtesy of Antoine Reverdy (Sector Technology)

From Samples and images courtesy of NXP semiconductor

Outline

Introduction


Functional issues

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Functional issues

Timing issues


Conclusion

Conclusion

LVP-LVILow frequency LVILow voltage (analog, transmission gates …)

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TRE-TRI

FunctionalTimingThermal

Pattern MatchingGlitch

CW (down to 100 ps)10 ps with pulsed laser CW (80 ps

TRI camera)

Both techniques have there advantages and drawbacks Even if there is an overlap to use them, we can

underline the complementarities Both techniques are challenged by spatial resolution Both techniques can do more than issues in active

areas

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Thank you for your attention

Any question?

Documents

LVI, LVP, TRI, TRE a technical approach to chose the right toolsphilippe.perdu.free.fr/workshops/workshop2012/SmartFA/pdf... · 2015-07-22 · TRI: Signal propagation Visualization