Lr 34063

LESHAN RADIO COMPANY, LTD.

LR34063-1/12

LR34063DC-DC ConverterControl Circuits

The LR34063 Series is a monolithic control circuit containing

the primary functions required for DC-to-DC converters.These

devices consist of an internal temperature compensated refe-

rence,comparator, controlled duty cycle oscillator with an active

current limit circuit, driver and high current output switch.This

series was specifically designed to be incorporated in Step-Down

and Step-Up and Voltage-Inverting applications with a minimum

number of external components.

DESCRIPTION:

DIP-8

SOP-8FEATURE::

Operation from 3.0 V to 40 V Input

Low Standby Current

Current Limiting

Output Switch Current to 1.5 A

Output Voltage Adjustable

Frequency Operation to 100 kHz

Precision 2% Reference

PIN CONNECTIONS

1SwitchCollector

SwitchEmitter

TimingCapacitor

Gnd

DriverCollector

Ipk Sense

VCC

ComparatorInvertingInput

(Top View)

2

3

4 5

6

7

8

BLOCK DIAGRAM

S Q

R

Q2

Q1

100

IpkOscillator CT

Comparator

+

–

1.25 VReferenceRegulator

1

2

3

45

6

7

8DriveCollector

IpkSense

VCC

ComparatorInverting

Input

SwitchCollector

SwitchEmitter

TimingCapacitor

Gnd

(Bottom View)

Device Package

LR34063 DIP-8

LR34063D SOP-8

ORDERING INFORMATION


LR34063-2/12

LR34063MAXIMUM RATINGS

Rating Symbol Value Unit

Power Supply Voltage VCC 40 Vdc

Comparator Input Voltage Range VIR –0.3 to +40 Vdc

Switch Collector Voltage VC(switch) 40 Vdc

Switch Emitter Voltage (VPin 1 = 40 V) VE(switch) 40 Vdc

Switch Collector to Emitter Voltage VCE(switch) 40 Vdc

Driver Collector Voltage VC(driver) 40 Vdc

Driver Collector Current (Note 1) IC(driver) 100 mA

Switch Current ISW 1.5 A

Power Dissipation and Thermal CharacteristicsDIP-8 Package,

TA = 25°C PD 1.25 WThermal Resistance RθJA 100 °C/W

SOP-8 Package, D SuffixTA = 25°C PD 625 mWThermal Resistance RθJA 160 °C/W

Operating Junction Temperature TJ +150 °C

Operating Ambient Temperature Range TA °C 0 to +70

Storage Temperature Range Tstg –65 to +150 °C

NOTES: 1. Maximum package power dissipation limits must be observed.

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TA = Tlow to Thigh [Note 2], unless otherwise specified.)

Characteristics Symbol Min Typ Max Unit

OSCILLATOR

Frequency (VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C) fosc 24 33 42 kHz

Charge Current (VCC = 5.0 V to 40 V, TA = 25°C) Ichg 24 35 42 µA

Discharge Current (VCC = 5.0 V to 40 V, TA = 25°C) Idischg 140 220 260 µA

Discharge to Charge Current Ratio (Pin 7 to VCC, TA = 25°C) Idischg/Ichg 5.2 6.5 7.5 –

Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C) Vipk(sense) 250 300 350 mV

OUTPUT SWITCH (Note 3)

Saturation Voltage, Darlington Connection (Note 4)( ISW = 1.0 A, Pins 1, 8 connected)

VCE(sat) – 1.0 1.3 V

Saturation Voltage, Darlington Connection(ISW = 1.0 A, RPin 8 = 82 Ω to VCC, Forced β 20)

VCE(sat) – 0.45 0.7 V

DC Current Gain (ISW = 1.0 A, VCE = 5.0 V, TA = 25°C) hFE 50 75 – –

Collector Off–State Current (VCE = 40 V) IC(off) – 0.01 100 µA

NOTES: 2. Tlow = 0°C ,Thigh = +70°C3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.4. If the output switch is driven into hard saturation (non–Darlington configuration) at low switch currents (≤ 300 mA) and high driver currents (≥ 30 mA),

it may take up to 2.0 µs for it to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is magnified at hightemperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non–Darlingtonconfiguration is used, the following output drive condition is recommended:

*The 100 Ω resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts.

Forced of output switch :IC output

IC driver – 7.0 mA * 10


LR34063-3/12

LR34063ELECTRICAL CHARACTERISTICS (continued) (VCC = 5.0 V, TA = Tlow to Thigh [Note 2], unless otherwise specified.)

Characteristics UnitMaxTypMinSymbol

COMPARATOR

Threshold VoltageTA = 25°CTA = Tlow to Thigh

Vth1.231.21

1.25–

1.271.29

V

Threshold Voltage Line Regulation (VCC = 3.0 V to 40 V) Regline – 1.4 5.0 mV

Input Bias Current (Vin = 0 V) IIB – –20 –400 nA

TOTAL DEVICE

Supply Current (VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC,VPin 5 > Vth, Pin 2 = Gnd, remaining pins open)

ICC – – 4.0 mA

NOTES: 2. Tlow = 0°C , Thigh = +70°C3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.4. If the output switch is driven into hard saturation (non–Darlington configuration) at low switch currents (≤ 300 mA) and high driver currents (≥ 30 mA),

it may take up to 2.0 µs for it to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is magnified at hightemperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non–Darlingtonconfiguration is used, the following output drive condition is recommended:

*The 100 Ω resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts.

Forced of output switch :IC output

IC driver – 7.0 mA * 10


LR34063-4/12

LR34063

ton

VCC = 5.0 VPin 7 = VCCPin 5 = GndTA = 25°C

toff

Figure 1. Output Switch On–Off Time versusOscillator Timing Capacitor Figure 2. Timing Capacitor Waveform

0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10CT, OSCILLATOR TIMING CAPACITOR (nF)

, OU

TPU

T SW

ITC

H O

N-O

FF T

IME

( s)

on–o

ffµ

t

10 µs/DIV

, OSC

ILLA

TOR

VO

LTAG

E (V

)O

SC

200

mV/

DIV

V

VCC = 5.0 VPin 7 = VCCPin 2 = Gnd

Pins 1, 5, 8 = OpenCT = 1.0 nFTA = 25°C

1000

500

200

100

50

20

10

5.0

2.0

1.0

Figure 3. Emitter Follower Configuration OutputSaturation Voltage versus Emitter Current

Figure 4. Common Emitter Configuration OutputSwitch Saturation Voltage versus

Collector Current

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

, SAT

UR

ATIO

N V

OLT

AGE

(V)

CE(

sat)

IE, EMITTER CURRENT (A)

V

VCC = 5.0 V Pins 1, 7, 8 = VCCPins 3, 5 = GndTA = 25°C(See Note 4)

, SAT

UR

ATIO

N V

OLT

AGE

(V)

CE(

sat)

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6IC, COLLECTOR CURRENT(A)

V

Darlington Connection

Forced β = 20

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1.0

1.1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.10

1.0

VCC = 5.0 V Pin 7 = VCCPins 2, 3, 5 = GndTA = 25°C(See Note 5)

NOTE: 5. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.

Figure 5. Current Limit Sense Voltageversus Temperature

Figure 6. Standby Supply Current versusSupply Voltage

–55 –25 0 25 50 75 100 125

, CU

RR

ENT

LIM

IT S

ENSE

VO

LTAG

E (V

)IP

K(se

nse)

TA, AMBIENT TEMPERATURE (°C)

V

VCC = 5.0 VIchg = Idischg

0 5.0 10 15 20 25 30 35 40

, SU

PPLY

CU

RR

ENT

(mA)

CC

VCC, SUPPLY VOLTAGE (V)

I

CT = 1.0 nF Pin 7 = VCCPin 2 = Gnd

400

380

360340

320

300

280

260

240

220

200

3.6

3.2

2.4

2.0

1.6

1.2

0.8

0.4

0

2.8


LR34063-5/12

LR34063

170 H

L

8

180

7

Rsc0.22

6Vin12 V

100+

5

R1 2.2 k

R2

47 k

S Q

R

Q2

Q1

Ipk

OSC

CTVCC

+

−Comp.

1.25 VRefReg

1

2

3

4

1N5819

CT

1500pF

330 CO

+

Vout28 V/175 mA Vout

1.0 H

+100

Optional Filter

Test Conditions Results

Line Regulation Vin = 8.0 V to 16 V, IO = 175 mA 30 mV = ±0.05%

Load Regulation Vin = 12 V, IO = 75 mA to 175 mA 10 mV = ±0.017%

Output Ripple Vin = 12 V, IO = 175 mA 400 mVpp

Efficiency Vin = 12 V, IO = 175 mA 87.7%

Output Ripple With Optional Filter Vin = 12 V, IO = 175 mA 40 mVpp

Figure 7. Step−Up Converter


LR34063-6/12

LR34063

8a. External NPN Switch 8b. External NPN Saturated Switch(See Note 6)

8

7

6

Rsc

Vin

1

2

VoutR

R 0 for constant Vin

6. If the output switch is driven into hard saturation (non−Darlington configuration) at low switch currents (≤ 300 mA) and high driver currents(≥ 30 mA), it may take up to 2.0 s to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is magnifiedat high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If anon−Darlington configuration is used, the following output drive condition is recommended.

8

7

6

Rsc

Vin

1

2

Vout

Figure 8. External Current Boost Connections for I C Peak Greater than 1.5 A


LR34063-7/12

LR34063

1.25 VRefReg

Vout5.0 V/500 mA

1.0 H

Vout+

100

Optional Filter

8

7

Rsc0.33

6Vin25 V

100+

R1 1.2 k

R2

3.6 k

S Q

R

Q2

Q1

Ipk

OSCCT

VCC

+

− Comp.

1

2

3

4

CT

470pF

470 CO

+

5

L

1N5819

220 H


Line Regulation Vin = 15 V to 25 V, IO = 500 mA 12 mV = ±0.12%

Load Regulation Vin = 25 V, IO = 50 mA to 500 mA 3.0 mV = ±0.03%

Output Ripple Vin = 25 V, IO = 500 mA 120 mVpp

Short Circuit Current Vin = 25 V, RL = 0.1 1.1 A

Efficiency Vin = 25 V, IO = 500 mA 83.7%

Output Ripple With Optional Filter Vin = 25 V, IO = 500 mA 40 mVpp

Figure 9. Step−Down Converter

10a. External NPN Switch 10b. External PNP Saturated Switch

8

7

6

Rsc

Vin

1

2

Vout

8

7

6

Rsc

Vin

1

2

V



LR34063-8/12

LR34063

1.25 VRefReg

Vout−12 V/100 mA Vout

1.0 H

+100

Optional Filter

8

7

Rsc0.24

6Vin4.5 V to 6.0 V

100+

5

R2 8.2 k

S Q

R

Q2

Q1

Ipk

OSCCT

Comp.

R1

953

1

2

3

4

+1500pF

+

−

1N5819

1000 f+

88 H

VCC

CO

L


Line Regulation Vin = 4.5 V to 6.0 V, IO = 100 mA 3.0 mV = ±0.012%

Load Regulation Vin = 5.0 V, IO = 10 mA to 100 mA 0.022 V = ±0.09%

Output Ripple Vin = 5.0 V, IO = 100 mA 500 mVpp

Short Circuit Current Vin = 5.0 V, RL = 0.1 910 mA

Efficiency Vin = 5.0 V, IO = 100 mA 62.2%

Output Ripple With Optional Filter Vin = 5.0 V, IO = 100 mA 70 mVpp

Figure 11. Voltage Inverting Converter

12a. External NPN Switch 12b. External PNP Saturated Switch

8

7

6Vin

1

2

Vout

8

7

6Vin

1

2

Vout



LR34063-9/12

LR34063

5.45′′

2.500′′

(Top view, copper foil as seen through the board from the component side)

(Top View, Component Side) *Optional Filter.

Figure 13. Printed Circuit Board and Component Layout(Circuits of Figures 7, 9, 11)

LR34063 LR34063 LR34063

INDUCTOR DATA

Converter Inductance ( H) Turns/Wire

Step−Up 170 38 Turns of #22 AWG

Step−Down 220 48 Turns of #22 AWG

Voltage−Inverting 88 28 Turns of #22 AWG

All inductors are wound on Magnetics Inc. 55117 toroidal core.


LR34063-10/12

LR34063

Calculation Step−Up Step−Down Voltage−Inverting

ton/toff Vout VF Vin(min)Vin(min) Vsat

Vout VFVin(min) Vsat Vout

|Vout| VFVin Vsat

(ton + toff) 1f

1f

1f

toff ton tofftontoff

1

ton tofftontoff

1

ton tofftontoff

1

ton (ton + toff) − toff (ton + toff) − toff (ton + toff) − toff

CT 4.0 x 10−5 ton 4.0 x 10−5 ton 4.0 x 10−5 ton

Ipk(switch)2Iout(max) ton

toff 1 2Iout(max) 2Iout(max) ton

toff 1

Rsc 0.3/Ipk(switch) 0.3/Ipk(switch) 0.3/Ipk(switch)

L(min) (Vin(min) Vsat)

Ipk(switch) ton(max) (Vin(min) Vsat Vout)

Ipk(switch) ton(max) (Vin(min) Vsat)

Ipk(switch) ton(max)

CO9

IouttonVripple(pp)

Ipk(switch)(ton toff)

8Vripple(pp)9

IouttonVripple(pp)

Vsat = Saturation voltage of the output switch.VF = Forward voltage drop of the output rectifier.

The following power supply characteristics must be chosen:

Vin − Nominal input voltage.Vout − Desired output voltage,Iout − Desired output current.fmin − Minimum desired output switching frequency at the selected values of Vin and IO.Vripple(pp) − Desired peak−to−peak output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its

equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect theline and load regulation.

|Vout| 1.25 1 R2R1

Figure 14. Design Formula Table


LR34063-11/12

LR34063

SOP-8

Mechanical Dimensions

Unit: mm


LR34063-12/12

LR34063

DIP-8

Mechanical Dimensions (Continued)

Unit: mm

Documents

Lr 34063