lost-contact.mit.edu · Web viewThe University of Pittsburgh Office of Grants and Contracts 350 Thackeray Hall University of Pittsburgh Pittsburgh, PA 15260 PROPOSAL FOR RESEARCH

The University of PittsburghOffice of Grants and Contracts

350 Thackeray HallUniversity of PittsburghPittsburgh, PA 15260

PROPOSAL FOR RESEARCH TO BE CONDUCTED UNDER THE SPONSORSHIP OF

The National Science FoundationTITLE OF PROPOSAL

Volumetric Packaging Architectures for Mixed-Technology Systems

PRINCIPAL INVESTIGATORS

Donald M. Chiarulli & Steven P. Levitan, University of Pittsburgh

PROJECT PERIOD: $ September 1st, 2004 – August 31st, 2007TOTAL PROJECT BUDGET: $ 599,999FIRST YEAR: $ 299,999ENDORSEMENTS:

___________________________________ ___________________________________Donald M. Chiarulli, Professor Steven P. Levitan, ProfessorDepartment of Computer Science Department of Electrical Engineering+1-412-624-8839 [email protected] +1-412-648-9663 [email protected]

___________________________________ ___________________________________Rami G. Melhem, Chairman Joel Falk, ChairmanDepartment of Computer Science Department of Electrical Engineering+1-412-624-8493 +1-412-624-8000

___________________________________ ___________________________________N. John Cooper, Dean Gerald D. Holder, DeanFaculty of Arts and Sciences School of Engineering +1-412-624-6090 +1-412-624-9809

___________________________________Michael M. Crouch, DirectorOffice of Grants and Contracts+1-412-624-7410

mailto:[email protected]

mailto:[email protected]

Volumetric Packaging Architectures for Mixed-Technology Systems – Chiarulli & Levitan

Project Summary

The goal of this research is the development of new architectures and packaging technology that will enable a new generation of adaptive, mobile, and low power mixed-technology systems. These systems will seamlessly integrate devices and functions across multiple energy domains such as electronics, optics, and fluidics to support sensing, analysis and communication in a single package. The architectural and packaging challenge lies in the fundamental differences between substrate materials, feature scale and processing requirements for the integrated devices in each domain. Monolithic integration as we know it will not work here. Multi-chip, system-in-package (SIP), integration solutions will be required. This research is focused on the development of a revolutionary volumetric substrate that will be quite literally at the core of these new systems. It is the basis of a 3D integration and packaging technology in which devices in various technology domains are mounted on the outside surfaces of a polyhedral solid. Interconnections between the devices are made through the internal volume on physical channels that can spatially interleave optical and electronic transport for analog and digital information. Structures within the internal volume can also be designed to distribute fluidic materials, electrical power and ground. By using the core volume for interconnect, thermal extraction is done through the outside surfaces of each device and package I/O is done on polyhedral surfaces reserved for this purpose.

The intellectual merit of the proposed activity - stems from the challenges of developing the substrate material from which the core solid is fabricated. The key requirement of this research is that the introduction of physical channels in any one energy domain must not preclude the requirements of another. For example, the introduction of optical channels in one region of the package cannot inhibit the distribution of electrical power and ground in the same region. Connectivity must be flexible enough to meet design requirements and capable of being spatially interleaved to support maximal density. This is the enabling technology for an integrated packaging solution that can meet all of the electrical and optical interconnection; fluidic material transport; power distribution; mechanical stability; and thermal management requirements for future mixed technology SIP devices.

The broader impacts resulting from the proposed activity – will come from the ability to design and create integrated sensing, processing, actuating, and communicating systems. These systems will enable mobile, low-power multi-technology applications such as “lab-on-a-chip” biological sensors for environmental security; wearable computing and communications devices; implantable medical devices for diagnostics and prosthetic support. A second impact will come from the education of students pursuing this research who will be confronted with the need to understand and support the multiple engineering disciplines represented by these multi-technology architectures.


Project DescriptionResults from Previous Grants

Principal Investigators: S. P. Levitan and D. M. ChiarulliAward Number: C-CR 9988319Award Amount: $638,293 Period: 9/15/00 – 9/14/03REU Supplement: $22,500, 09/01/00- 8/31/03 Title: Design Automation for Micro-Scale Mixed Technology Systems

Previous funding has supported the development of CAD tools for the design and analysis of free-space optical-mechanical-electronic microsystems (OMEMS) [17]. In a “free-space” optical system, light beams propagate from sources to detectors through lenses, modulators, beam splitters, and mirrors without being guided by fiber or other wave-guide material. We have developed computationally efficient models for optical propagation through these components as well as for digital and analog electronic circuits at the optoelectronic interface. More recently, we have developed compatible mechanical models for MEMS components. The result has been an integrated system that spans optical, electrical and mechanical domains.

The outcome of this research is embodied in a design and analysis tool called Chatoyant. Chatoyant is a multi-domain simulation and analysis tool based on the Ptolemy backbone [41]. Optical, electrical and mechanical components are modeled in an object-oriented language. Systems can be designed by composing objects from the component library using a graphical user interface. A multi-level simulation engine performs multi-domain system-level simulation. Each behavioral component model is solved independently with each solver coupled by a discrete event simulator at the system-level. The result is a very fast and accurate simulation of large systems. In Chatoyant, a user can perform end-to-end modeling of systems in which data signals are exchanged between the optical, mechanical and electronic domains. Analysis tools provide for both static simulations, in which issues such as power budget and alignment constraints can be verified and dynamic simulations, where arrays of streams of data are passed through the system. Dynamic simulations provide the user with analyses such as crosstalk, insertion loss, noise, and bit error rate (BER). Mechanical tolerancing is also supported using a Monte Carlo technique, where multidimensional displacements within specified tolerance limits are evaluated to characterize system alignment sensitivity to thermal and mechanical stresses.

Chatoyant has been used to model a wide range of optical-MEM systems including micro-mirror arrays, for display and network switches; electrostatically actuated switches, MEMS based interferometer switches; grating light-valve beam steering display systems; and several free space optoelectronic computing and communications systems. We have used these facilities to successfully design and test a number of electronic and optoelectronic devices and systems. These have been fabricated by the MOSIS service using multiple CMOS and GaAs foundries, Peregrine Semiconductor, using their UTSi (Silicon on Sapphire) foundry, AT&T Lucent, using their GaAs FET-SEED process and several experimental projects fabricated through the Consortium for Optical and Optoelectronic Technologies in Computing Program (CO-OP) funded by DARPA

Our research has been documented in 36 technical papers and 18 invited presentations [Error:Reference source not found-43]. Several of these papers included undergraduate students as co-authors and are highlighted (in boldface) in the reference section. The funding from this, and a previous related grant, has partially supported seven graduate students and, with the help of two Research Experiences for Undergraduates supplements, has also supported nine undergraduates. This work has been the basis of two M.S. theses; two M.S. projects, one Ph.D. dissertation, and is the ongoing research for three other M.S. theses and one Ph.D. dissertation. The Ph.D. student is now faculty at Drexel, several of the M.S. students are pursuing their Ph.D.s (one at Pitt and one at Georgia Tech), and several of the undergraduate researchers have gone on to graduate school (at Pitt, Villanova, and U.C. Berkeley). Concurrent with the research efforts, we have offered graduate seminars in the Departments of Computer Science and

- 1 -


Electrical Engineering on “Optical Computing - Architectures and Algorithms.” We have also demonstrated our software at the University Booth at the Design Automation Conference, for the past six years.

We have recently begun distributing an “alpha” release of the Chatoyant software tools on a CDROM. One measure of the impact of our work is that we have received requests from over a dozen university and industry research groups for copies of the software. This has lead to several promising collaborations with companies such as Telcordia Technologies, Coventor, Lucent, and Honeywell, as well as university collaborations with UC San Diego, UC Santa Barbara, and UC Berkeley. Other groups that have received copies of the software include Virtual Photonics, Sun Microsystems, Hewlett Packard/EE-Soft, and Telecordia Technologies (formerly BellCore). We have also participated in the DARPA Free Space Optoelectronic Information Processing (FS-OIP) project to model components, and the complete 3D Opto-Electronic Stacked Processor (3DOESP) architecture built at UC San Diego [37]. More recently the results of this work were used in the DARPA Neo-CAD program to model a free-space opto-electronic interconnection network, built by the Mayo Foundation, operating at 10Gb/s/channel [44].

The results of our work to date have been very successful. However, as we have modeled complex systems composed of diverse technologies, we have realized that there is a fundamental gap in the packaging and architectures required to enable the kinds of tightly integrated systems that could be created with these technologies. Therefore, our goal in this work is to develop and provide volumetric packaging architecture solutions that will enable fabrication of truly integrated multi-technology systems.

- 2 -


IntroductionDense integration technology now spans the domains of electronics, optics, micro-mechanics, and micro-fluidic systems. As these new technologies come online, the challenge is to design an integrated system that incorporates devices and subsystem across multiple technology domains in a single package. Consider for example, the potential design for a micro-chemical sensing and analysis device. Such a system will include micro-fluidic components for chemistry, complex sensors for data capture, processor and memory components for analysis, and analog electronics for communication. Each of these component subsystems is fabricated either on incompatible substrates or with different processing technology. A single monolithic integrated implementation is impossible. Chip-level integration using planar MCM solutions can be used for electrical interconnect but these devices are reaching limits on bandwidth and connection density Moreover, these substrate have no support for optical and fluidic interconnection. In this research we are investigating a new type of compact, high performance interconnection and packaging technology that is specifically designed for mixed technology domain, multi-chip systems. It is based on a 3D architecture using a new type of multi-domain substrate that can simultaneously support information, electrical power, and materials transport for analog and digital optics, analog and digital electronics, and fluidics domains.

Finish intro with example package.

Multi-technology Substrate CompositionThe new substrate is not a single material. It is a bonded composite consisting of segments of several materials incorporated into a 3D solid. Each material is engineered to transport signals and materials in a specific domain between the outside surfaces of the solid. Although designed for different technology domains, the constituent materials are all based on a single underlying manufacturing process. The manufacturing technology for fiber image guides (FIGs) and its ability to fabricate dense ordered arrays of fiber materials.

A fiber image guide is an optical device that consists of a densely packed lattice of small core optical fibers. An example is shown in Figure 1. FIGs such as this one, designed for optical imaging applications, have typical core diameters of 5-7um with core

- 3 -

Figure 3: Rigid segment of Fiber image guide with CMOS/Silicon on Sapphire die on surface.

Figure 2: Optical Capillary Array (100um) made from the same process as optical image guide with fiber cores omitted. Inset below is from another capillary

array with 5um diameter

Figure 1: Fiber Image Guide transporting array of optical data channels. (inset) Magnified view of

5um fiber cores


pitch between 12 and 15 um. Each optical fiber consists of a region of “core” glass surrounded by a cylinder of “cladding” glass. The optical characteristics of these devices are such that objects imaged on the one surface of the device are “spatially sampled” by each fiber core creating a corresponding image on the opposite surface. They are commonly used in remote inspection applications. For optical transport within our MCM substrate we have adopted this technology directly. We use small (cm scale) and rigid segments FIG material within the substrate. These segments transport analog optical images to sensor arrays or in optical communications applications; the image is an array of optical channels. Figure 1 shows an example of an optical spot array of 50um spots on a 125x62.5um pitch. Each spot illuminates at least 7 cores in the 15um pitch FIG lattice shown in magnified image inset. Similarly there are at least 6 dark cores separating each spot at this channel density of 16 channels/mm2.

The key to adapting this technology to the electronics and fluidics domains lies in the manufacturing process. When a FIG is manufactured, each of the individual fibers are fabricated using a rod-in-tube method. In this technique, the fiber core begins as glass rod that is inserted into a cylinder of glass that eventually becomes the cladding glass. This system is drawn down in a fiber-drawing tower to produce a single mono fiber rod. In the second step, mono-fiber rods are stacked into a multi-fiber assembly. This multi-assembly is drawn down again into a multi-fiber-rod. A second stacking and drawing operation follows to create a multi-multi rod. The drawing and stacking steps are repeated until the final core diameter is reached. Throughout these draws, the glasses maintain their shape, preserve the core/clad boundaries, and reduce any manufacturing variances in the original mono fiber.

The extension of this process to fluidic and electrical transport is based on omitting the original core glass rod and drawing only the cylinders. The result is the production of ordered arrays of capillaries with diameter controlled by the number of times the multi-draw step is repeated. The capillary array shown in Figure 2 was fabricated with this process. Each capillary in this figure is 5um in diameter and the overall structure is 74um from side-to-side. The same capillaries can be used as a conduit for electrical connections. Electrical conductors can replace the cores either by directly drawing wires into them in during production or by deposition in a post-processing step. Such connections can be used for electrical signaling however they do not have the electrical characteristics necessary for power and ground connections. We address these connections with a different technique that is described later.

Optical fiber and fluidic/electrical capillary elements are interchangeable in the draw/stack/redraw steps of the manufacturing process. Thus, by mixing and matching capillary and optical multi-draw rods at the various redraw steps, it possible to fabricate a composite substrate material with engineered regions for optical electrical and fluidic transports.

Volumetric StructuresFor signal transport within a multi-sided MCM substrate, we use small, (cm scale) and rigid segments

FIG material. Figure 3 shows and example of this material with a CMOS/Silicon on Sapphire chip on the top surface. Thin versions of segments like these are cut into specific shapes with specific fiber orientations. Solid shapes with embedding interconnection patterns are formed by stacking these segments. An example of this procedure is shown in figure 4. In this case thin, hexagonal shape segments are cut from a section of fiber guide. The fiber orientation in each segment is arranged to provide a paths between differ pairs of sides. An extruded hexagon shape is made by stacking these segments. By manipulation the stacking order and orientation of the segment types, we can embed a variety of interconnection patterns into the solid. Layer thickness can also be manipulated. Thick layers can carry multiple channels; thin layers can partition a channel and support broadcast and multicast connections.

Figure 3 shows a segment of such material. The limitation of this structure is that it is inherently a point-to-point interconnection and can deliver signals only between two chips that are mounted to the two end surfaces of the segment. In order to build substrates that can support more than two chips, it is necessary

- 4 -


to provide a fan-out and fan-in mechanism whereby each chip can communicate with multiple partners. Our approach is based on the spatial partitioning of the end surfaces. Specifically, a segment(s) of substrate material such as the one shown in figure 3a is cut at various angles relative to the fiber propagation direction. These pieces are side-bonded, as shown in the background of the figure, such that one end forms a planar surface on with an OE-chip can be mounted. The other ends become spatially separated which is the basis of our fan-out mechanism. The planar surface is partitioned into regions based on the segments of substrate material bonded at the planar end. Each region provides for bi-directional interconnection through one of the cut bundles and delivers spatial separated signals at the other surface.

Using this technique we can implement a variety of 3D multi-chip substrates in the shape of extruded polygons. A simple example is shown in figure 5. Here, three segments of substrate material is cut in to equilateral triangular sections. Each triangle has one edge parallel to the direction of the drawn fibers/capillaries. and two edges at a 60-degree angle to them. By stacking each of these segments with a 60 degree relative rotation of each segment a three sided structure with interconnections between all sides is implemented. Similar arrangements of angular cut segments and rotated stacks can be used to implement a four, five, and six sided structures as shown in figure 6. Figure 7 shows two photographs of a prototype 4-chip structure in which the segments are stacked on bonded vertically rather than horizontally.. The photograph on the right demonstrates optical propagation for a laser spot originating from the left side, traversing the structure and exiting on the front face.

There are a number of ways in which to scale these MCM to larger numbers chips. The first is to simply increase the number of sides to the polygon formed in each slice. We have arbitrarily chosen a limit of 45 degrees as the maximum insertion angel for all structures. Given this limit, the interconnection graph for any OE-MCM built from an n-sided polygon stack will always connect each chip to (n/2)+1 devices on the opposite side of the device. Similarly, the diameter of the polygon for an N-sided implementation will determine the worst-case time-of-flight latency. Approximating to a circle, the latency will grow in proportion to (nw)/p where w is the width of each chip (side).

An alternative scaling method is to increase the size of each stack such that the interconnection pattern is repeated every N layers (or layer pairs). Each chip is designed so that the VCSEL array covers a full repetition pattern and is mounted with an offset relative to its neighbor. A 6-sided example is shown in this slide along with the corresponding interconnection pattern.

HORIZONTAL SCALING??

Signal CouplingIndividual chips are bonded to the outside surfaces of the polygon and communicate inward through the substrate core. External I/O and thermal extraction is accomplished through the outside surfaces of the chips or unused surfaces of the polygon. Specifically, thermal extraction for electronic devices is accomplished through heat sinks mounted on the outside surface of the chips. Optical illumination of fluorescent chemistry or bio-photonic chambers in a micro-fluidic device might enter though an outside surface. Finally, optical communication fibers, or electrical conductors can be bonded directly to the substrate on one the polygon surfaces.

Modeling

The design of mixed-technology systems, such as those proposed here, is hampered by a lack of design tools that are flexible enough to model new devices that span energy domains while providing an efficient simulation methodology that can give the designer results in minutes vs. hours. In the past, new device models were developed as PDE’s, coupling energy in space and time and often solved with finite element methods. These models are flexible but computationally expensive. More recently, circuit-based methods have been used to capture all behavior as electrical circuit analogs. This method produces faster simulations but is inflexible.

- 5 -


We have developed a behavioral modeling technique where each component is modeled as a set of differential equations in time. These models are extracted from lower level models and solved independently with solvers coupled by a discrete event simulator at the system level. The result is a very fast and accurate simulation of these mixed-technology systems. In this work we will extend our modeling techniques to incorporate the unique multi-technology properties of multi-technology devices, including optical propagation and coupling through the substrate, and, mechanical, thermal and chemical sensing. The ability to quickly generate and simulate behavioral models for new mixed-technology devices will enable the device designer to evaluate the impact of characteristic parameters on performance and optimize these new devices to meet design goals.

Modeling Examples – GLV and FIG modeling work from Tim…

The major tasks for the modeling effort can be broken down into four categories based on the novel technologies that will considered as part of our initial prototypes. The specific tasks are:

1. Extract electrical models for both the power/ground planes and the plated capillary signal wires to characterize their impedance and coupling for both low speed and high speed operation.

2. Implement compact models for light guiding through the image guide planes both in the fiber cores and in the cladding as well as modeling crosstalk between channels.

3. Develop models for capillary fluidic flow appropriate to the capillary sizes and fluid flow-rates for a variety of complex fluids and gases.

4. Create models for optic/fluidic interactions, including transmission and scattering from heterogeneous fluids and florescence.

Novelty/InnovationA key characteristic of our proposed 3D package design is that the same material provides both the

communication pathways and the structural elements in the package. This is an incredibly important concept with a direct impact on package density, reliability, and manufacturability. The enabling technology is a hybrid glass fiber guide material in which arrays of glass fibers for optical imaging are interleaved with arrays of micro-capillaries for electrical and fluidic transport.

As a substrate for optoelectronic interconnections, the optical “guided-image” transport capability of this material has several advantages over free space optics or core-per-channel fiber ribbon cables. It

combines high density with flexible geometry, high reliability, and passive alignment. For micro-fluidics embedded capillaries have similar reliability and manufacturing advantages. While there are distinct advantages in either domain, in combination, the material is uniquely well suited for multi-technology packaging because of the capability for tight integration of fluidic pathways, electrical interconnection and optic pathways for systems that combine photochemistry, electrochemistry, and fluorescent chemistry with sensing, signal processing, data analysis, and communications.

- 6 -

Figure 1: Conceptual Drawing of two SIP devices based on volumetric MCMs. (left) 4-chip CMOS/Electrooptic package mounted on segment of PCB

(right) CMOS/Electrooptic/Microfluidic device

I/O capillariesMicro-fluidics

Sensor array

E/O transceivers

CMOS

Illumination Source

CMOS + E/O VolumetricMCM Substrate

PCB segment (electrical I/O power/ground)


There are several specific innovations aspects this package that should be mentioned here, some are domain specific, others are cross domain.

o There are no global alignment constraints for optical links. Each device needs only to maintain positional alignment relative to its particular surface of the solid.

o Since the imaging portion of the solid is optically transparent, each component can be passively aligned using visual techniques that are similar to (but less demanding) commercial mask alignment.

o Since all components are directly bonded to a single volumetric solid, the package is highly tolerant to vibrational and mechanical stresses.

o By selecting glass materials with CTE’s close to the device substrate materials, mechanical coupling and optical alignment can be maintained through a wide temperature range. The core structure can also be incorporated into a thermal extraction regime.

o The dense array structure of the substrate material supports spatial channel oversampling. Each optical data channel is carried by several fiber cores. This guarantees uniform signal insertion throughout the array without regard to physical alignment of the optical source and the cores within the image guide.

o Because they are designed for imaging, the fiber cores in image guides typically have a substantially higher numerical aperture than communication fibers. Thus, FIG interfaces are highly tolerant to angular misalignment of optical sources. In addition, this property enables angular paths between non-parallel surfaces of the solid.

Proposed Research

The starting point for this effort is our current research into optical interconnections within CMOS/optoelectronic multi-chip-modules (OEMCMs). Our research group has already demonstrated volumetric OEMCM’s[1,2,3,4,5,6] based on guided image transport through fiber image guides (FIGs). FIGs are very dense arrays of small core optical fibers and are widely used in medical endoscopes and other remote inspection devices. We have built and demonstrated centimeter scale volumetric solids designed to transport arrays of optical channels between chips mounted the outside surfaces. These devices are capable of both analog and digital optical interconnections. Thus, they can deliver images to optical sensor arrays and/or digital information between data transceivers on the target devices.

Our research has several objectives. The first is to extent our OEMCM designs to support larger and more complex CMOS devices and to anticipate future, more tightly integrated transceiver technology. This will require a mechanism for interleaving optical transport media with electrical power and ground connections across the surfaces of each device. Our second objective recognizes that not all of the signals in a chip-to-chip interconnection are suited to optical data channels. The MCMs must provide a mechanism (separate from power and ground links) for low speed electrical and optical signaling in the same substrate. We plan to exploit the fact that the same manufacturing process for FIGs can also produce dense arrays of capillaries. By integrating capillaries into the optical transport media and by depositing electrical conductors into these capillaries we can provide a conduit for low bandwidth, point-to-point electronic signals. Our third objective is to develop solids in which the same capillary technology can be used for integrating fluidic transport into the substrate. These capillaries can provide for the exchange of materials between micro-fluidic devices or for fluidic I/O.

Work Plan

We have divided the task of developing testing and demonstrating this technology into several phases, each with individual objectives and milestones as follows.

1. Improved optoelectronic interconnections within OEMCMs. In our initial effort we focus on the development of purely optoelectronic interconnections. Our objective is to improve the scalability and reliability of volumetric OEMCM technology. In this phase we will perfect the techniques for

- 7 -


designing and producing complex solids with large numbers external surfaces for chip interconnect built from thin layers so as to support more complex embedded interconnections.

2. Spatial integration of optical data and electrical power and ground connections: This part of the research envisages the integration of complex and high performance CMOS devices into the MCM such that area pads for optical interconnections and electrical power and ground must be interleaved across the surface of the device. Thus, new types of solids must be investigated that incorporate layers of electrically conductive materials into the FIG stack either by direct plating onto the FIG layers or by the insertion of plated layers of dielectric material. The development of reliable coupling mechanisms on the end surface will also be a significant challenge.

3. Integration of mixed optical FIGs and capillary arrays: The same manufacturing technology that implements optical FIG’s can be used to implement equally dense capillary arrays. These capillaries can be used for fluidic transport, or they can be the conduit for electrical interconnections. This phase of the research is focused on the latter, techniques for depositing electrical conductors in these capillaries to make electrical conduits for low speed electronic signaling.

4. Integration of capillaries for fluidic transport: In this final step, our objective is the integration of capillary arrays for fluidic transport between micro-fluidic devices and for fluidic input and output.

Facilities

A General description of Swanson MEMS Lab:

The School of Engineering in the University of Pittsburgh has recently established the John Swanson Micro-Electro-Mechanical Systems (MEMS) Laboratory. []

The microfabrication and characterization facilities in the Swanson MEMS Lab are suitable for thin and thick film, both silicon and non-silicon based MEMS processing and device characterization. The MEMS Lab is located in the 6th floor of the Benedum Engineering Hall. With a strong research team on board with expertise in the areas of microfabrication, smart materials (piezoelectric and electrostrictive materials, magnetostrictive materials and shape memory alloys), functional polymers and devices, micro power generation systems, and MEMS device design and applications, the School of Engineering is now in a unique position to establish a strong MEMS and nanotechnology program, especially in the areas of functional materials based MEMS and nano-devices and systems.

The facilities of the Swanson MEMS Lab are open for the School wide MEMS and Nanotechnology research and education activities. It will also provide a platform for MEMS related new product development for industrials. The current facilities can be utilized for the fabrication, packaging, and

- 8 -

Polish

SiliconSubstrate

FORM LAYER(S)(Si, Oxide, Glass,Polymer, Metal…)

PHOTO -LITHOGRAPHY

ETCHING

Done?No Yes

Bond Testing

Sol-GelSol-Gel

Spin-CoatSpin-Coat

EpitaxyEpitaxy

CVDCVD

SputteringSputtering

Oxide GrowthOxide Growth

DevelopmentDevelopment

Wet ChemWet ChemIonicIonic

PlasmaPlasma

EvaporationEvaporation

BondingBonding

DesignDesignMake MaskMake Mask

ExposureExposure

Product

CleaningCleaning


testing of various thin and thick film materials, microsensors and microactuators, and various functional materials based micro- and nano-scale devices and structures. Due to stringent processing requirements, the lab is designed to meet class 1000/10,000 clean room specifications throughout with certain areas and rooms in the lab satisfying class 1000 specifications. Activities that can be performed in the John Swanson MEMS Laboratory include: DC and RF magnetron sputtering, photolithography, chemical vapor deposition (CVD), anisotropic and isotropic etching, reactive ion etching (RIE), bulk and surface micromachining, silicon-silicon bonding, electrostatic bonding, wire bonding, dicing, probe inspection, measurement and testing, etc. Figure X illustrates the general microfabrication processing and testing steps, which can be performed in the Swanson MEMS Lab for MEMS devices.

John A. Swanson Micro and Nanotechnology (JASMN) Lab is open to researchers at the University of Pittsbugh for a viarity of micro fabrication tasks. This is a class 10,000 clean room, located in Room 661 of Benedum Hall that has the following equipment:

Table 1 Equipment in Swanson Laboratory

DC and RF magnetron sputterer

Cressington 108 auto sputter-coater

Karl Suss RC8 spinner for spin on coating photoresist materials, polymeric materials

Karl Suss MA 6 mask aligner

Wet bench for wet chemical processes

Veeco Dektak ST surface profile measurement system for film thickness or etch depth measurement

HYBOND Model 572A 40 wedge bonder

Agilent 4284 A Precision LCR Meter

Karl Suss PM5 analytical probe system

Micro Automation 1100 wafer Dicing Saw

Projects can be done by lab personnel or by students and research associates from across the school to use for their own research projects. To facilitate access to the lab capabilities, the Associate Dean's office will provide seed funding to support early stage research that requires microfabrication.

Educational PlanWe plan to expand our collaboration with the MEMS fabrication faculty in the School of

Engineering, as well as others, to calibrate our models and validate our simulations.The School of Engineering in the University of Pittsburgh has recently established the John

Swanson Micro-Electro-Mechanical Systems (MEMS) Laboratory. Details of the capabilities of the laboratory can be found in the Faculties section of this proposal. The Laboratory was funded from several sources, most notably by John Swanson, the founder of Ansys Inc. who has established the Swanson Center Micro and Nano Systems, of which the PI’s are members. The school of Engineering has maintained a close relationship with Ansys and there are several collaborative efforts between Ansys and Pitt Engineering. The work reported here on modeling the GLV actuator was done with help from an

- 9 -


Ansys funded Mechanical Engineering Graduate student. This level of “casual” collaboration rarely happens across research groups, let alone departments. This collegial collaboration is more fruitful than forced collaborations, and is essential for the development of interdisciplinary engineering.

Our experience show that interdisciplinary research leads to interdisciplinary courses at both the graduate and undergraduate level. Two examples of this are the use of Chatoyant in our graduate seminar on Optical Computing, and the plans for joint courses on MEMS and optical micro-systems between the departments of Electrical Engineering and Mechanical Engineering at the University of Pittsburgh. The students, both graduate and undergraduate, who directly participate in the project and courses, are confronted with the need to understand all aspects our interdisciplinary environment. Many of the undergraduates have responded with plans for “double-majors” in EE/ME, or EE/CS and Physics.

- 10 -


References (should be a separate document – not in page count)Chatoyant Related Publications results from previous grants

1. S.P. Levitan, D.M. Chiarulli, “Multi-Level Mixed-Technology System-Level Simulation,” 3rd International Conference Computational Modeling and Simulation of Materials (CIMTEC 2004), Acireale, Sicily, Italy, May 30- June 4, 2004.

2. Mark Kahrs, Steven P. Levitan, Donald M. Chiarulli, Timothy P. Kurzweg, José A. Martínez, Jason Boles, Abijhit J. Davare, Ethan Jackson, Craig Windish, Fouad Kiamilev, Amit Bhaduri, Muhammad Taufik, Xingle Wang, Art Morris, James Kruchowski and Barry K. Gilbert, “System-level Modeling and Simulation of the 10G Optoelectronic Interconnect,” IEEE Journal of Selected Topics in Quantum Electronics, Vol. 21, No. 12, pp. 3244-3256, December 2003.

3. S.P. Levitan, J.A. Martinez, T.P. Kurzweg, A. J. Davare, M. Kahrs, M. Bails, D.M. Chiarulli, “System Simulation of Mixed-signal Multi-domain Microsystems with Piecewise Linear Models,” IEEE Transactions on Computer Aided Design, Vol. 22, No. 2, pp. 139-154, February 2003.

4. Michael Bails, Jose A. Martinez, Steven P. Levitan, Ilya Avdeev, Michael Lovell, Donald M. Chiarulli, “Simulation Performance of a Microwave Micro-electromechanical System Shunt Switch using Chatoyant,” Design Test Integration and Packaging of MEMS/MOEMS (DTIP 2004), Montreux, Switzerland, 12-14, May, 2004.

5. Michael Bails, Jose A. Martinez, Steven P. Levitan, Ilya Ivdeev Michael Lovell, Donald M. Chiarulli “Computational Prototyping of a RF MEMS Switch using Chatoyant,” Seventh International Conference on Modeling and Simulation of Microsystems (MSM2004), (poster) Boston, MA, March 7-11, 2004.

6. T.P. Kurzweg, A.S Sharma, S.K. Bhat, S.P. Levitan, D.M. Chiarulli, “System-Level Optical Interface Modeling for Microsystems,” Seventh International Conference on Modeling and Simulation of Microsystems (MSM2004), (poster) Boston, MA, March 7-11, 2004.

7. D. K. Reed, S. P. Levitan, J. Boles, J. A. Martinez, D. M. Chiarulli, “An Application of Parallel Discrete Event Simulation Algorithms to Mixed Domain System Simulation,” Design Automation and Test in Europe (DATE 2004), (Interactive Presentation) Paris, France, pp. 1356-1357, February 16-20, 2004.

8. S. P. Levitan1, T. P. Kurzweg, J. A. Martinez, M. Kahrs, J. Bakos, C. Windish, J. Boles, J. Hansson, M. Wiesser, C. Kuznia, “Modeling and Simulation of Fiber Image Guide Multi-Chip Modules for MOEMS Applications,” D. M. Chiarulli, SPIE Photonics West: MOEMS and Miniaturized Systems IV, Vol. 5346-18, pp. 141-150, San Jose, CA, 25-29 January 2004.

9. J. A. Martinez, T. P. Kurzweg, S. P. Levitan, “System Level Simulation of Mixed-signal Multi-domain Microsystems with Piecewise Linear Behavioral Models,” A.J. Davare, M. Kahrs, D. M. Chiarulli, Sixth International Conference on Modeling and Simulation of Microsystems (MSM2003), pp. San Francisco, CA, February, 2003.

10. M. Kahrs, S. P. Levitan, D. M. Chiarulli, T. P. Kurzweg, J. A. Martínez, J. Boles, A. J. Davare, E.K. Jackson, C. Windish, F. Kiamilev, Bhaduri, M. Taufik, X. Wang, A. S. Morris III, J. Repke, J. Kruchowski, B.K. Gilbert, “Signal Integrity Evaluation of a 10 Gbit/sec Optoelectronic Interconnect,” 2003 International Microwave Symposium (IMS’03), pp. 1211 - 1214 vol.2, Philadelphia, Pennsylvania, June 8-13, 2003.

11. T. P. Kurzweg, S. P. Levitan, J. A. Martinez, A. J. Davare, M. Kahrs, D. M. Chiarulli, System simulation of a GLV projection system, SPIE Photonics West, Micromachining and Microfabrication San Jose CA, 25-31 January 2003.

12. Timothy P Kurzweg, “Optical Propagation Methods for System-Level Modeling of Optical MEM Systems,” Ph. D. Electrical Engineering, University of Pittsburgh, August 2002.

- 1 -


13. T.P. Kurzweg, S.P. Levitan, J.A Martinez, M. Kahrs, and D.M. Chiarulli, “A Fast Optical Propagation Technique for Modeling Micro-Optical Systems,” Proceedings of the 39th IEEE/ACM Design Automation Conference (DAC’02), pp. 236-241, New Orleans, June 6-10, 2002.

14. L. Kriaa, W. Youssef, G. Nicolescu, S. Martinez, A.A. Jerraya, B. Courtois, S. Levitan, J. Martinez, T. Kurzweg, “System C-based Cosimulation for Global Validation of MOEMS,” Design Test Integration and Packaging of MEMS/MOEMS (DTIP 2002), pp. 64-70, SPIE Proceedings Vol. 4755, Cannes-Mandelieu, France, May 6-8, 2002.

15. T.P. Kurzweg, S.P. Levitan, J.A. Martinez, M. Kahrs and D.M. Chiarulli, “An Efficient Optical Propagation Technique for Optical MEM Simulation,” Fifth International Conference on Modeling and Simulation of Microsystems (MSM2002), pp. 352-355, San Juan, Puerto Rico, April 22-25, 2002.

16. J. A. Martinez, T. P. Kurzweg, S. P. Levitan, P. J. Marchand, D. M. Chiarulli, “Mixed-Technology System-Level Simulation,” Journal on Analog Integrated Circuits and Signal Processing, Vol. 29, No. 1-2, pp. 127-149, October 2001.

17. T.P. Kurzweg, J.A. Martinez, S.P. Levitan, P.J. Marchand, M.T. Shomsky, D.M. Chiarulli, “Modeling Optical MEM Systems,” Journal of Modeling and Simulation of Microsystems (JMSM), Vol. 2, No. 1, 2001, pp. 21-34.

18. T.P. Kurzweg, J.A. Martinez, S.P. Levitan, P.J. Marchand, D.M. Chiarulli, “Dynamic Simulation of Optical MEM Switches,” Design, Test, Integration, and Packaging of MEMS/MOEMS (DTIP2001), Cote d'Azur, France, April 25-27, 2001.

19. T.P. Kurzweg, J.A. Martinez, S.P. Levitan, P.J. Marchand, D.M. Chiarulli, “Dynamic Simulation of Optical MEM Switches,” Optics in Computing (OC'01), Lake Tahoe, NV, January 9-11, 2001, pp. 35-37.

20. J.A. Martinez, T.P. Kurzweg, S.P. Levitan, P.J. Marchand, D.M. Chiarulli, “Piecewise Linear Modeling of Vertical Cavity Surface Emitting Lasers,” IEEE Lasers and Electro-Optics (LEOS'00), Rio Grande, Puerto Rico, November 13-16, 2000.

21. T.P. Kurzweg, J.A. Martinez, S.P. Levitan, P.J. Marchand, D.M. Chiarulli, "New Models for Optical MEMS," Photonics East, Boston, MA, November 5-8, 2000.

22. T.P. Kurzweg, S.P. Levitan, J.A. Martinez, P.J. Marchand, D.M. Chiarulli, “Modeling and Simulating Optical MEM Switches,” Optical MEMs, Kauai, HI, 21-24 August 2000.

23. S.P. Levitan, T.P. Kurzweg, J.A. Martinez, P.J. Marchand, D.M. Chiarulli, “Simulations for Free-Space Interconnects,” Integrated Photonics Research (IPR2000), Quebec City, CA, July 12-15, 2000.

24. S.P. Levitan, J.A. Martinez, T.P. Kurzweg, P.J. Marchand, D.M. Chiarulli, “Modeling and Simulation of Optical MEMS for Free Space Switching,” Progress In Electromagnetics Research Symposium (PIERS2000), Cambridge, MA, July 5-14, 2000.

25. Jose A. Martinez, “Piecewise Linear Simulation of Optoelectronic Devices with Application to MEMS,” M.S. Electrical Engineering, June 2000.

26. T.P. Kurzweg, S.P. Levitan, J.A. Martinez, P.J. Marchand, D.M. Chiarulli, “Diffractive Optical Propagation Techniques for a Mixed-Signal CAD Tool,” Optics in Computing (OC2000), Quebec City, CA, June 18-23, 2000.

27. S.P. Levitan, J.A. Martinez, T.P. Kurzweg, P.J. Marchand, D.M. Chiarulli, “Mixed-Technology System-Level Simulation,” Design, Test, Integration, and Packaging of MEMS/MOEMS, Paris, France, May 9 - 11, 2000.

28. T.P. Kurzweg, S.P. Levitan, J.A. Martinez, P.J. Marchand, M.T. Shomsky, D.M. Chiarulli, “Optical Propagation Methodologies for Optical MEM Systems,” Third International Conference on Modeling and Simulation of Microsystems, Semiconductors, Sensors and Actuators (MSM00), San Diego, CA, March 27-29, 2000.

- 2 -


29. S.P. Levitan, J.A. Martinez, T.P. Kurzweg, M.T. Shomsky, P.J. Marchand, D.M. Chiarulli, “Modeling and Simulation of Mixed Technology Micro Systems,” Southwest Symposium on Mixed-Signal Design (SSMSD2000), San Diego, CA, 27-29 February, 2000.

30. S.P. Levitan, J.A. Martinez, T.P. Kurzweg, E.N. Reiss, P.J. Marchand, D.M. Chiarulli, “Computer Aided Design for Free Space Optical Interconnected Systems,” IEEE Lasers and Electro-Optics (LEOS'99), San Francisco, CA., November 8-11, 1999.

31. J.A. Martinez, S.P. Levitan, T.P Kurzweg, E.N. Reiss, M.T. Shomsky, P.J. Marchand, D.M. Chiarulli, “Modeling Free Space Optoelectronic Interconnects,” IEEE Conference on Parallel Interconnects (PI'99), Anchorage, Alaska, October 17-19, 1999.

32. T.P. Kurzweg, S.P. Levitan, P.J. Marchand, J.A. Martinez, K.R. Prough, D.M. Chiarulli, “A CAD Tool for Optical MEMS,” Proceedings of the 36th IEEE/ACM Design Automation Conference (DAC99), New Orleans, LA, June 20-25, 1999.

33. T.P. Kurzweg, S.P. Levitan, P.J. Marchand, K.R. Prough, D.M. Chiarulli, “CAD for Opto-electronic Microsystems,” Second International Conference on Modeling and Simulation of Microsystems, Semiconductors, Sensors and Actuators (MSM99), San Juan, Puerto Rico, April 19-21, 1999.

34. T.P. Kurzweg, S.P. Levitan, P.J. Marchand, K.R. Prough, D.M. Chiarulli, “Extensions to the Chatoyant O/E CAD Framework for Modeling Micro-Opto-Electronic Systems,” OSA Optics in Computing Spring Topical Meeting (OC99), Aspen, CO, April 12-17, 1999.

35. J.A. Martinez, S.P. Levitan, D.M. Chiarulli, “Piecewise Linear Large Signal Models for Optoelectronic Devices”, OSA Optics in Computing Spring Topical Meeting (OC99), Aspen, CO, April 12-17, 1999.

36. T.P. Kurzweg, S.P. Levitan, P.J. Marchand, J.A. Martinez, D.M. Chiarulli, “Modeling and Simulating Optical MEMS using Chatoyant”, Design, Test, and Microfabrication of MEMS/MOEMS, Paris, France, March 30 - April 1, 1999.

37. P. Marchand, S. Esener, V. Ozguz, J. Carson, Y. Liu, M. Hibbs-Brenner, and S. Levitan, “3D Optoelectronic Stacked Processors,” Diffractive/Holographic Technologies and Spatial Light Modulators, Optoelectronics '99, Photonics West, San Jose, CA, 23-29 January 1999.

38. S.P. Levitan, T.P. Kurzweg, P.J. Marchand, M.A. Rempel, D.M. Chiarulli, J.A. Martinez, J.M. Bridgen, C. Fan, F.B. McCormick, “Chatoyant: a computer-aided-design tool for free-space optoelectronic systems,” Applied Optics, Vol. 37, No. 26, September 10, 1998, pp. 6078-6092.

39. Timothy P. Kurzweg, “A CAD System for Simulating Free Space Opto-Electronic Systems,” M.S. Electrical Engineering, December 1997.

40. S.P Levitan, P.J. Marchand, T.P. Kurzweg, M.A. Rempel, D.M. Chiarulli, C. Fan, F.B McCormick, “Computer Aided Design of Free Space Opto-Electronic Systems,” Best Paper Award, Proceedings of the 34th IEEE/ACM Design Automation Conference (DAC97), Anaheim, CA, June 9-13, 1997.

41. S.P. Levitan, T.P. Kurzweg, D.M. Chiarulli, P.J. Marchand, C. Fan, F.B. McCormick, “Chatoyant: a Computer Aided Design Tool for Free Space Optoelectronic Information Processing Systems,” OSA Optics in Computing Spring Topical Meeting (OC97), 1997.

42. S.P. Levitan, T.P. Kurzweg, D.M. Chiarulli, P.J. Marchand, C. Fan, F.B. McCormick, “Modeling Free Space Optoelectronic Interconnection Systems,” IEEE/LEOS 8th Annual Workshop on Interconnections within High-Speed Digital Systems, 1997.

43. S.P. Levitan, P.J. Marchand, M. Rempel, D.M. Chiarulli, F.B. McCormick, “Computer-Aided Design of Free-Space Optoelectronic Interconnection (FSOI) Systems,” Second International IEEE Workshop on Massively Parallel Processing Using Optical Interconnections (MPPOI’95), pp. 239-245, San Antonio, TX, Oct. 23-24, 1995.

References Cited:

- 3 -


1. Donald M. Chiarulli, Steven P. Levitan, Paige Derr, Robert Hofmann, Bryan Greiner, Matt Robinson, “Demonstration of a Multichannel Optical Interconnection by use of Imaging Fiber Bundles Butt Coupled to Optoelectronic Circuits,” Applied Optics-IP, Vol. 39 Issue 5 Page 698 (February 2000).

2. Leo Selavo, Steven P. Levitan and Donald M. Chiarulli, “An Optically Reconfigurable Field Programmable Gate Array,” in Optics in Computing, OSA Technical Digest (Optical Society of America, Washington DC, 1999), pp. 146-148.

3. Donald M. Chiarulli, Steven P. Levitan, Paige Derr, Raju Menon, and N. Wattanapongsakorn, “Multichannel Optical Interconnections using Imaging Fiber Bundles,” in Optics in Computing, OSA Technical Digest (Optical Society of America, Washington DC, 1999), pp. 112-114.

4. Chiarulli, D.M.; Levitan, S.P.; Robinson, M.; Tatah, K., “Optoelectronic multi-chip modules based on imaging fiber bundle structures,” Lasers and Electro-Optics Society 2000 Annual Meeting. LEOS 2000. 13th Annual Meeting. IEEE , Volume: 2 , 2000 Page(s): 423 vol.2.

5. Donald M. Chiarulli, Steven P. Levitan, Matt Robinson, and Karim Tatah, “Optoelectronic Multi-Chip Modules Based on Imaging Fiber Bundle Structures,” in Optics in Computing, OSA Technical Digest (Optical Society of America, Washington DC, 2001), pp. 125-127.

6. Donald M. Chiarulli, Steven P. Levitan, Matt Robinson, “Optoelectronic Multi-Chip Modules Based on Imaging Fiber Bundle Structures,” in Optics in Computing 2000, Roger A. Lessard, Tigran Galstian, Editors, SPIE Vol. 4089, page numbers (2000) 80-85.

7. “Chip-To-Chip Multipoint Optoelectronic Interconnections,” D. M. Chiarulli, S.P. Levitan, OSA Optics in Computing (OC 2003), Washington, DC, OThD4, June 18-20, 2003.

8. J. Bakos, D. Chiarulli, S. Levitan, “Optoelectronic Multi-Chip Module Demonstration System,” OSA Optics in Computing (OC 2003), OThD6, Washington, DC, June 18-20, 2003.

9. D. Chiarulli, S. Levitan, J. Bakos, “Optoelectronic Multi-Chip Modules,” 10thInternational Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2003) Łódź, Poland, 26-28 June 2003

10. Donald Chiarulli, Steven Levitan, Jason Bakos, Charlie Kuznia, “Active Substrates For Optoelectronic Interconnect,” 3385 Session:INV-13: Heterogeneous Systems, IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 23-26, 2004.

11. Donald Chiarulli, Jason Bakos, Leo Selavo, Steven Levitan, John Hansson, Michael Weissner, “Photonic Packaging for Mixed-Technology Sensor Systems,” Optics in Computing (OC 2004), Engelberg, Switzerland, April 21-23, 2004.

Web References:[] http://kona.ee.pitt.edu/pittcad[] http://www.engr.pitt.edu/SITE/SCMNS/home/connect/labs_swanson_mems.html

Additional References Cited44. Haney, M.W.; Christensen, M.P.; Milojkovic, P.; Fokken, G.J.; Vickberg, M.; Gilbert, B.K.;

Rieve, J.; Ekman, J.;Chandramani, P.; Kiamilev, F, Description and evaluation of the FAST-Net smart pixel-based optical interconnection prototype. Proceedings of the IEEE, Volume: 88 Issue: 6 , June 2000, Page(s): 819 –828 (Corrections published in the Proceedings of the IEEE , Volume: 88 Issue: 8 , Aug. 2000 , Page(s): 1373 -1374 )

45. J. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, “Ptolemy: A framework for simulating and prototyping heterogeneous systems,” Int. J. Computer Simulation, Vol. 4, 1994, pp. 155-182.

46. D. L. Karnoop, and R. C. Rosenberg, System dynamics: a unified approach, John Wiley & Sons Inc., 1975.

47. P. S. Mara, Triangulations for the cube, J. Combin. Theory Ser., A 20, 1976, pp. 170-177.48. W. D. Smith, A lower bound for the simplexity of the N-cube via hyperbolic volumes, Europ. J.

Combin., 21, 2000, pp. 131-137.49. A. S. Sedra, and K. C. Smith, Microelectronic Circuits, Fourth Edition, Oxford University Press,

New York, 1998.

- 4 -

http://www.engr.pitt.edu/SITE/SCMNS/home/connect/labs_swanson_mems.html


50. P. Feldmann, and R. W. Freund, “Efficient linear circuit analysis by Padé approximation via the Lanczos process,” IEEE Trans. Computer-Aided Design, vol. 14, May. 1995, pp. 639-649.

51. J. S. Przemieniecki, Theory of Matrix Structural Analysis, McGraw-Hill, New York, New York, 1968.

52. W. J. Duncan, Reciprocation of Triply Partitioned Matrices, J. Roy. Aeron. Soc., vol. 60, 1956, pp. 131-132.

53. D. M. Bloom, “The Grating Light Valve: Revolutionizing Display Technology,” in Proc. of SPIE, Vol. 3013, 1998, pp. 165-171.

- 5 -

Documents

lost-contact.mit.edu · Web viewThe University of Pittsburgh Office of Grants and Contracts 350 Thackeray Hall University of Pittsburgh Pittsburgh, PA 15260 PROPOSAL FOR RESEARCH