LOGIC GATES

Ho Kyung Kim, Ph.D.hokyung@pusan.ac.kr

School of Mechanical EngineeringPusan National University

Basic Experiment and Design of Electronics

Outline

• Boolean algebra

• Logic gates

• Karnaugh maps

• Combinational logic circuits

2

• Analog signal– An electric signal whose value varies in analogy with a physical quantity (e.g., temp., force, or

acceleration)– Sensitive to noise

• Digital signal– Immune to noise

Analog and digital signals

Binary signal

• Characterized by transitions between two states ( / , on/off, 5 V/0 V …)• Knowledge of the transition between one state to another is equivalent to knowledge of

the state Digital logic circuits can operate by detecting transitions (edges) between voltage levels

4

Binary number system

MSB

LSB

LSB

MSB

• bits = binary digits– LSB (least significant bit), MSB (most significant bit)– 8 bits = 1 byte– 16 bits = 2 bytes = 1 word

• 3.25 3 10 2 10 5 10

• 10.011 1 2 0 2 0 2 1 2 1 2 2 0 0 2.375

• 3.25 ?• 28.375 ?

Addition Subtraction

Multiplication Division

• Negative binary numbers– +5 0101, -5 1101– 2 1 2 1 for -bit signed integer words– instead of in digital computers

• Complements– Ones complement

• 0101 ones complement of = 2 1 1010– Twos complement (= ones complement + 1)

• 0101 ones complement of =2 1011 (= 1010 + 1)

• Hexadecimal system– 0, 1, 2, … , 9, A (= 10), B (= 11), C (= 12), D (= 13), E (= 14), F (= 15)– B5F 11 16 5 16 15 16 2611

• Binary codes– BCD (binary-coded decimal)

• 139 → 000100111001• e.g., hand calculator

– Gray codes• Any consecutive numbers differ only by 1 bit• Effective in encoding mechanical angular position

BCD code Gray code

Encoders

• Mathematics associated with the binary number system (and with the more general field of logic)

• Logical algebra• Positive logic

– Logic 1 = true, logic 0 = false

• Negative logic– Logic 1 = false, logic 0 = true

• Analysis of logic functions, that is, functions of logical (Boolean) variables, can be carried out in terms of truth tables

• Logic gates– Physical devices that can be used to implement logic functions

Boolean algebra

Logic gates: OR, AND, NOT

Logical addition Logical multiplication Logical complement

VCC

VCERB

RC

VBB

A

B

F

+VCC

Input

OutputA

B

FInput

Output

• Ex) Realize the following statement with the logic gates:– The output shall be logic 1 only when the condition ( = 1 AND = 1) OR ( = 1) occurs, and

shall be logic 0 otherwise

• Ex) Realize the following statement with the logic gates:– The output shall be logic 1 only when the condition ( = 0 AND = 1) OR ( = 1) occurs, and

shall be logic 0 otherwise The output shall be logic 1 only when the condition ( = 1 AND = 1) OR ( = 1) occurs, and

shall be logic 0 otherwise

Rules of Boolean algebra

Proof of rule 16 by perfect induction (truth table)

0 · 1 0 ⟺ 1 0 1 (duality)

From 2: · 1 1 From 17: · · · ·

• De Morgan’s theorems– ·– ·– Any logic gates can be implemented by using only OR and NOT gates, or only AND and NOT

gates

• Ex) Simplify the following functions– , , , · · · · · · · ·

• Ex) Realize the logic function described by the truth table below

00001111

00110011

01010101

01011111

• NAND = NOT AND• NOR = NOT OR

Logic gates: NAND, NOR, XOR

Just regard this “bubble” as the “NOT” gate

• AND function with NAND gates

0011

0101

1110

0001

• Realization of various logic gates with only NAND gates

Inverter

AND

OR

NOR

• AND function with NOR gates– ·

• Realization of various logic gates with only NOR gates

Inverter

AND

OR

NOR

• XOR (exclusive OR) gate– When its inputs are all logic 1’s, the output is exclusively a logic 0; otherwise, identical to the OR

gate

– ⨁ · ·

Summary

게이트 이름 회로기호 논리식 진리표

AND

x y

0 0

0 1

1 0

1 1

F

0

0

0

1

F = xy

F = x+y

x y

0 0

0 1

1 0

1 1

F

0

1

1

1

x

0

1

F

1

0

F = x'

x

yF

x

yF

F

F

x

x

OR

NOT또는

inverter

buffer

x

0

1

F

0

1

F = x

비고

입력이 모두 1일때 출력이 1

입력중 하나라도 1이면 출력이 1

입력이 반전되어 출력

입력이 그대로 출력

x

yF

x

y

x

y

x

y

F

F

F

XNOR(exclusive-NOR)

또는equivalence

NAND

NOR

XOR(exclusive-OR)

x y

0 0

0 1

1 0

1 1

F

1

1

1

0

F = (xy)'

F = (x+y)'

x y

0 0

0 1

1 0

1 1

F

1

0

0

0

x y

0 0

0 1

1 0

1 1

F

0

1

1

0

x y

0 0

0 1

1 0

1 1

F

1

0

0

1

입력이 모두 1일때에만 출력이 0

입력이 모두 0일때에만 출력이 1

입력에 1이 홀수개일때 출력이 1

입력에 0이 짝수개일때 출력이 1

F = (x y)'F = x'y'+xy

F = x yF = x'y + xy'

게이트 이름 회로기호 논리식 진리표 비고

• Sum-of-products expression

Standard forms

• Product-of-sums expression

• Any logical expression can be reduced to one of these two forms!

• Sum-of-products– OR of minterms–

• Products-of-sums– AND of maxterms–

Minterm Maxterm

00001111

00110011

01010101

10100110

Karnaugh maps and logic designs

• Karnaugh map– Describing all possible combinations of the

variables present in the logic function of interest

– Arranging variables in a 1-bit change between adjacent terms

– 2 cells– Minterm in each cell

• AND-combination of the variables in either uncomplemented or complemented form

• Product of the variables appearing at the corresponding vertical and horizontal coordinates

– Define a subcube with logical value• 1 cell• 2 cells = pair• 4 cells = quad• 8 cells = octet

• 1 cell– · · · · · · · · · · · · · · · · · · + · · ·

• 2 cells– · · · · · · · · · · · · + · · ·

• 4 cells– · · ·

• 8 cells–

• Ex) Simplify the following logic circuit

X

Y

ZF

Y

FXZ

00 01 11 10

0 1 0 0 1

1 1 1 1 1

YZX

+

• Ex) Design a logic circuit that implements the following truth table

– · · · · ·

Sum-of-products realizations

• Ex) Derive the truth table and minimum sum-of-products expression for the following circuit

– · ·

1. Solve for the 0’s exactly as for the 1’s in sum-of-products expressions2. Complement the resulting expression

Product-of-sums realization

• Product-of-sums– · · · · · · ·– ·

• Sum-of-products– · · ·

• Use the don’t care entry with whenever it does not matter whether a position in the K-map is filled by a 1 or a 0

• Then, can be used as either a 1 or a 0, depending on which results in a greater simplification (i.e., helps in forming the smallest number of maximal subcubes)

Don’t care conditions

• If =1 in the right truth table;– · · · ·

Digital IC packages

• TTL (transistor-transistor logic)– High-power consumption, fast– 74 series

• CMOS (complementary metal-oxide-semiconductor)– Low-power consumption, slow– Weak to static– 40 series

36

1 2 3 4 5 6 7

814 13 12 11 10 9

1Y 2A1A 1B

Vcc 4Y 3B4B

2B GND

3A4A

2Y

3Y

DIP (dual-in-line) package Flat-type Surface-mount package

7400

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제조회사SN : Texas Instrument

MC : MotorolaDM : National Semiconductor

IM : IntersilN : Signetics

MM : Monolithic MemoriesP : Intel

H : HarriesF : Fairchild

AM : Advanced Micro DevicesCD : RCA

HD : HitachDN/MN : Mitsubishi

MB : FujitsuTC : ToshibaHY : Hyundai

GD : GoldStarK- : Samsung

회로타입S : high speed SchottkyL : Low powerLS : Low power SchottkyH : High speed},F : FastHC : High speed CMOS(CMOS compatible)HCT : High speed CMOS TTL(LSTTL compatible)AC : AdvancedAS : Advanced SchottkyALS : Advanced Low power Schottky

기능에 따른 고유번호

패키지 외형N : Plastic DIPJ : Ceramic DIPW : Flat Pack

시리즈명74 : TTL40 : CMOS