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Linearization of an NTC Thermistor By: Mohamed Abdelrahim

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Page 1: Linearization of an NTC Thermistor - Mo's Portfoliomosportfolio.com/docs/instrumentation-ntc-thermistor.pdf · @ 50oC = 7.278 (kΩ) 1% difference from datasheet value Comparing the

Linearization of an NTC Thermistor

By: Mohamed Abdelrahim

Page 2: Linearization of an NTC Thermistor - Mo's Portfoliomosportfolio.com/docs/instrumentation-ntc-thermistor.pdf · @ 50oC = 7.278 (kΩ) 1% difference from datasheet value Comparing the

Objective:

The goal of this experiment was to design a circuit which provides a linear temperature-to-

voltage characteristic based on an NTC thermistor. This involved three phases:

a) PSpice characterization of an NTC thermistor b) Linearizing the transfer function c) Design & simulation of the appropriate signal conditioning

The 3 were divided into 13 design tasks.

Design Tasks:

Design Task #1: The first step in the design process was to determine the R-T characteristics of the PS203J2

thermistor. To do this, the device data sheet was retrieved from the US Sensor Corporation web

site. From this datasheet, the appropriate values of R0 and β for this device along with its

power dissipation factor, δ were noted. Moreover, from the table of the R-T characteristics

given on the site, the values of resistance for a temperature range of 5 oC to 60 C in 5 oC

intervals were noted. These values can be found on Table 1 bellow. R0 = 20 (kΩ) β (0 to +50oC) = 3890 (K) δ = 1 (mW/oC)

Temperature (oC) Resistance (Ω)

0 65,300.00

5 50,784.38 10 39,801.08 15 31,423.76

20 24,985.06 25 20,000.00

30 16,113.22 35 13,062.34

40 10,652.08 45 8,736.12 50 7,204.00 55 5,971.82

60 4,975.38

Table 1: (PT203J2) Resistance vs. Temperature Table for 5 to 60 oC

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Design Task #2:

PSpice was used to determine the R-T characteristics of the PS203J2 thermistor over a 0°C to

150°C temperature range. The thermistor was driven with a constant current source and the

voltage was measured across the thermistor while performing a DC sweep of the temperature

parameter, Temperature.

Then, using the cursor function, the values of RT were determined for the limits of the desired

operating range of 20°C to 50°C, as well as the mid-range value. RT @ 20oC = 24.983 (kΩ) 0.008% difference from datasheet value RT @ 35oC = 13.057 (kΩ) 0.04% difference from datasheet value RT @ 50oC = 7.278 (kΩ) 1% difference from datasheet value Comparing the resistance values obtained from the PSpice simulation to those obtained from

the data sheet, we can see that the value difference between the two increases with increasing

temperature, although the difference remained relatively small.

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Design Task #3: The RT and T data points were exported from PSpice into MATLAB. The values of the

thermistor resistance over the temperature range of 0°C - 60°C were then compared in 5 °C

increments to that of the table obtained from the manufacturer in “Design Task #1”

Temperature (oC) (RT)Table (Ω) (RT)PSpice (Ω) Relative Error (%)

0 65,300.00 66,138 1.2748

5 50,784.38 51,179 0.7741

10 39,801.08 39,964 0.4086

15 31,423.76 31,476 0.1654

20 24,985.06 2,4993 0.0328

25 20,000.00 20,000 0

30 16,113.22 16,122 0.0574

35 13,062.34 13,088 0.1960

40 10,652.08 10,696 0.4079

45 8,736.12 8,796 0.6857

50 7,204.00 7,278 1.0229

55 5,971.82 6,057 1.4131

60 4,975.38 5,068 1.8515

Table 2: Comparison of RT obtained from Data Sheet and PSpice

The relative error (%) variation is plotted bellow over a 0°C-60°C range of temperature.

Figure (1)

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Design Task #4: Using the mathematical display functions of PSpice, a graph showing the sensitivity

(dR/dT) of the thermistor over a temperature range of 0 to 80°C was plotted. From this

graph, the sensitivities at temperatures of 20°C, 35°C and 50°C were determined. The

magnitude of the fractional sensitivity in units of ppm/°C, was then compared for these

three temperatures, to that of a typical platinum RTD sensor.

To convert the fractional sensitivity from (Ω/oC) to (ppm/oC) we must divide the fractional

sensitivity by the resistance of the thermistor at the specified temperatures (found in task 2),

then multiplying by 106.

ppm/ᵒC = (dR/dT) ∙ (1/R) ∙ 106

Temperature (oC) dR/dT (Ω/oC) dR/dT (ppm/oC)

20 -1147.600 -45935.24

35 -542.686 -41562.76

50 -273.942 -37639.74

Table 3: Sensitivity of NTC Thermistor at Different Temperatures

For a platinum RTD, the fractional sensitivity in (ppm/oC) is equal to its temperature

coefficient of resistance, α multiplied by 106. The standard platinum RTD value for α is 0.00395

(Ω/oC) = 3850 (ppm/oC). The difference between this value and the values obtained from the

thermistor is quite large.

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Design Task #5:

From the values of RT obtained in Design Task #2, the optimum compensation resistor,

ROPT could be determined. The value of ROPT can be found using the following equation:

𝑅𝑂𝑃𝑇 =𝑅𝑇𝑚𝑖𝑑(𝑅𝑇𝑚𝑎𝑥 + 𝑅𝑇𝑚𝑖𝑛) − 2 × 𝑅𝑇𝑚𝑎𝑥 × 𝑅𝑇𝑚𝑖𝑛

𝑅𝑇𝑚𝑖𝑛 + 𝑅𝑇𝑚𝑎𝑥 − 2 × 𝑅𝑇𝑚𝑖𝑑

Where 𝑅𝑇𝑚𝑎𝑥 = 7.278 (𝑘Ω), 𝑅𝑇𝑚𝑖𝑑 = 13.057 (𝑘Ω), and 𝑅𝑇𝑚𝑖𝑛 = 24.983 (𝑘Ω) as found in “Design

Task #2”

∴ 𝑅𝑂𝑃𝑇 =13.057(7.278 + 24.983) − 2 × 7.278 × 24.983

24.983 + 7.278 − 2 × 13.057= 9.36 (𝑘Ω)

The nearest E96 resistor value is 9.31 (kΩ).

[2]

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Design Task #6:

The data from the plot of the R-T characteristics of the compensated thermistor over the desired

temperature range of 20°C to 50°C was exported to MATLAB. A linear regression was then fit

to this data and a value was derived for the best-fit linear sensitivity (dR/dT) of this thermistor-

resistor pair.

Linear sensitivity dR/dT = slope = -90.568 (Ω/oC)

This value is much smaller than the values obtained in “Design Task #4”. This is an expected

result of linearization. Linearization of thermistors introduces a trade-off between sensitivity

and linearity.

Figure (2)

Page 8: Linearization of an NTC Thermistor - Mo's Portfoliomosportfolio.com/docs/instrumentation-ntc-thermistor.pdf · @ 50oC = 7.278 (kΩ) 1% difference from datasheet value Comparing the

Design Task #7:

The equivalency between the two circuits illustrated in Figure (3) will be shown below.

Parallel circuit: 𝑉𝑜 = 𝐼(𝑅𝑇𝑅𝑃

𝑅𝑇+𝑅𝑃)

Series circuit: 𝐼 = 𝑉𝑜(𝑅𝑇

𝑅𝑇+𝑅𝑃)

Multiplying the series circuit equation by 𝑅𝑃

𝑅𝑃 gives:

𝑉𝑜 = 𝑉 (𝑅𝑇

𝑅𝑇 + 𝑅𝑃) ×

𝑅𝑃

𝑅𝑃=

𝑉

𝑅𝑃× (

𝑅𝑇𝑅𝑃

𝑅𝑇 + 𝑅𝑃)

This shows that the parallel and series circuits are equivalent. The output voltage is a function

of temperature.

In both circuits, the output voltage decreases with increasing temperature, therefore the

polarity is negative.

[3]

[4]

[5]

Figure (3)

Page 9: Linearization of an NTC Thermistor - Mo's Portfoliomosportfolio.com/docs/instrumentation-ntc-thermistor.pdf · @ 50oC = 7.278 (kΩ) 1% difference from datasheet value Comparing the

Design Task #8:

The series circuit was modified to produce an output that gives a positive sensitivity. This was

done using a bandgap voltage reference (similar in operation to a zener diode regulator), LM4040,

that provides a constant 2.048V reference from the 5V power supply. The modified PSpice

schematic can be found on the following page. (Not available in this electronic document

because it was printed straight from PSpice and attached to the physical report).

The value of R1 was determined as follows:

KCL gives: 𝑖1 = 𝑖𝑧 + 𝑖𝑇

According to the LM4040 datasheet, the minimum value of 𝑖𝑧 for regulation is 60 (μA). Since RT

changes with temperature, we need to determine the maximum value of 𝑖1 that will allow the

LM4040 diode to be supplied by this current when the resistance of the thermistor is at

minimum.

The resistance of the Thermistor is minimum when the temperature is maximum (50 ˚C)

𝑅𝑇𝑚𝑎𝑥 = 7.278 (𝑘Ω)

Hence: 𝑖𝑇𝑚𝑎𝑥 =𝑉𝐿𝑀4040

𝑅𝑇𝑚𝑎𝑥+𝑅𝑂𝑃𝑇=

2.048

7.278𝑘+9.31𝑘 = 176.7 (µA)

And the total current 𝑖1 = 𝑖𝑧 + 𝑖𝑇 = 60 (μA)+ 176.7 (μA) = 236.7 (μA)

Now we can use this value to determine the required resistor value for 𝑅1

𝑅1 =𝑉𝑖𝑛 − 𝑉𝐿𝑀404

𝐼1=

5 − 2.048

236.7 × 10−6= 12.46 (𝑘Ω) = 12.4 (𝑘Ω) 𝐸96

[6]

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Design Task #9:

The design was then verified through PSpice using a fixed DC voltage source to represent the

LM4040. The temperature sweep was limited to the range given in the specifications, with a

step size of 1 oC.

In the same way as in Design Task #6, a linear regression was fit to the data by exporting the

data to MATLAB. The best fit equation derived by MATLAB is available on the above graph.

dV/dT = slope = 0.02 = 20 (mV/oC)

Figure (4)

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Design Task #10:

The voltage gain required to give the desired 40mV/°C sensitivity is:

𝐴𝑑 =40

20= 2 (𝑉/𝑉)

Using this gain value, we can determine the range of the output voltage for the full

operating temperature range, if no offset subtraction is implemented.

From the above graph we can see that the output voltage ranges from 1.103V to 2.304V with

no offset subtraction.

If the LM4040 is also going to be used to supply the reference voltage to the ADC in the

system, it is impractical to use software offset compensation if LM4040 was use because the

maximum output voltage at 50oC surpasses its reference voltage.

Figure (5)

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Design Task #11:

Using standard 1% value resistors, a potential divider was designed using the LM4040 as the reference voltage in order to produce the required compensation voltage, VCOMP.

𝑉𝐶𝑂𝑀𝑃 = 𝑉𝐿𝑀4040(𝑅2

𝑅2 + 𝑅1)

From “Design Task #9”, the value of VCOMP was determined to be 0.15145V (Y-intercept).

0.15145 = 𝑉𝐿𝑀4040(𝑅2

𝑅2 + 𝑅1)

Solving for R1 gives:

𝑅1 = 12.52𝑅2

If we choose R2 to be 11 (kΩ) E96, then R1 will be 137.7 (kΩ) or 137 (kΩ) E96

The required resistor, RG, needed to give an overall sensitivity of 40mV/°C at the output of

the MAX4194 can be found as follows:

𝐴𝑑 = 1 +50𝑘Ω

𝑅𝐺

Solving for 𝑅𝐺 gives:

𝑅𝐺 =50𝑘Ω

𝐴𝑑 − 1

Ad was found in Design Task #10 to be 2 (V/V).

∴ RG = 50 (kΩ) = 49.9 (kΩ) E96

A bipolar (±2.5V) supply was used for the MAX4194 and ground the reference terminal, REF. A

100 kΩ load resistor was added to the output to simulate the input impedance of the next stage

and a bias point analysis was conducted

From V-T plot acquired using the modified circuit: dV/dT = slope = 40.055 (mV/oC)

𝐴𝑑 =40

40.055= 0.9986 ≅ 1

[7]

[8]

[9]

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Design Task #12:

The V-T characteristics of the complete signal conditioning circuitry over the desired

operating range of 20°C to 50°C was plotted. Using the cursor feature of PSpice,

temperature values at output voltages of 0.9, 1.4 and 1.9 volts were then extracted. These

values can be found on Table (4) below.

Vo (V) TPSpice (oC) Ttrue (oC)

0.9 22.456 22.5

1.4 35.011 35

1.9 47.474 47.5

We can see that the temperatures produced by PSpice are quite close to the true ones.

Moreover, since the required accuracy of ±0.2 has been met, no additional resistor

modifications are need

Table (4)

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Design Task #13:

The variation of output voltage with temperature over the specified temperature range of

20°C to 50°C were then simulated and plotted. The data obtained from the PSpice

simulation was then exported to MATLAB. Again, a linear regression analysis was done on

the data.

The regression equation created by MATLAB is Vo = 0.040055*T + 0.0014901

The ideal calibration equation is Vo = 0.04*T. We can see that both equations are quite close

with a difference of 0.29%.

Figure (6)

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Below is a plot of the error versus temperature, based on the designed sensitivity.

It can be clearly seen from the error graph above that the desired accuracy of ±0.2 (oC) has

been well achieved with a maximum error of ~0.004 (oC).

Figure (7)

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Additional Questions: 1. At what temperatures does this circuit produce minimal errors? Can you explain why?

From the above MATLAB generated plot, we can see that the minimal errors occur at

temperatures of 23.3, 35.5 and 48.2 (˚C).

2. What is the maximum power dissipation, PD(max) , that the thermistor used in this design will encounter? At what value of RT will this occur? Estimate the associated self-heating error. The power dissipation can be found using the following equation:

𝑃𝐷 = 𝑖𝑇2 × 𝑅𝑇 = (

𝑉𝑅𝐸𝐹

𝑅𝑇 + 𝑅𝑂𝑃𝑇)2 × 𝑅𝑇

The maximum power dissipation will occur when the current is maximum. This will occur at

the maximum temperature of 50 (oC), with 𝑅𝑇 = 𝑅𝑇𝑚𝑎𝑥 = 7.278 (kΩ).

∴ 𝑃𝐷𝑚𝑎𝑥 = (2.048

7.278𝑘 + 9.31𝑘)2 × 7.278𝑘 = 0.11(𝑚𝑊)

Figure (8)

[10]

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Self-heating error = 𝑃𝐷𝑚𝑎𝑥÷δ = 0.11mW÷1mW/ᵒC = 0.11 (ᵒC).

3. Apart from the self-heating error, what other major aspect of the design has not been

considered in this exercise that will impact on the overall accuracy of the measurement?

A major aspect of the design that was not considered is resistance tolerance. As seen from

laboratory 1, resistance tolerance can have a major impact on the accuracy of an instrumentation

design.

Conclusion:

This laboratory experiment explored the design steps of linearizing an NTC thermistor.

Linearizing a thermistor creates a trade of between linearity and sensitivity making it only

suitable for applications with a very narrow temperature range. On the other hand, a Platinum

RTD has a much wider operation range, however with sensitivity that is 10 times less than a

linearized Thermistor.

Moreover, this laboratory was a good exercise in demonstrating the op-amp usages introduced

in lectures.