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MOS Transistors Yannis Tsividis Small-Signal Modeling - Source-Drain and Output Conductances Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 1 These slides are based on Y. Tsividis and C. McAndrew, “Operation and Modeling of the MOS Transistor”, Copyright © Oxford University Press, 2011. They are meant to be part of a lecture, and may be incomplete or may not even make sense without the accompanying narration.

Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

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Page 1: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

MOS Transistors Yannis Tsividis

Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 1

These slides are based on Y. Tsividis and C. McAndrew, “Operation and Modeling of the MOS Transistor”, Copyright © Oxford University Press, 2011. They are meant to be part of a lecture, and may be incomplete or may not even make sense without the accompanying narration.

Page 2: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011

Source-drain conductance

In saturation, we have a major problem:

2

In non-saturation: 𝑔𝑠𝑑 =𝜕𝐼𝐷𝑆𝜕𝑉𝐷𝑆

=𝑊

𝐿𝜇𝐶′𝑜𝑥(𝑉𝐺𝑆 - 𝑉𝑇 -𝛼𝑉𝐷𝑆)

𝑔𝑠𝑑 =𝜕𝐼𝐷𝑆𝜕𝑉𝐷𝑆

0 𝑉𝐷𝑆

𝑔𝑠𝑑

Error: > 50%

𝐼𝐷𝑆

0 𝑉𝐷𝑆

Error: < 1%

Page 3: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011

1. Channel length modulation

Simplest model:

𝐼𝐷𝑆 = 𝐼𝐷𝑆′ 1 +

𝑉𝐷𝑆 − 𝑉𝐷𝑆′

𝑉𝐴

𝑔𝑠𝑑 =𝜕𝐼𝐷𝑆𝜕𝑉𝐷𝑆

=𝐼𝐷𝑆′

𝑉𝐴 can be very inaccurate.

3

𝐼𝐷𝑆

𝑉𝐷𝑆

𝐼𝐷𝑆′

0 𝑉𝐷𝑆′

Page 4: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011

Channel length modulation, cont’d:

𝐼𝐷𝑆 =𝐼𝐷𝑆′

1 −𝑙𝑝𝐿

(saturation)

𝑔𝑠𝑑 =𝜕𝐼𝐷𝑆𝜕𝑉𝐷𝑆

=𝜕𝐼𝐷𝑆𝜕𝑙𝑝

𝜕𝑙𝑝

𝜕𝑉𝐷𝑆≈ 𝐼𝐷𝑆

′1

𝐿

𝜕𝑙𝑝

𝜕𝑉𝐷𝑆

E.g. with 𝑙𝑝 = 𝑙𝑎ln 1 +𝑉𝐷𝑆 − 𝑉𝐷𝑆

𝑉𝐸

𝑔𝑠𝑑 =𝐼𝐷𝑆′

𝐿𝑙𝑎

𝑉𝐸 + 𝑉𝐷𝑆 − 𝑉𝐷𝑆′

=𝐼𝐷𝑆′

𝑉𝐴 𝑉𝐷𝑆

4

A more careful analysis:

Page 5: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011

2. DIBL

𝑔𝑠𝑑 =𝜕𝐼𝐷𝑆𝜕𝑉𝐷𝑆

=𝑊

𝐿

𝜇𝐶𝑜𝑥′

𝛼𝑉𝐺𝑆 − 𝑉 𝑇 𝑉𝐷𝑆 −

𝜕𝑉 𝑇𝜕𝑉𝐷𝑆

⇒ 𝑔𝑠𝑑 = 𝑔𝑚(−𝜕𝑉 𝑇𝜕𝑉𝐷𝑆

)

𝑔𝑚

5

𝐼𝐷𝑆 =𝑊

𝐿

𝜇𝐶𝑜𝑥′

2𝛼𝑉𝐺𝑆 − 𝑉 𝑇 𝑉𝐷𝑆

2 (saturation)

For a given DIBL model, use 𝑉 𝑇 𝑉𝐷𝑆 = 𝑉𝑇 + ∆𝑉𝑇,𝐷𝐼𝐵𝐿(𝑉𝐷𝑆) in the above to get 𝑔𝑠𝑑 (see book).

Page 6: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 6

𝑔𝑠𝑑 =𝐼𝐷𝑆′

𝑉𝐴𝑊 , saturation

𝑉𝐴𝑊 can be smaller than the strong inversion 𝑉𝐴

In weak inversion saturation, DIBL can be dominant:

Page 7: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011

Body-drain conductance

𝑔𝑏𝑑 ≡𝜕𝐼𝐵𝜕𝑉𝐵𝐷

7

Can be important in analog circuits in some processes.

g bd2

g bd1

M1

M2

g bd2

M1

M2

g bd2

M1

M2

g bd1

Page 8: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011

Output conductance

𝑔𝑜 =𝜕𝐼𝐷𝜕𝑉𝐷𝑆

=𝜕 𝐼𝐷𝑆 + 𝐼𝐷𝐵 + 𝐼𝐷𝐺

𝜕𝑉𝐷𝑆

= 𝑔𝑠𝑑 + 𝑔𝑏𝑑 + 𝑔𝑔𝑑

8

𝑉𝐷𝑆

𝑉𝐷𝑆

𝐼𝐷

𝑔𝑜 0

0

(logscale)

Non − saturation

CLM and DIBL

Impact ionization

Page 9: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 9

𝐿 = 5 μm

Large variation

𝑔𝑜(S)

𝑉𝐷𝑆(V)

𝐿 = 0.09 μm

𝑔𝑜(S)

𝑉𝐷𝑆(V)

In long channel case, CLM can be made very small, & impact ionization effects are revealed.

Page 10: Lecture_Slides-Small-Signal Modeling - Source-Drain and Output Conductances

Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 10

Effect of extrinsic resistances:

𝑔𝑚,𝑒𝑓𝑓 =𝑔𝑚

1 + 𝑔𝑚𝑅𝑠𝑒

𝑉 𝑆𝐵 = 𝑉𝑆𝐵 − 𝑅𝑏𝑒𝐼𝐷𝐵

𝐼𝐷𝐵 ↑ ⇒ 𝑉 𝑆𝐵 ↓ ⇒ 𝑉 𝑇 ↓ ⇒ 𝐼𝐷𝑆 ↑

𝑔𝑜,𝑒𝑓𝑓 ≈ 𝑔𝑠𝑑 + 𝑔𝑔𝑑 + 𝑔𝑏𝑑 1 + 𝑔𝑚𝑏𝑅𝑏𝑒

𝑅𝑠𝑒 𝑅𝑑𝑒