Chung Yuan Christian University

Electronics Engineering Department

Introduction to VLSI Design and Layout Practice

LABORATORY 1

Mark Anthony Te 9776059 Submitted to: Dr. Wen-Yaw Chung

I. Objectives:

A.) In this lab, you will learn main DC commands to analyze N/PMOS drain characteristics and input gate characteristics. i.e., Id-Vds and Id-Vgs curves.

B.) In this lab, you will see the variation of threshold voltage due to back-gate bias. II. Discussion:

The Metal Oxide Semiconductor Field Effect Transistor (MOSFET) that is commonly used for CMOS IC design will be studied in this lab exercise. MOSFET is a voltage controlled device, which means the current across the transistor is dependent of the voltage applied across the transistor.

The MOS has three operating regions namely: Cutoff, Linear and Saturation

Region. The summary of the response of each region is given below. Simple MOS Large-Signal Model a.) Cutoff region Vgs<VT

0Di b.) Linear Region 0 < VDS < (VGS-VT)

DSDS

TGSPD VV

VVLWki

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c.) Saturation Region 0 < (VGS-VT) < VDS

DSTGSPD VVVLWki 12

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Threshold Voltage, VTH, equation:

FSBFTT VVV 220 III. Assignments Problem 1

(a.) Based on the following SPICE model parameters, to get the Id-Vds curves for specific NMOS with W/L = 10u/2u and PMOS with W/L = 10u/2u using nested DC analysis offered by SPICE

NMOS Model

.model mn nmos (level=1 vto=0.8 kp=80u lambda=0 gamma=0.5)

Schematic for NMOS testing Configuration

SPICE Netlist for NMOS Id-Vgs curve

Vgs=0

Vgs=2

Vgs=3

Vgs=4

Vgs=5

Cutoff Region

Linear Region

Saturation Region

Id

Vds

Vgs=1

Id-Vds Curve for NMOS

Analysis: This Graph shows the three regions of the MOSFET. At first, Vgs is set to zero, thus, no current flows across the transistor; this is called the Cutoff region. Then Vgs is increased to a voltage greater than the threshold voltage of 0.8. Current now flows across the transistor. The on state of the transistor is divided into two. The first is the linear region, this is the point where vds is not large enough or VDS < (VGS-VT), in this region the transistor acts similarly as a resistor. It can be seen from the graph that in the Linear Region the increase in Vds results in the increase in current. However, it will reach a certain point that the transistor will saturate (Vdsat), this region is called the Saturation Region. In this region any further increase in Vds would not result to an increase in current. Although, there will be small increase in current cause by secondary effect parameter Lambda. Lambda effect will be discussed later. PMOS Model

.model mp pmos (level=1 vto=-0.8 kp=30u lambda=0.02 gamma=0.7)

Schematic for PMOS testing Configuration

SPICE Netlist for PMOS Id-Vgs curve

Vgs=0

Vgs=-2

Vgs=-3

Vgs=-4

Vgs=-5

Cutoff Region

Linear Region

Saturation Region

Id

Vds

Vgs=-1

Id-Vds curve for PMOS

Analysis: The characteristic of PMOS is the same as the NMOS. It also has three regions. The difference is the negative current, which means current flows from source to drain.

(b.) Do the hand calculation analysis to get Id at Vgs=Vds=5V for N and PMOS respectively, where Id at this condition is also called the short circuit current of a basic CMOS inverter gate.

NMOS

Given: Vgs=Vds=5V; vto=0.8; kp=80u; lambda=0; gamma=0. Computing for the VGS-VT:

5-0.8=4.2 VGS-VT< VDS 4.2< 5

Thus, the MOS transistor is in the saturation region.

DSTGSPD VVVLWki 12

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mAuuuiD 528.38.052*2

1080 2

Operating point of NMOS at Vgs=Vds=5

Netlist of NMOS at Vgs=Vds=5

PMOS

Given: Vgs=Vds=5V; vto=-0.8; kp=30u; lambda=0.02; gamma=0.7.

Computing for the VGS-VT: 5-0.8=4.2 VGS-VT< VDS 4.2< 5

mAuuuiD 4553.1)5*02.01(8.052*2

1030 2

Operating point of PMOS at Vgs=Vds=5

Netlist of PMOS at Vgs=Vds=5

Problem 2 : Lambda Effect

To investigate the channel length modulation effect by setting lambda from 0 to 0.05 of NMOS parameter and see the effects on Id-Vds curves of NMOS case.

SPICE Netlist for Lambda Effect testing

Vgs=5 Lambda=0.05

Vgs=4 Lambda=0.05

Vgs=3 lambda=0.05

Id

Vds

Vgs=5 Lambda=0

Vgs=4 Lambda=0

Vgs=3 lambda=0

Vgs=2 lambda=0.05Vgs=2 lambda=0

Effect of Lambda to the Id-Vds Curve NMOS

Analysis: Looking at the Idsat equation shown below:

DSTGSPD VVVLWki 12

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At the saturation region, the drain current is not completely constant. The current still increases with increasing VDS. The increase in current is dependent in the parameter lambda. However, the amount increase is not that similar with the linear region since Lambda is normally very small and less than 1. Referring to the lambda effect graph shown above, the blue plot is the characteristic at Lambda=0, as can be seen the drain current, id, is constant when the transistor reach the saturation region. However, if Lambda is not equal to zero, the drain current at saturation region is not constant and will slowly increase with increasing Vds. This is effect is called the secondary effect caused by parameter Lamda. Problem 3 : Investigation of Body Effect To complete Id-Vgs simulation by varying Vgs and Vbs based on the following setting conditions:

Vgs: 0 to 2V step size of 0.1V Vbs: 0 to -2V step size of -0.5V Vds fixed at 0.1V

Body Effect Testing NMOS

Id

Vgs

Vsb=0Vsb=0.5

Vsb=1

Vsb=1.5

Vsb=2

Id-Vgs plot while varying source-bulk bias (NMOS)

Body Effect Testing PMOS

Id

Vgs

Vsb=0Vsb=0.5

Vbs=1

Vbs=1.5Vbs=2

Id-Vgs plot while varying bulk-source bias (PMOS)

Problem 4 To find Vgs from each Vbs bias @Id=1uA, sample for NMOS spice netlist.

Vth Extraction for each bulk source bias (NMOS)

Measured Vth with varying Bulk source bias (NMOS)

Vth Extraction for each bulk source bias (PMOS)

Measured Vth with varying Bulk source bias (NMOS)

Summary of the varaition Vth with varying bulk-source bias NMOS PMOS

Vsb Vth Vth 0 0.8707 -0.8405

0.5 1.0100 -1.0335 1 1.1191 -1.2030

1.5 1.2118 -1.3199 2 1.2939 -1.4290

Analysis for Problem 3 and Problem 4: Threshold Voltage, VTH, equation:

FSBFTT VVV 220 Looking at the Vth equation, the threshold voltage is directly proportional to the

source-bulk voltage. Referring the summary of Vth-Vsb graph, the increase in source-bulk bias causes the threshold voltage to increase.