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Nanyang Technological
University(School of Computer Engineering)
AY20!"20#
SE$ESTE%
CE"C&00#' igital ogic
E*periment +
Com,inational ogic esign -ith Schematics
An. Structural /erilog
/enue' ar.-are a, +1 N!3a0#
ANY 45ETE% Y6SE4 A45AN
U2072
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5NT%6UCT56N
In Experiment Lab 3, students were conducted the design process
and actualized
the logic circuit of 7-segment decoder. The experiment was
diided into threeparts, which are
Implementation of 7-!egment "ecoder #odule using $erilog
"ispla% of &ight or Left "igit, and &ight or Left
"ispla% with "i'erent $alues.
!tudents were needed to prepare the truth table, (-maps and the
)oolean
expressions of the 7-!egment "ecoder before doing the
experiment, which will
be shown in *reparation chapter.
4%E4A%AT56NS
In this chapter, the truth table and (-maps for eer% segments
are displa%ed.
)efore obsering the truth table, we need to +now that the binar%
number are
being labelled 3, , and / from left to the right se0uence, for
example
hexadecimal of 1 2// would be labelled as4
3 // /
Table 1. Example of Labelling Sequence
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Truth Ta,le Section
Table 2. Truth Table of 7-Segment Decoder
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8$aps an. 3oolean E*pressions of Every Segments
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E94E%5$ENTS AN 63SE%/AT56NS
5mplementation of :Segment eco.er $o.ule Using /erilog
In the 9rst part of three-part experiment, students designed the
7-segment
decoder and also the displa%. )elow are the diagram of it.
Figure 1. 7-Segment Decoder and Dipla!
The displa%:s segments are labelled from a to g, which would
light up to form ahexadecimal digits 2/-8 and ;-
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Figure (. Seg Logic &utput
Table (. )onnection of Logic &utput and Dipla! *odule
Figure +. ,)F File
;fter these settings, students need to generate the
*rogramming
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Figure . Experiment eult in Firt 'art
The experiment was conducted successfull%. )% connecting up all
the logic
outputs in $erilog 2seenseg. and completing the remaining lines
in ?C< 9le. ;ll
of 6 digits 2/-8, a-f were able to be shown on the 7-!egment
"ispla%.
isplay eft or %ight igit
In second part of experiment, we need to create 7-segment
displa% that can
show the digit on left or right. Thus in this part of experiment
we need theaddition of bu'er to connect the input and output of
this logic.
Figure /. 0uer ddition
In addition to that, we also need to add seeral lines of logic
in the ?C< 9le, to
connect the displa% with the outputs.
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Figure 7. ddition of L input and T3L&,T output
Benerate the programming 9le. =ere is the result of the second
part of the
experiment.
Figure 4. eult of Experiment in Second 'art
The second part was conducted successfull%. )% pressing the
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Figure 5. Third 'art of Experiment Deign $dea
Thus, in the experiment, the design was made to be this, for
seenseg. and the
?C< 9le.
Figure 16. ealiation of the Deign of Third 'art of
Experiment
Benerate the program from the bit 9le. =ere is the result of the
experiment.
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The experiment was conducted successfull%. Two di'erent alues
were able toshow together when changing the left or right digit due
to the multiplexers in the
design.
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using bread broad. =4A -ith Schematic >igure
In Experiment b% using ilinx
