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Keysight 1GN2-4001 20 GHz Fast-Settling, SPDT Switch
Data Sheet
Features
– Settling time (to within 0.1 dB of final value): less than 80 nSec typical
– Video feedthrough (AC-coupled): less than 10 mV typical
– 1.9 dB insertion loss at 20 GHz typical.
– 23 dB isolation at 20 GHz typical.
– at 15 dBm Pout (fund > 10 MHz) typical: 2nd harmonic 65 dBc 3rd harmonic 75 dBc
– Chip size: 920 x 920 μm ±10 μm (36.2 x 36.2 mils ±0.4 mils
– Chip size tolerance: ± 10 μm (± 0.4 mils)
– Chip thickness: 127 ± 15 μm (5.0 ± 0.6 mils)
– Pad dimensions: 80 x 80 μm (3.2 x 3.2 mils)
Description
The 1GN2-4001 is a SPDT solid-state switch fabricated using the Keysight Technologies, Inc. GaAs FET process and is designed for fast settling, low video feedthrough, and low harmonic distortion to 20 GHz.
Absolute maximum ratings1,2
Symbol Parameters/conditions Min Max Units
Pin CW power, selected port 31 dBm
Pmax Max instantaneous input power(burn-out damage)
35 dBm
VSELin Voltage on select line –9.5 +9.5 Volts
VSELmax Max voltage on select line –13 +13 Volts
TA Backside temperature +75 °C
Tstg Storage temperature +150 °C
Tmax3 Maximum assembly temperature
(60 seconds maximum)+200 °C
1. 1. Operation in excess of any one of these conditions may result in permanent damage to this component. TA = 25 °C except for Tstg, and Tmax.
2. Cumulative failures ≤ 5 % in 10 yr and ≤ 50 % in 30 yr. Operation in excess of TA will reduce part lifetime.3. Refer to JEDEC J-STD-020D for detailed reflow profile, three reflows maximum.
02 | Keysight | 1GN2-4001 20 GHz Fast-Settling, SPDT Switch - Data Sheet
Symbol Parameters/conditions Min Typ Max Units
ISEL1 high Combined SEL1 and SEL2B current at +9 V 3.0 4.0 5.0 mA
ISEL2 high Combined SEL2 and SEL1B current at +9 V 3.0 4.0 5.0 mA
ISEL1 low Combined SEL1 and SEL2B current at –9 V –4.0 –3.0 –2.0 mA
ISEL2 low Combined SEL2 and SEL1B current at –9 V –4.0 –3.0 –2.0 mA
Voffset DC offset voltage, any RF port, ± 9 V control –40 0 40 mV
RTHRU DC resistance from RFcom to selected RF port 6.0 Ω
RFGND DC resistance to ground of unselected port 7.5 Ω
RFOPEN DC resistance to ground of selected port with open circuit at RFcom
1.4 kΩ
1. Parameters specified at TA = 25 °C, except for temperature specs.
Symbol Parameters/conditions Min Typ Max Units
Insertion loss 20 GHz 1.9 2.3 dB
Isolation 20 GHz 20 23 dB
1. TA = 25 °C, ±9 V control, wafer probe.
Symbol Parameters/conditions Min Typ Max Units
Control Lines No DC bias –600 +600 Volts
RF Ports Select lines ± 9 V –4000 +4000 Volts
1. Human body model: 100 pF, 1.5 kΩ
DC specifications/physical properties1
ESD limits1
Frequency-domain RF specifications1
03 | Keysight | 1GN2-4001 20 GHz Fast-Settling, SPDT Switch - Data Sheet
Applications
The 1GN2-4001 is a general purpose SPDT switch designed for use in communication systems where fast settling time, low video feedthrough, and low harmonic distortion are critical to 20 GHz.
Bias and Operation
To connect the signal from RFCOM to RF1 for example, SEL1 should be logic high (+9 V) and SEL2 should be logic low (–9 V). SEL1B (Select One Bar) and SEL2B (Select Two Bar) are always set to the complementary control voltages of SEL1 and SEL2, respectively. Series and shunt stacked FET cells are used to control the RF signal flow; compensation FETs are used to cancel video feedthrough and null offset voltages and currents at the RF ports.
An all isolation state is allowed (SEL1 and SEL2 both low, SEL1B and SEL2B both high; an all transmission state (i.e., power divider mode) is allowed (SEL1 and SEL2 both high, SEL1B and SEL2B both low).
Bias sequencingSELx and SELxB should always be logic-level complements for good video feedthrough and low DC offset voltages (+9 V = logic high and –9 V = logic low). SEL1B should be read as Select One Bar. SEL2B should be read as Select Two Bar. Timing skew between complementary control lines may result in some extra video feedthrough, but otherwise will not impair operation.
Figure 1. 1GN2-4001 schematic diagram
04 | Keysight | 1GN2-4001 20 GHz Fast-Settling, SPDT Switch - Data Sheet
Assembly Techniques
Epoxy die attach is recommended for this chip; at this time, eutectic or solder die attach is forbidden. The backside heat slug must be soldered to a thermal heatsink that forms DC and RF ground for the circuit. Poor heatsink conductivity may cause TBS to exceed +75 °C and degrade the reliability of the circuit.
GaAs MMICs are ESD sensitive. ESD preventive measures must be employed in all aspects of storage, handling and assembly. MMIC ESD precautions, handling considerations, and die attach and bond-ing methods are critical factors in successful GaAs MMIC performance and reliability. The Keysight GaAs MMIC ESD, Die Attach and Bonding Guidelines - Application Note (5991-3484EN) provides additional information on these subjects.
RoHS Compliance
This device is RoHS Compliant. This means the component meets the requirements of the European Parliament and the Council of the European Union Restriction of Hazardous Substances Directive 2011/65/EU, commonly known as RoHS. The six regulated substances are lead, mercury, cadmium, chromium VI (hexavalent), polybrominated biphenyls (PBB) and polybrominated biphenyl ethers (PBDE). RoHS compliance implies that any residual concentration of these substances is below the RoHS Directive’s maximum concentration values (MVC); being less than 1000 ppm by weight for all substances except for cadmium which is less than 100 ppm by weight.
NoteAll dimensions in micrometers. Control Line bond-pads 70 x 70 μm open ings in polyimide; RF bond-pad 70 x 140 μm openings in polyimide.
Figure 2. 1GN2-4001 chip bond-pad locations
05 | Keysight | 1GN2-4001 20 GHz Fast-Settling, SPDT Switch - Data Sheet
selectlines
detected RF
Figure 3. 1GN2-4001 5 mV/div typical video feed-through (leading edge “OFF” - “ON” transition in AC-coupled mode, wafer-probe data).
Figure 4. 1GN2-4001 typical transition. Using synchronous detector method.
SEL1 SEL1B SEL2 SEL2B
+9 V –9 V –9 V +9 V RFCOM – RF1
–9 V +9 V +9 V –9 V RFCOM – RF2
–9 V +9 V –9 V +9 V All isolated mode
+9 V –9 V +9 V –9 V RFCOM –> RF1 and RF2 (“power divider” mode)
1. Operation with SELx ≠ -SELxB should be avoided
Logic table1
Time-domain AC specifications1
Symbol Parameters/conditions Min Typ Max Units
Settling time Within 0.1 dB final value 80 nSec
Video feed-through AC-coupled at RF ports 10 mV
1. TA= 25 °C, ±9 V control with 10 to 90 % transitions 30 nSec1
06 | Keysight | 1GN2-4001 20 GHz Fast-Settling, SPDT Switch - Data Sheet
Gain compressionSelect line bias +/- 9.0 V
Input frequency MHz
Input power (dBm)
Frequency MHz
Frequency GHz
Match
dBc
dB dBLo
ss d
B
Iso
dB
Insertion loss and isolation
Figure 5. 1GN2-4001 typical 2nd and 3rd harmonic distortion at 15 dBm power output.
Figure 7. 1GN2-4001 typical match.Note: This is wafer probe data, and will likely improve with off-chip bondwire inductance.
Figure 6. 1GN2-4001 typical insertion loss and isolation.
Figure 8. 1GN2-4001 gain compression. Note: This plot shows the 1GN2-4001 response into heavy compression, but that does not imply reliable operation in this condition; refer to the Absolute Ratings table for limits on operating conditions.
07 | Keysight | 1GN2-4001 20 GHz Fast-Settling, SPDT Switch - Data Sheet
This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. Customers considering the use of this, or other Keysight Technologies GaAs ICs, for their design should obtain the current production specifications from Keysight. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact Keysight at [email protected].
The product described in this data sheet is RoHS Compliant. See RoHS Compliance section for more details.
08 | Keysight | 1GN2-4001 20 GHz Fast-Settling, SPDT Switch - Data Sheet
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This information is subject to change without notice.© Keysight Technologies, 2016Published in USA, October 17, 20165992-1883ENwww.keysight.com
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